cscope.out

cscope 15 $HOME\EmBitz projects\STM32 workaround"               0000394928
	@C:\Users\Victor\EMBITZ~1\STM32W~1\STM32F~1.LD

33 
OUTPUT_FORMAT
("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")

34 
	$OUTPUT_ARCH
(
¬m
)

35 
	$SEARCH_DIR
(.)

38 
MEMORY


40 
	`ROM
 (
rx
è: 
ORIGIN
 = 0x08000000, 
LENGTH
 = 64
K


41 
	`RAM
 (
rwx
è: 
ORIGIN
 = 0x20000000, 
LENGTH
 = 20
K


42 
	}
}

72 
	gSECTIONS


74 .
	g‹xt
 :

76 
KEEP
(*(.
i¤_veùÜ
))

77 *(.
‹xt
*)

79 
KEEP
(*(.
š™
))

80 
KEEP
(*(.
fši
))

83 *
ütbegš
.
o
(.
ùÜs
)

84 *
ütbegš
?.
o
(.
ùÜs
)

85 *(
EXCLUDE_FILE
(*
ü‹nd
?.
o
 *ü‹nd.oè.
ùÜs
)

86 *(
SORT
(.
ùÜs
.*))

87 *(.
ùÜs
)

90 *
ütbegš
.
o
(.
dtÜs
)

91 *
ütbegš
?.
o
(.
dtÜs
)

92 *(
EXCLUDE_FILE
(*
ü‹nd
?.
o
 *ü‹nd.oè.
dtÜs
)

93 *(
SORT
(.
dtÜs
.*))

94 *(.
dtÜs
)

96 *(.
rod©a
*)

98 
KEEP
(*(.
eh_äame
*))

99 } > 
ROM


101 .
ARM
.
exb
 :

103 *(.
ARM
.
exb
* .
gnu
.
lškÚû
.
¬mexb
.*)

104 } > 
ROM


106 
__exidx_¡¬t
 = .;

107 .
	gARM
.
	gexidx
 :

109 *(.
ARM
.
exidx
* .
gnu
.
lškÚû
.
¬mexidx
.*)

110 } > 
ROM


111 
__exidx_’d
 = .;

113 
	g__‘ext
 = .;

115 .
	gd©a
 : 
AT
 (
__‘ext
)

117 
__d©a_¡¬t__
 = .;

118 *(
	gvbË
)

119 *(.
	gd©a
*)

121 . = 
ALIGN
(4);

123 
PROVIDE_HIDDEN
 (
__´eš™_¬¿y_¡¬t
 = .);

124 
KEEP
(*(.
´eš™_¬¿y
))

125 
PROVIDE_HIDDEN
 (
__´eš™_¬¿y_’d
 = .);

127 . = 
ALIGN
(4);

129 
PROVIDE_HIDDEN
 (
__š™_¬¿y_¡¬t
 = .);

130 
KEEP
(*(
SORT
(.
š™_¬¿y
.*)))

131 
KEEP
(*(.
š™_¬¿y
))

132 
PROVIDE_HIDDEN
 (
__š™_¬¿y_’d
 = .);

135 . = 
ALIGN
(4);

137 
PROVIDE_HIDDEN
 (
__fši_¬¿y_¡¬t
 = .);

138 
KEEP
(*(
SORT
(.
fši_¬¿y
.*)))

139 
KEEP
(*(.
fši_¬¿y
))

140 
PROVIDE_HIDDEN
 (
__fši_¬¿y_’d
 = .);

142 . = 
ALIGN
(4);

144 
	g__d©a_’d__
 = .;

146 } > 
	gRAM


148 .
bss
 (
NOLOAD
):

150 
__bss_¡¬t__
 = .;

151 *(.
	gbss
*)

152 *(
	gCOMMON
)

153 
	g__bss_’d__
 = .;

154 } > 
	gRAM


156 .
h—p
 (
NOLOAD
):

158 
__’d__
 = .;

159 
	g’d
 = 
__’d__
;

160 *(.
	gh—p
*)

161 
	g__H—pLim™
 = .;

162 } > 
	gRAM


167 .
¡ack_dummy
 (
NOLOAD
):

169 *(.
¡ack
)

170 } > 
RAM


174 
__SckTÝ
 = 
ORIGIN
(
RAM
è+ 
LENGTH
(RAM);

175 
	g__SckLim™
 = 
__SckTÝ
 - 
SIZEOF
(.
¡ack_dummy
);

176 
PROVIDE
(
__¡ack
 = 
__SckTÝ
);

179 
ASSERT
(
__SckLim™
 >ð
__H—pLim™
, "region RAM overflowed with stack")

	@C:\Users\Victor\EMBITZ~1\STM32W~1\STM32F~2.LD

33 
OUTPUT_FORMAT
("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")

34 
	$OUTPUT_ARCH
(
¬m
)

35 
	$SEARCH_DIR
(.)

38 
MEMORY


40 
	`ROM
 (
rx
è: 
ORIGIN
 = 0x08000000, 
LENGTH
 = 64
K


41 
	`RAM
 (
rwx
è: 
ORIGIN
 = 0x20000000, 
LENGTH
 = 20
K


42 
	}
}

72 
	gSECTIONS


74 .
	g‹xt
 :

76 
KEEP
(*(.
i¤_veùÜ
))

77 *(.
‹xt
*)

79 
KEEP
(*(.
š™
))

80 
KEEP
(*(.
fši
))

83 *
ütbegš
.
o
(.
ùÜs
)

84 *
ütbegš
?.
o
(.
ùÜs
)

85 *(
EXCLUDE_FILE
(*
ü‹nd
?.
o
 *ü‹nd.oè.
ùÜs
)

86 *(
SORT
(.
ùÜs
.*))

87 *(.
ùÜs
)

90 *
ütbegš
.
o
(.
dtÜs
)

91 *
ütbegš
?.
o
(.
dtÜs
)

92 *(
EXCLUDE_FILE
(*
ü‹nd
?.
o
 *ü‹nd.oè.
dtÜs
)

93 *(
SORT
(.
dtÜs
.*))

94 *(.
dtÜs
)

96 *(.
rod©a
*)

98 
KEEP
(*(.
eh_äame
*))

99 } > 
RAM


101 .
ARM
.
exb
 :

103 *(.
ARM
.
exb
* .
gnu
.
lškÚû
.
¬mexb
.*)

104 } > 
RAM


106 
__exidx_¡¬t
 = .;

107 .
	gARM
.
	gexidx
 :

109 *(.
ARM
.
exidx
* .
gnu
.
lškÚû
.
¬mexidx
.*)

110 } > 
RAM


111 
__exidx_’d
 = .;

113 
	g__‘ext
 = .;

115 .
	gd©a
 : 
AT
 (
__‘ext
)

117 
__d©a_¡¬t__
 = .;

118 *(
	gvbË
)

119 *(.
	gd©a
*)

121 . = 
ALIGN
(4);

123 
PROVIDE_HIDDEN
 (
__´eš™_¬¿y_¡¬t
 = .);

124 
KEEP
(*(.
´eš™_¬¿y
))

125 
PROVIDE_HIDDEN
 (
__´eš™_¬¿y_’d
 = .);

127 . = 
ALIGN
(4);

129 
PROVIDE_HIDDEN
 (
__š™_¬¿y_¡¬t
 = .);

130 
KEEP
(*(
SORT
(.
š™_¬¿y
.*)))

131 
KEEP
(*(.
š™_¬¿y
))

132 
PROVIDE_HIDDEN
 (
__š™_¬¿y_’d
 = .);

135 . = 
ALIGN
(4);

137 
PROVIDE_HIDDEN
 (
__fši_¬¿y_¡¬t
 = .);

138 
KEEP
(*(
SORT
(.
fši_¬¿y
.*)))

139 
KEEP
(*(.
fši_¬¿y
))

140 
PROVIDE_HIDDEN
 (
__fši_¬¿y_’d
 = .);

142 . = 
ALIGN
(4);

144 
	g__d©a_’d__
 = .;

146 } > 
	gRAM


148 .
bss
 (
NOLOAD
):

150 
__bss_¡¬t__
 = .;

151 *(.
	gbss
*)

152 *(
	gCOMMON
)

153 
	g__bss_’d__
 = .;

154 } > 
	gRAM


156 .
h—p
 (
NOLOAD
):

158 
__’d__
 = .;

159 
	g’d
 = 
__’d__
;

160 *(.
	gh—p
*)

161 
	g__H—pLim™
 = .;

162 } > 
	gRAM


167 .
¡ack_dummy
 (
NOLOAD
):

169 . = 
ALIGN
(8);

170 *(.
	g¡ack
)

171 } > 
RAM


175 
	g__SckTÝ
 = 
ORIGIN
(
RAM
è+ 
LENGTH
(RAM);

176 
	g__SckLim™
 = 
__SckTÝ
 - 
SIZEOF
(.
¡ack_dummy
);

177 
PROVIDE
(
__¡ack
 = 
__SckTÝ
);

180 
ASSERT
(
__SckLim™
 >ð
__H—pLim™
, "region RAM overflowed with stack")

	@C:\Users\Victor\EMBITZ~1\STM32W~1\cmsis\CORE_C~1.H

24 #iâdeà
__CORE_CMFUNC_H


25 

	#__CORE_CMFUNC_H


	)

34 #ià 
defšed
 ( 
__CC_ARM
 )

37 #ià(
__ARMCC_VERSION
 < 400677)

50 
__STATIC_INLINE
 
ušt32_t
 
	$__g‘_CONTROL
()

52 
ušt32_t
 
__»gCÚŒÞ
 
	`__ASM
("control");

53 (
__»gCÚŒÞ
);

54 
	}
}

63 
__STATIC_INLINE
 
	$__£t_CONTROL
(
ušt32_t
 
cÚŒÞ
)

65 
ušt32_t
 
__»gCÚŒÞ
 
	`__ASM
("control");

66 
__»gCÚŒÞ
 = 
cÚŒÞ
;

67 
	}
}

76 
__STATIC_INLINE
 
ušt32_t
 
	$__g‘_IPSR
()

78 
ušt32_t
 
__»gIPSR
 
	`__ASM
("ipsr");

79 (
__»gIPSR
);

80 
	}
}

89 
__STATIC_INLINE
 
ušt32_t
 
	$__g‘_APSR
()

91 
ušt32_t
 
__»gAPSR
 
	`__ASM
("apsr");

92 (
__»gAPSR
);

93 
	}
}

102 
__STATIC_INLINE
 
ušt32_t
 
	$__g‘_xPSR
()

104 
ušt32_t
 
__»gXPSR
 
	`__ASM
("xpsr");

105 (
__»gXPSR
);

106 
	}
}

115 
__STATIC_INLINE
 
ušt32_t
 
	$__g‘_PSP
()

117 
ušt32_t
 
__»gProûssSckPoš‹r
 
	`__ASM
("psp");

118 (
__»gProûssSckPoš‹r
);

119 
	}
}

128 
__STATIC_INLINE
 
	$__£t_PSP
(
ušt32_t
 
tÝOfProcSck
)

130 
ušt32_t
 
__»gProûssSckPoš‹r
 
	`__ASM
("psp");

131 
__»gProûssSckPoš‹r
 = 
tÝOfProcSck
;

132 
	}
}

141 
__STATIC_INLINE
 
ušt32_t
 
	$__g‘_MSP
()

143 
ušt32_t
 
__»gMašSckPoš‹r
 
	`__ASM
("msp");

144 (
__»gMašSckPoš‹r
);

145 
	}
}

154 
__STATIC_INLINE
 
	$__£t_MSP
(
ušt32_t
 
tÝOfMašSck
)

156 
ušt32_t
 
__»gMašSckPoš‹r
 
	`__ASM
("msp");

157 
__»gMašSckPoš‹r
 = 
tÝOfMašSck
;

158 
	}
}

167 
__STATIC_INLINE
 
ušt32_t
 
	$__g‘_PRIMASK
()

169 
ušt32_t
 
__»gPriMask
 
	`__ASM
("primask");

170 (
__»gPriMask
);

171 
	}
}

180 
__STATIC_INLINE
 
	$__£t_PRIMASK
(
ušt32_t
 
´iMask
)

182 
ušt32_t
 
__»gPriMask
 
	`__ASM
("primask");

183 
__»gPriMask
 = (
´iMask
);

184 
	}
}

187 #ià (
__CORTEX_M
 >= 0x03)

194 

	#__’abË_çuÉ_œq
 
__’abË_fiq


	)

202 

	#__di§bË_çuÉ_œq
 
__di§bË_fiq


	)

211 
__STATIC_INLINE
 
ušt32_t
 
	$__g‘_BASEPRI
()

213 
ušt32_t
 
__»gBa£Pri
 
	`__ASM
("basepri");

214 (
__»gBa£Pri
);

215 
	}
}

224 
__STATIC_INLINE
 
	$__£t_BASEPRI
(
ušt32_t
 
ba£Pri
)

226 
ušt32_t
 
__»gBa£Pri
 
	`__ASM
("basepri");

227 
__»gBa£Pri
 = (
ba£Pri
 & 0xff);

228 
	}
}

237 
__STATIC_INLINE
 
ušt32_t
 
	$__g‘_FAULTMASK
()

239 
ušt32_t
 
__»gFauÉMask
 
	`__ASM
("faultmask");

240 (
__»gFauÉMask
);

241 
	}
}

250 
__STATIC_INLINE
 
	$__£t_FAULTMASK
(
ušt32_t
 
çuÉMask
)

252 
ušt32_t
 
__»gFauÉMask
 
	`__ASM
("faultmask");

253 
__»gFauÉMask
 = (
çuÉMask
 & (
ušt32_t
)1);

254 
	}
}

259 #ià (
__CORTEX_M
 == 0x04)

267 
__STATIC_INLINE
 
ušt32_t
 
	$__g‘_FPSCR
()

269 #ià(
__FPU_PRESENT
 =ð1è&& (
__FPU_USED
 == 1)

270 
ušt32_t
 
__»gåsü
 
	`__ASM
("fpscr");

271 (
__»gåsü
);

275 
	}
}

284 
__STATIC_INLINE
 
	$__£t_FPSCR
(
ušt32_t
 
åsü
)

286 #ià(
__FPU_PRESENT
 =ð1è&& (
__FPU_USED
 == 1)

287 
ušt32_t
 
__»gåsü
 
	`__ASM
("fpscr");

288 
__»gåsü
 = (
åsü
);

290 
	}
}

295 #–ià
defšed
 ( 
__ICCARM__
 )

298 
	~<cmsis_Ÿr.h
>

301 #–ià
defšed
 ( 
__TMS470__
 )

304 
	~<cmsis_ccs.h
>

307 #–ià
defšed
 ( 
__GNUC__
 )

315 
__©Œibu‹__
ÐÐ
®ways_šlše
 ) ) 
__STATIC_INLINE
 
	$__’abË_œq
()

317 
__ASM
 volatile ("cpsie i");

318 
	}
}

326 
__©Œibu‹__
ÐÐ
®ways_šlše
 ) ) 
__STATIC_INLINE
 
	$__di§bË_œq
()

328 
__ASM
 volatile ("cpsid i");

329 
	}
}

338 
__©Œibu‹__
ÐÐ
®ways_šlše
 ) ) 
__STATIC_INLINE
 
ušt32_t
 
	$__g‘_CONTROL
()

340 
ušt32_t
 
»suÉ
;

342 
__ASM
 vÞ©ž("MRS %0, cÚŒÞ" : "ô" (
»suÉ
) );

343 (
»suÉ
);

344 
	}
}

353 
__©Œibu‹__
ÐÐ
®ways_šlše
 ) ) 
__STATIC_INLINE
 
	$__£t_CONTROL
(
ušt32_t
 
cÚŒÞ
)

355 
__ASM
 vÞ©ž("MSR cÚŒÞ, %0" : : "r" (
cÚŒÞ
) );

356 
	}
}

365 
__©Œibu‹__
ÐÐ
®ways_šlše
 ) ) 
__STATIC_INLINE
 
ušt32_t
 
	$__g‘_IPSR
()

367 
ušt32_t
 
»suÉ
;

369 
__ASM
 vÞ©ž("MRS %0, ip¤" : "ô" (
»suÉ
) );

370 (
»suÉ
);

371 
	}
}

380 
__©Œibu‹__
ÐÐ
®ways_šlše
 ) ) 
__STATIC_INLINE
 
ušt32_t
 
	$__g‘_APSR
()

382 
ušt32_t
 
»suÉ
;

384 
__ASM
 vÞ©ž("MRS %0,‡p¤" : "ô" (
»suÉ
) );

385 (
»suÉ
);

386 
	}
}

395 
__©Œibu‹__
ÐÐ
®ways_šlše
 ) ) 
__STATIC_INLINE
 
ušt32_t
 
	$__g‘_xPSR
()

397 
ušt32_t
 
»suÉ
;

399 
__ASM
 vÞ©ž("MRS %0, xp¤" : "ô" (
»suÉ
) );

400 (
»suÉ
);

401 
	}
}

410 
__©Œibu‹__
ÐÐ
®ways_šlše
 ) ) 
__STATIC_INLINE
 
ušt32_t
 
	$__g‘_PSP
()

412 
ušt32_t
 
»suÉ
;

414 
__ASM
 vÞ©ž("MRS %0,…¥\n" : "ô" (
»suÉ
) );

415 (
»suÉ
);

416 
	}
}

425 
__©Œibu‹__
ÐÐ
®ways_šlše
 ) ) 
__STATIC_INLINE
 
	$__£t_PSP
(
ušt32_t
 
tÝOfProcSck
)

427 
__ASM
 vÞ©ž("MSR…¥, %0\n" : : "r" (
tÝOfProcSck
) );

428 
	}
}

437 
__©Œibu‹__
ÐÐ
®ways_šlše
 ) ) 
__STATIC_INLINE
 
ušt32_t
 
	$__g‘_MSP
()

439 
ušt32_t
 
»suÉ
;

441 
__ASM
 vÞ©ž("MRS %0, m¥\n" : "ô" (
»suÉ
) );

442 (
»suÉ
);

443 
	}
}

452 
__©Œibu‹__
ÐÐ
®ways_šlše
 ) ) 
__STATIC_INLINE
 
	$__£t_MSP
(
ušt32_t
 
tÝOfMašSck
)

454 
__ASM
 vÞ©ž("MSR m¥, %0\n" : : "r" (
tÝOfMašSck
) );

455 
	}
}

464 
__©Œibu‹__
ÐÐ
®ways_šlše
 ) ) 
__STATIC_INLINE
 
ušt32_t
 
	$__g‘_PRIMASK
()

466 
ušt32_t
 
»suÉ
;

468 
__ASM
 vÞ©ž("MRS %0,…rimask" : "ô" (
»suÉ
) );

469 (
»suÉ
);

470 
	}
}

479 
__©Œibu‹__
ÐÐ
®ways_šlše
 ) ) 
__STATIC_INLINE
 
	$__£t_PRIMASK
(
ušt32_t
 
´iMask
)

481 
__ASM
 vÞ©ž("MSR…rimask, %0" : : "r" (
´iMask
) );

482 
	}
}

485 #ià (
__CORTEX_M
 >= 0x03)

492 
__©Œibu‹__
ÐÐ
®ways_šlše
 ) ) 
__STATIC_INLINE
 
	$__’abË_çuÉ_œq
()

494 
__ASM
 volatile ("cpsie f");

495 
	}
}

503 
__©Œibu‹__
ÐÐ
®ways_šlše
 ) ) 
__STATIC_INLINE
 
	$__di§bË_çuÉ_œq
()

505 
__ASM
 volatile ("cpsid f");

506 
	}
}

515 
__©Œibu‹__
ÐÐ
®ways_šlše
 ) ) 
__STATIC_INLINE
 
ušt32_t
 
	$__g‘_BASEPRI
()

517 
ušt32_t
 
»suÉ
;

519 
__ASM
 vÞ©ž("MRS %0, ba£´i_max" : "ô" (
»suÉ
) );

520 (
»suÉ
);

521 
	}
}

530 
__©Œibu‹__
ÐÐ
®ways_šlše
 ) ) 
__STATIC_INLINE
 
	$__£t_BASEPRI
(
ušt32_t
 
v®ue
)

532 
__ASM
 vÞ©ž("MSR ba£´i, %0" : : "r" (
v®ue
) );

533 
	}
}

542 
__©Œibu‹__
ÐÐ
®ways_šlše
 ) ) 
__STATIC_INLINE
 
ušt32_t
 
	$__g‘_FAULTMASK
()

544 
ušt32_t
 
»suÉ
;

546 
__ASM
 vÞ©ž("MRS %0, fauÉmask" : "ô" (
»suÉ
) );

547 (
»suÉ
);

548 
	}
}

557 
__©Œibu‹__
ÐÐ
®ways_šlše
 ) ) 
__STATIC_INLINE
 
	$__£t_FAULTMASK
(
ušt32_t
 
çuÉMask
)

559 
__ASM
 vÞ©ž("MSR fauÉmask, %0" : : "r" (
çuÉMask
) );

560 
	}
}

565 #ià (
__CORTEX_M
 == 0x04)

573 
__©Œibu‹__
ÐÐ
®ways_šlše
 ) ) 
__STATIC_INLINE
 
ušt32_t
 
	$__g‘_FPSCR
()

575 #ià(
__FPU_PRESENT
 =ð1è&& (
__FPU_USED
 == 1)

576 
ušt32_t
 
»suÉ
;

578 
__ASM
 vÞ©ž("VMRS %0, fpsü" : "ô" (
»suÉ
) );

579 (
»suÉ
);

583 
	}
}

592 
__©Œibu‹__
ÐÐ
®ways_šlše
 ) ) 
__STATIC_INLINE
 
	$__£t_FPSCR
(
ušt32_t
 
åsü
)

594 #ià(
__FPU_PRESENT
 =ð1è&& (
__FPU_USED
 == 1)

595 
__ASM
 vÞ©ž("VMSR fpsü, %0" : : "r" (
åsü
) );

597 
	}
}

602 #–ià
defšed
 ( 
__TASKING__
 )

	@C:\Users\Victor\EMBITZ~1\STM32W~1\cmsis\CORE_C~2.H

24 #iâdeà
__CORE_CMINSTR_H


25 

	#__CORE_CMINSTR_H


	)

34 #ià 
defšed
 ( 
__CC_ARM
 )

37 #ià(
__ARMCC_VERSION
 < 400677)

46 

	#__NOP
 
__nÝ


	)

54 

	#__WFI
 
__wfi


	)

62 

	#__WFE
 
__wã


	)

69 

	#__SEV
 
__£v


	)

78 

	#__ISB
(è
	`__isb
(0xF)

	)

86 

	#__DSB
(è
	`__dsb
(0xF)

	)

94 

	#__DMB
(è
	`__dmb
(0xF)

	)

104 

	#__REV
 
__»v


	)

114 
__©Œibu‹__
((
£ùiÚ
(".»v16_‹xt"))è
__STATIC_INLINE
 
__ASM
 
ušt32_t
 
	$__REV16
(
ušt32_t
 
v®ue
)

116 
»v16
 
r0
,„0

117 
bx
 
Ì


118 
	}
}

128 
__©Œibu‹__
((
£ùiÚ
(".»vsh_‹xt"))è
__STATIC_INLINE
 
__ASM
 
št32_t
 
	$__REVSH
(
št32_t
 
v®ue
)

130 
»vsh
 
r0
,„0

131 
bx
 
Ì


132 
	}
}

143 

	#__ROR
 
__rÜ


	)

146 #ià (
__CORTEX_M
 >= 0x03)

155 

	#__RBIT
 
__rb™


	)

165 

	#__LDREXB
(
±r
è((
ušt8_t
 ) 
	`__ld»x
Ռ))

	)

175 

	#__LDREXH
(
±r
è((
ušt16_t
è
	`__ld»x
Ռ))

	)

185 

	#__LDREXW
(
±r
è((
ušt32_t
 ) 
	`__ld»x
Ռ))

	)

197 

	#__STREXB
(
v®ue
, 
±r
è
	`__¡»x
(v®ue,…Œ)

	)

209 

	#__STREXH
(
v®ue
, 
±r
è
	`__¡»x
(v®ue,…Œ)

	)

221 

	#__STREXW
(
v®ue
, 
±r
è
	`__¡»x
(v®ue,…Œ)

	)

229 

	#__CLREX
 
__þ»x


	)

240 

	#__SSAT
 
__s§t


	)

251 

	#__USAT
 
__u§t


	)

261 

	#__CLZ
 
__þz


	)

267 #–ià
defšed
 ( 
__ICCARM__
 )

270 
	~<cmsis_Ÿr.h
>

273 #–ià
defšed
 ( 
__TMS470__
 )

276 
	~<cmsis_ccs.h
>

279 #–ià
defšed
 ( 
__GNUC__
 )

286 
__©Œibu‹__
ÐÐ
®ways_šlše
 ) ) 
__STATIC_INLINE
 
	$__NOP
()

288 
__ASM
 volatile ("nop");

289 
	}
}

297 
__©Œibu‹__
ÐÐ
®ways_šlše
 ) ) 
__STATIC_INLINE
 
	$__WFI
()

299 
__ASM
 volatile ("wfi");

300 
	}
}

308 
__©Œibu‹__
ÐÐ
®ways_šlše
 ) ) 
__STATIC_INLINE
 
	$__WFE
()

310 
__ASM
 volatile ("wfe");

311 
	}
}

318 
__©Œibu‹__
ÐÐ
®ways_šlše
 ) ) 
__STATIC_INLINE
 
	$__SEV
()

320 
__ASM
 volatile ("sev");

321 
	}
}

330 
__©Œibu‹__
ÐÐ
®ways_šlše
 ) ) 
__STATIC_INLINE
 
	$__ISB
()

332 
__ASM
 volatile ("isb");

333 
	}
}

341 
__©Œibu‹__
ÐÐ
®ways_šlše
 ) ) 
__STATIC_INLINE
 
	$__DSB
()

343 
__ASM
 volatile ("dsb");

344 
	}
}

352 
__©Œibu‹__
ÐÐ
®ways_šlše
 ) ) 
__STATIC_INLINE
 
	$__DMB
()

354 
__ASM
 volatile ("dmb");

355 
	}
}

365 
__©Œibu‹__
ÐÐ
®ways_šlše
 ) ) 
__STATIC_INLINE
 
ušt32_t
 
	$__REV
(
ušt32_t
 
v®ue
)

367 
ušt32_t
 
»suÉ
;

369 
__ASM
 vÞ©ž("»v %0, %1" : "ô" (
»suÉ
è: "r" (
v®ue
) );

370 (
»suÉ
);

371 
	}
}

381 
__©Œibu‹__
ÐÐ
®ways_šlše
 ) ) 
__STATIC_INLINE
 
ušt32_t
 
	$__REV16
(
ušt32_t
 
v®ue
)

383 
ušt32_t
 
»suÉ
;

385 
__ASM
 vÞ©ž("»v16 %0, %1" : "ô" (
»suÉ
è: "r" (
v®ue
) );

386 (
»suÉ
);

387 
	}
}

397 
__©Œibu‹__
ÐÐ
®ways_šlše
 ) ) 
__STATIC_INLINE
 
št32_t
 
	$__REVSH
(
št32_t
 
v®ue
)

399 
ušt32_t
 
»suÉ
;

401 
__ASM
 vÞ©ž("»vsh %0, %1" : "ô" (
»suÉ
è: "r" (
v®ue
) );

402 (
»suÉ
);

403 
	}
}

414 
__©Œibu‹__
ÐÐ
®ways_šlše
 ) ) 
__STATIC_INLINE
 
ušt32_t
 
	$__ROR
(
ušt32_t
 
Ý1
, ušt32_ˆ
Ý2
)

417 
__ASM
 vÞ©ž("rÜ %0, %0, %1" : "+r" (
Ý1
è: "r" (
Ý2
) );

418 (
Ý1
);

419 
	}
}

422 #ià (
__CORTEX_M
 >= 0x03)

431 
__©Œibu‹__
ÐÐ
®ways_šlše
 ) ) 
__STATIC_INLINE
 
ušt32_t
 
	$__RBIT
(
ušt32_t
 
v®ue
)

433 
ušt32_t
 
»suÉ
;

435 
__ASM
 vÞ©ž("rb™ %0, %1" : "ô" (
»suÉ
è: "r" (
v®ue
) );

436 (
»suÉ
);

437 
	}
}

447 
__©Œibu‹__
ÐÐ
®ways_šlše
 ) ) 
__STATIC_INLINE
 
ušt8_t
 
	$__LDREXB
(vÞ©ž
ušt8_t
 *
addr
)

449 
ušt8_t
 
»suÉ
;

451 
__ASM
 vÞ©ž("ld»xb %0, [%1]" : "ô" (
»suÉ
è: "r" (
addr
) );

452 (
»suÉ
);

453 
	}
}

463 
__©Œibu‹__
ÐÐ
®ways_šlše
 ) ) 
__STATIC_INLINE
 
ušt16_t
 
	$__LDREXH
(vÞ©ž
ušt16_t
 *
addr
)

465 
ušt16_t
 
»suÉ
;

467 
__ASM
 vÞ©ž("ld»xh %0, [%1]" : "ô" (
»suÉ
è: "r" (
addr
) );

468 (
»suÉ
);

469 
	}
}

479 
__©Œibu‹__
ÐÐ
®ways_šlše
 ) ) 
__STATIC_INLINE
 
ušt32_t
 
	$__LDREXW
(vÞ©ž
ušt32_t
 *
addr
)

481 
ušt32_t
 
»suÉ
;

483 
__ASM
 vÞ©ž("ld»x %0, [%1]" : "ô" (
»suÉ
è: "r" (
addr
) );

484 (
»suÉ
);

485 
	}
}

497 
__©Œibu‹__
ÐÐ
®ways_šlše
 ) ) 
__STATIC_INLINE
 
ušt32_t
 
	$__STREXB
(
ušt8_t
 
v®ue
, vÞ©žušt8_ˆ*
addr
)

499 
ušt32_t
 
»suÉ
;

501 
__ASM
 vÞ©ž("¡»xb %0, %2, [%1]" : "=&r" (
»suÉ
è: "r" (
addr
), "r" (
v®ue
) );

502 (
»suÉ
);

503 
	}
}

515 
__©Œibu‹__
ÐÐ
®ways_šlše
 ) ) 
__STATIC_INLINE
 
ušt32_t
 
	$__STREXH
(
ušt16_t
 
v®ue
, vÞ©žušt16_ˆ*
addr
)

517 
ušt32_t
 
»suÉ
;

519 
__ASM
 vÞ©ž("¡»xh %0, %2, [%1]" : "=&r" (
»suÉ
è: "r" (
addr
), "r" (
v®ue
) );

520 (
»suÉ
);

521 
	}
}

533 
__©Œibu‹__
ÐÐ
®ways_šlše
 ) ) 
__STATIC_INLINE
 
ušt32_t
 
	$__STREXW
(
ušt32_t
 
v®ue
, vÞ©žušt32_ˆ*
addr
)

535 
ušt32_t
 
»suÉ
;

537 
__ASM
 vÞ©ž("¡»x %0, %2, [%1]" : "=&r" (
»suÉ
è: "r" (
addr
), "r" (
v®ue
) );

538 (
»suÉ
);

539 
	}
}

547 
__©Œibu‹__
ÐÐ
®ways_šlše
 ) ) 
__STATIC_INLINE
 
	$__CLREX
()

549 
__ASM
 volatile ("clrex");

550 
	}
}

561 

	#__SSAT
(
ARG1
,
ARG2
) \

563 
ušt32_t
 
__RES
, 
__ARG1
 = (
ARG1
); \

564 
	`__ASM
 ("s§ˆ%0, %1, %2" : "ô" (
__RES
è: "I" (
ARG2
), "r" (
__ARG1
) ); \

565 
__RES
; \

566 })

	)

577 

	#__USAT
(
ARG1
,
ARG2
) \

579 
ušt32_t
 
__RES
, 
__ARG1
 = (
ARG1
); \

580 
	`__ASM
 ("u§ˆ%0, %1, %2" : "ô" (
__RES
è: "I" (
ARG2
), "r" (
__ARG1
) ); \

581 
__RES
; \

582 })

	)

592 
__©Œibu‹__
ÐÐ
®ways_šlše
 ) ) 
__STATIC_INLINE
 
ušt8_t
 
	$__CLZ
(
ušt32_t
 
v®ue
)

594 
ušt8_t
 
»suÉ
;

596 
__ASM
 vÞ©ž("þz %0, %1" : "ô" (
»suÉ
è: "r" (
v®ue
) );

597 (
»suÉ
);

598 
	}
}

605 #–ià
defšed
 ( 
__TASKING__
 )

	@C:\Users\Victor\EMBITZ~1\STM32W~1\cmsis\core_cm3.h

23 #ià
defšed
 ( 
__ICCARM__
 )

24 #´agm¨
sy¡em_šþude


27 #ifdeà
__ýlu¥lus


31 #iâdeà
__CORE_CM3_H_GENERIC


32 

	#__CORE_CM3_H_GENERIC


	)

56 

	#__CM3_CMSIS_VERSION_MAIN
 (0x03è

	)

57 

	#__CM3_CMSIS_VERSION_SUB
 (0x00è

	)

58 

	#__CM3_CMSIS_VERSION
 ((
__CM3_CMSIS_VERSION_MAIN
 << 16) | \

59 
__CM3_CMSIS_VERSION_SUB
 )

	)

61 

	#__CORTEX_M
 (0x03è

	)

64 #ià 
defšed
 ( 
__CC_ARM
 )

65 

	#__ASM
 
__asm


	)

66 

	#__INLINE
 
__šlše


	)

67 

	#__STATIC_INLINE
 
__šlše


	)

69 #–ià
defšed
 ( 
__ICCARM__
 )

70 

	#__ASM
 
__asm


	)

71 

	#__INLINE
 
šlše


	)

72 

	#__STATIC_INLINE
 
šlše


	)

74 #–ià
defšed
 ( 
__TMS470__
 )

75 

	#__ASM
 
__asm


	)

76 

	#__STATIC_INLINE
 
šlše


	)

78 #–ià
defšed
 ( 
__GNUC__
 )

79 

	#__ASM
 
__asm


	)

80 

	#__INLINE
 
šlše


	)

81 

	#__STATIC_INLINE
 
šlše


	)

83 #–ià
defšed
 ( 
__TASKING__
 )

84 

	#__ASM
 
__asm


	)

85 

	#__INLINE
 
šlše


	)

86 

	#__STATIC_INLINE
 
šlše


	)

92 

	#__FPU_USED
 0

	)

94 #ià
defšed
 ( 
__CC_ARM
 )

95 #ià
defšed
 
__TARGET_FPU_VFP


99 #–ià
defšed
 ( 
__ICCARM__
 )

100 #ià
defšed
 
__ARMVFP__


104 #–ià
defšed
 ( 
__TMS470__
 )

105 #ià
defšed
 
__TI__VFP_SUPPORT____


109 #–ià
defšed
 ( 
__GNUC__
 )

110 #ià
defšed
 (
__VFP_FP__
è&& !defšed(
__SOFTFP__
)

114 #–ià
defšed
 ( 
__TASKING__
 )

118 
	~<¡dšt.h
>

119 
	~<cÜe_cmIn¡r.h
>

120 
	~<cÜe_cmFunc.h
>

124 #iâdeà
__CMSIS_GENERIC


126 #iâdeà
__CORE_CM3_H_DEPENDANT


127 

	#__CORE_CM3_H_DEPENDANT


	)

130 #ià
defšed
 
__CHECK_DEVICE_DEFINES


131 #iâdeà
__CM3_REV


132 

	#__CM3_REV
 0x0200

	)

136 #iâdeà
__MPU_PRESENT


137 

	#__MPU_PRESENT
 0

	)

141 #iâdeà
__NVIC_PRIO_BITS


142 

	#__NVIC_PRIO_BITS
 4

	)

146 #iâdeà
__V’dÜ_SysTickCÚfig


147 

	#__V’dÜ_SysTickCÚfig
 0

	)

160 #ifdeà
__ýlu¥lus


161 

	#__I
 vÞ©ž

	)

163 

	#__I
 vÞ©žcÚ¡

	)

165 

	#__O
 vÞ©ž

	)

166 

	#__IO
 vÞ©ž

	)

198 #ià(
__CORTEX_M
 != 0x04)

199 
ušt32_t
 
_ȣrved0
:27;

201 
ušt32_t
 
_ȣrved0
:16;

202 
ušt32_t
 
GE
:4;

203 
ušt32_t
 
_ȣrved1
:7;

205 
ušt32_t
 
Q
:1;

206 
ušt32_t
 
V
:1;

207 
ušt32_t
 
C
:1;

208 
ušt32_t
 
Z
:1;

209 
ušt32_t
 
N
:1;

210 } 
b
;

211 
ušt32_t
 
w
;

212 } 
	tAPSR_Ty³
;

221 
ušt32_t
 
	mISR
:9;

222 
ušt32_t
 
	m_ȣrved0
:23;

223 } 
	mb
;

224 
ušt32_t
 
	mw
;

225 } 
	tIPSR_Ty³
;

234 
ušt32_t
 
	mISR
:9;

235 #ià(
__CORTEX_M
 != 0x04)

236 
ušt32_t
 
	m_ȣrved0
:15;

238 
ušt32_t
 
	m_ȣrved0
:7;

239 
ušt32_t
 
	mGE
:4;

240 
ušt32_t
 
	m_ȣrved1
:4;

242 
ušt32_t
 
	mT
:1;

243 
ušt32_t
 
	mIT
:2;

244 
ušt32_t
 
	mQ
:1;

245 
ušt32_t
 
	mV
:1;

246 
ušt32_t
 
	mC
:1;

247 
ušt32_t
 
	mZ
:1;

248 
ušt32_t
 
	mN
:1;

249 } 
	mb
;

250 
ušt32_t
 
	mw
;

251 } 
	txPSR_Ty³
;

260 
ušt32_t
 
	mnPRIV
:1;

261 
ušt32_t
 
	mSPSEL
:1;

262 
ušt32_t
 
	mFPCA
:1;

263 
ušt32_t
 
	m_ȣrved0
:29;

264 } 
	mb
;

265 
ušt32_t
 
	mw
;

266 } 
	tCONTROL_Ty³
;

281 
__IO
 
ušt32_t
 
	mISER
[8];

282 
ušt32_t
 
	mRESERVED0
[24];

283 
__IO
 
ušt32_t
 
	mICER
[8];

284 
ušt32_t
 
	mRSERVED1
[24];

285 
__IO
 
ušt32_t
 
	mISPR
[8];

286 
ušt32_t
 
	mRESERVED2
[24];

287 
__IO
 
ušt32_t
 
	mICPR
[8];

288 
ušt32_t
 
	mRESERVED3
[24];

289 
__IO
 
ušt32_t
 
	mIABR
[8];

290 
ušt32_t
 
	mRESERVED4
[56];

291 
__IO
 
ušt8_t
 
	mIP
[240];

292 
ušt32_t
 
	mRESERVED5
[644];

293 
__O
 
ušt32_t
 
	mSTIR
;

294 } 
	tNVIC_Ty³
;

297 

	#NVIC_STIR_INTID_Pos
 0

	)

298 

	#NVIC_STIR_INTID_Msk
 (0x1FFUL << 
NVIC_STIR_INTID_Pos
è

	)

313 
__I
 
ušt32_t
 
	mCPUID
;

314 
__IO
 
ušt32_t
 
	mICSR
;

315 
__IO
 
ušt32_t
 
	mVTOR
;

316 
__IO
 
ušt32_t
 
	mAIRCR
;

317 
__IO
 
ušt32_t
 
	mSCR
;

318 
__IO
 
ušt32_t
 
	mCCR
;

319 
__IO
 
ušt8_t
 
	mSHP
[12];

320 
__IO
 
ušt32_t
 
	mSHCSR
;

321 
__IO
 
ušt32_t
 
	mCFSR
;

322 
__IO
 
ušt32_t
 
	mHFSR
;

323 
__IO
 
ušt32_t
 
	mDFSR
;

324 
__IO
 
ušt32_t
 
	mMMFAR
;

325 
__IO
 
ušt32_t
 
	mBFAR
;

326 
__IO
 
ušt32_t
 
	mAFSR
;

327 
__I
 
ušt32_t
 
	mPFR
[2];

328 
__I
 
ušt32_t
 
	mDFR
;

329 
__I
 
ušt32_t
 
	mADR
;

330 
__I
 
ušt32_t
 
	mMMFR
[4];

331 
__I
 
ušt32_t
 
	mISAR
[5];

332 
ušt32_t
 
	mRESERVED0
[5];

333 
__IO
 
ušt32_t
 
	mCPACR
;

334 } 
	tSCB_Ty³
;

337 

	#SCB_CPUID_IMPLEMENTER_Pos
 24

	)

338 

	#SCB_CPUID_IMPLEMENTER_Msk
 (0xFFUL << 
SCB_CPUID_IMPLEMENTER_Pos
è

	)

340 

	#SCB_CPUID_VARIANT_Pos
 20

	)

341 

	#SCB_CPUID_VARIANT_Msk
 (0xFUL << 
SCB_CPUID_VARIANT_Pos
è

	)

343 

	#SCB_CPUID_ARCHITECTURE_Pos
 16

	)

344 

	#SCB_CPUID_ARCHITECTURE_Msk
 (0xFUL << 
SCB_CPUID_ARCHITECTURE_Pos
è

	)

346 

	#SCB_CPUID_PARTNO_Pos
 4

	)

347 

	#SCB_CPUID_PARTNO_Msk
 (0xFFFUL << 
SCB_CPUID_PARTNO_Pos
è

	)

349 

	#SCB_CPUID_REVISION_Pos
 0

	)

350 

	#SCB_CPUID_REVISION_Msk
 (0xFUL << 
SCB_CPUID_REVISION_Pos
è

	)

353 

	#SCB_ICSR_NMIPENDSET_Pos
 31

	)

354 

	#SCB_ICSR_NMIPENDSET_Msk
 (1UL << 
SCB_ICSR_NMIPENDSET_Pos
è

	)

356 

	#SCB_ICSR_PENDSVSET_Pos
 28

	)

357 

	#SCB_ICSR_PENDSVSET_Msk
 (1UL << 
SCB_ICSR_PENDSVSET_Pos
è

	)

359 

	#SCB_ICSR_PENDSVCLR_Pos
 27

	)

360 

	#SCB_ICSR_PENDSVCLR_Msk
 (1UL << 
SCB_ICSR_PENDSVCLR_Pos
è

	)

362 

	#SCB_ICSR_PENDSTSET_Pos
 26

	)

363 

	#SCB_ICSR_PENDSTSET_Msk
 (1UL << 
SCB_ICSR_PENDSTSET_Pos
è

	)

365 

	#SCB_ICSR_PENDSTCLR_Pos
 25

	)

366 

	#SCB_ICSR_PENDSTCLR_Msk
 (1UL << 
SCB_ICSR_PENDSTCLR_Pos
è

	)

368 

	#SCB_ICSR_ISRPREEMPT_Pos
 23

	)

369 

	#SCB_ICSR_ISRPREEMPT_Msk
 (1UL << 
SCB_ICSR_ISRPREEMPT_Pos
è

	)

371 

	#SCB_ICSR_ISRPENDING_Pos
 22

	)

372 

	#SCB_ICSR_ISRPENDING_Msk
 (1UL << 
SCB_ICSR_ISRPENDING_Pos
è

	)

374 

	#SCB_ICSR_VECTPENDING_Pos
 12

	)

375 

	#SCB_ICSR_VECTPENDING_Msk
 (0x1FFUL << 
SCB_ICSR_VECTPENDING_Pos
è

	)

377 

	#SCB_ICSR_RETTOBASE_Pos
 11

	)

378 

	#SCB_ICSR_RETTOBASE_Msk
 (1UL << 
SCB_ICSR_RETTOBASE_Pos
è

	)

380 

	#SCB_ICSR_VECTACTIVE_Pos
 0

	)

381 

	#SCB_ICSR_VECTACTIVE_Msk
 (0x1FFUL << 
SCB_ICSR_VECTACTIVE_Pos
è

	)

384 #ià(
__CM3_REV
 < 0x0201)

385 

	#SCB_VTOR_TBLBASE_Pos
 29

	)

386 

	#SCB_VTOR_TBLBASE_Msk
 (1UL << 
SCB_VTOR_TBLBASE_Pos
è

	)

388 

	#SCB_VTOR_TBLOFF_Pos
 7

	)

389 

	#SCB_VTOR_TBLOFF_Msk
 (0x3FFFFFUL << 
SCB_VTOR_TBLOFF_Pos
è

	)

391 

	#SCB_VTOR_TBLOFF_Pos
 7

	)

392 

	#SCB_VTOR_TBLOFF_Msk
 (0x1FFFFFFUL << 
SCB_VTOR_TBLOFF_Pos
è

	)

396 

	#SCB_AIRCR_VECTKEY_Pos
 16

	)

397 

	#SCB_AIRCR_VECTKEY_Msk
 (0xFFFFUL << 
SCB_AIRCR_VECTKEY_Pos
è

	)

399 

	#SCB_AIRCR_VECTKEYSTAT_Pos
 16

	)

400 

	#SCB_AIRCR_VECTKEYSTAT_Msk
 (0xFFFFUL << 
SCB_AIRCR_VECTKEYSTAT_Pos
è

	)

402 

	#SCB_AIRCR_ENDIANESS_Pos
 15

	)

403 

	#SCB_AIRCR_ENDIANESS_Msk
 (1UL << 
SCB_AIRCR_ENDIANESS_Pos
è

	)

405 

	#SCB_AIRCR_PRIGROUP_Pos
 8

	)

406 

	#SCB_AIRCR_PRIGROUP_Msk
 (7UL << 
SCB_AIRCR_PRIGROUP_Pos
è

	)

408 

	#SCB_AIRCR_SYSRESETREQ_Pos
 2

	)

409 

	#SCB_AIRCR_SYSRESETREQ_Msk
 (1UL << 
SCB_AIRCR_SYSRESETREQ_Pos
è

	)

411 

	#SCB_AIRCR_VECTCLRACTIVE_Pos
 1

	)

412 

	#SCB_AIRCR_VECTCLRACTIVE_Msk
 (1UL << 
SCB_AIRCR_VECTCLRACTIVE_Pos
è

	)

414 

	#SCB_AIRCR_VECTRESET_Pos
 0

	)

415 

	#SCB_AIRCR_VECTRESET_Msk
 (1UL << 
SCB_AIRCR_VECTRESET_Pos
è

	)

418 

	#SCB_SCR_SEVONPEND_Pos
 4

	)

419 

	#SCB_SCR_SEVONPEND_Msk
 (1UL << 
SCB_SCR_SEVONPEND_Pos
è

	)

421 

	#SCB_SCR_SLEEPDEEP_Pos
 2

	)

422 

	#SCB_SCR_SLEEPDEEP_Msk
 (1UL << 
SCB_SCR_SLEEPDEEP_Pos
è

	)

424 

	#SCB_SCR_SLEEPONEXIT_Pos
 1

	)

425 

	#SCB_SCR_SLEEPONEXIT_Msk
 (1UL << 
SCB_SCR_SLEEPONEXIT_Pos
è

	)

428 

	#SCB_CCR_STKALIGN_Pos
 9

	)

429 

	#SCB_CCR_STKALIGN_Msk
 (1UL << 
SCB_CCR_STKALIGN_Pos
è

	)

431 

	#SCB_CCR_BFHFNMIGN_Pos
 8

	)

432 

	#SCB_CCR_BFHFNMIGN_Msk
 (1UL << 
SCB_CCR_BFHFNMIGN_Pos
è

	)

434 

	#SCB_CCR_DIV_0_TRP_Pos
 4

	)

435 

	#SCB_CCR_DIV_0_TRP_Msk
 (1UL << 
SCB_CCR_DIV_0_TRP_Pos
è

	)

437 

	#SCB_CCR_UNALIGN_TRP_Pos
 3

	)

438 

	#SCB_CCR_UNALIGN_TRP_Msk
 (1UL << 
SCB_CCR_UNALIGN_TRP_Pos
è

	)

440 

	#SCB_CCR_USERSETMPEND_Pos
 1

	)

441 

	#SCB_CCR_USERSETMPEND_Msk
 (1UL << 
SCB_CCR_USERSETMPEND_Pos
è

	)

443 

	#SCB_CCR_NONBASETHRDENA_Pos
 0

	)

444 

	#SCB_CCR_NONBASETHRDENA_Msk
 (1UL << 
SCB_CCR_NONBASETHRDENA_Pos
è

	)

447 

	#SCB_SHCSR_USGFAULTENA_Pos
 18

	)

448 

	#SCB_SHCSR_USGFAULTENA_Msk
 (1UL << 
SCB_SHCSR_USGFAULTENA_Pos
è

	)

450 

	#SCB_SHCSR_BUSFAULTENA_Pos
 17

	)

451 

	#SCB_SHCSR_BUSFAULTENA_Msk
 (1UL << 
SCB_SHCSR_BUSFAULTENA_Pos
è

	)

453 

	#SCB_SHCSR_MEMFAULTENA_Pos
 16

	)

454 

	#SCB_SHCSR_MEMFAULTENA_Msk
 (1UL << 
SCB_SHCSR_MEMFAULTENA_Pos
è

	)

456 

	#SCB_SHCSR_SVCALLPENDED_Pos
 15

	)

457 

	#SCB_SHCSR_SVCALLPENDED_Msk
 (1UL << 
SCB_SHCSR_SVCALLPENDED_Pos
è

	)

459 

	#SCB_SHCSR_BUSFAULTPENDED_Pos
 14

	)

460 

	#SCB_SHCSR_BUSFAULTPENDED_Msk
 (1UL << 
SCB_SHCSR_BUSFAULTPENDED_Pos
è

	)

462 

	#SCB_SHCSR_MEMFAULTPENDED_Pos
 13

	)

463 

	#SCB_SHCSR_MEMFAULTPENDED_Msk
 (1UL << 
SCB_SHCSR_MEMFAULTPENDED_Pos
è

	)

465 

	#SCB_SHCSR_USGFAULTPENDED_Pos
 12

	)

466 

	#SCB_SHCSR_USGFAULTPENDED_Msk
 (1UL << 
SCB_SHCSR_USGFAULTPENDED_Pos
è

	)

468 

	#SCB_SHCSR_SYSTICKACT_Pos
 11

	)

469 

	#SCB_SHCSR_SYSTICKACT_Msk
 (1UL << 
SCB_SHCSR_SYSTICKACT_Pos
è

	)

471 

	#SCB_SHCSR_PENDSVACT_Pos
 10

	)

472 

	#SCB_SHCSR_PENDSVACT_Msk
 (1UL << 
SCB_SHCSR_PENDSVACT_Pos
è

	)

474 

	#SCB_SHCSR_MONITORACT_Pos
 8

	)

475 

	#SCB_SHCSR_MONITORACT_Msk
 (1UL << 
SCB_SHCSR_MONITORACT_Pos
è

	)

477 

	#SCB_SHCSR_SVCALLACT_Pos
 7

	)

478 

	#SCB_SHCSR_SVCALLACT_Msk
 (1UL << 
SCB_SHCSR_SVCALLACT_Pos
è

	)

480 

	#SCB_SHCSR_USGFAULTACT_Pos
 3

	)

481 

	#SCB_SHCSR_USGFAULTACT_Msk
 (1UL << 
SCB_SHCSR_USGFAULTACT_Pos
è

	)

483 

	#SCB_SHCSR_BUSFAULTACT_Pos
 1

	)

484 

	#SCB_SHCSR_BUSFAULTACT_Msk
 (1UL << 
SCB_SHCSR_BUSFAULTACT_Pos
è

	)

486 

	#SCB_SHCSR_MEMFAULTACT_Pos
 0

	)

487 

	#SCB_SHCSR_MEMFAULTACT_Msk
 (1UL << 
SCB_SHCSR_MEMFAULTACT_Pos
è

	)

490 

	#SCB_CFSR_USGFAULTSR_Pos
 16

	)

491 

	#SCB_CFSR_USGFAULTSR_Msk
 (0xFFFFUL << 
SCB_CFSR_USGFAULTSR_Pos
è

	)

493 

	#SCB_CFSR_BUSFAULTSR_Pos
 8

	)

494 

	#SCB_CFSR_BUSFAULTSR_Msk
 (0xFFUL << 
SCB_CFSR_BUSFAULTSR_Pos
è

	)

496 

	#SCB_CFSR_MEMFAULTSR_Pos
 0

	)

497 

	#SCB_CFSR_MEMFAULTSR_Msk
 (0xFFUL << 
SCB_CFSR_MEMFAULTSR_Pos
è

	)

500 

	#SCB_HFSR_DEBUGEVT_Pos
 31

	)

501 

	#SCB_HFSR_DEBUGEVT_Msk
 (1UL << 
SCB_HFSR_DEBUGEVT_Pos
è

	)

503 

	#SCB_HFSR_FORCED_Pos
 30

	)

504 

	#SCB_HFSR_FORCED_Msk
 (1UL << 
SCB_HFSR_FORCED_Pos
è

	)

506 

	#SCB_HFSR_VECTTBL_Pos
 1

	)

507 

	#SCB_HFSR_VECTTBL_Msk
 (1UL << 
SCB_HFSR_VECTTBL_Pos
è

	)

510 

	#SCB_DFSR_EXTERNAL_Pos
 4

	)

511 

	#SCB_DFSR_EXTERNAL_Msk
 (1UL << 
SCB_DFSR_EXTERNAL_Pos
è

	)

513 

	#SCB_DFSR_VCATCH_Pos
 3

	)

514 

	#SCB_DFSR_VCATCH_Msk
 (1UL << 
SCB_DFSR_VCATCH_Pos
è

	)

516 

	#SCB_DFSR_DWTTRAP_Pos
 2

	)

517 

	#SCB_DFSR_DWTTRAP_Msk
 (1UL << 
SCB_DFSR_DWTTRAP_Pos
è

	)

519 

	#SCB_DFSR_BKPT_Pos
 1

	)

520 

	#SCB_DFSR_BKPT_Msk
 (1UL << 
SCB_DFSR_BKPT_Pos
è

	)

522 

	#SCB_DFSR_HALTED_Pos
 0

	)

523 

	#SCB_DFSR_HALTED_Msk
 (1UL << 
SCB_DFSR_HALTED_Pos
è

	)

538 
ušt32_t
 
	mRESERVED0
[1];

539 
__I
 
ušt32_t
 
	mICTR
;

540 #ià((
defšed
 
__CM3_REV
) && (__CM3_REV >= 0x200))

541 
__IO
 
ušt32_t
 
	mACTLR
;

543 
ušt32_t
 
	mRESERVED1
[1];

545 } 
	tSCnSCB_Ty³
;

548 

	#SCnSCB_ICTR_INTLINESNUM_Pos
 0

	)

549 

	#SCnSCB_ICTR_INTLINESNUM_Msk
 (0xFUL << 
SCnSCB_ICTR_INTLINESNUM_Pos
è

	)

553 

	#SCnSCB_ACTLR_DISFOLD_Pos
 2

	)

554 

	#SCnSCB_ACTLR_DISFOLD_Msk
 (1UL << 
SCnSCB_ACTLR_DISFOLD_Pos
è

	)

556 

	#SCnSCB_ACTLR_DISDEFWBUF_Pos
 1

	)

557 

	#SCnSCB_ACTLR_DISDEFWBUF_Msk
 (1UL << 
SCnSCB_ACTLR_DISDEFWBUF_Pos
è

	)

559 

	#SCnSCB_ACTLR_DISMCYCINT_Pos
 0

	)

560 

	#SCnSCB_ACTLR_DISMCYCINT_Msk
 (1UL << 
SCnSCB_ACTLR_DISMCYCINT_Pos
è

	)

575 
__IO
 
ušt32_t
 
	mCTRL
;

576 
__IO
 
ušt32_t
 
	mLOAD
;

577 
__IO
 
ušt32_t
 
	mVAL
;

578 
__I
 
ušt32_t
 
	mCALIB
;

579 } 
	tSysTick_Ty³
;

582 

	#SysTick_CTRL_COUNTFLAG_Pos
 16

	)

583 

	#SysTick_CTRL_COUNTFLAG_Msk
 (1UL << 
SysTick_CTRL_COUNTFLAG_Pos
è

	)

585 

	#SysTick_CTRL_CLKSOURCE_Pos
 2

	)

586 

	#SysTick_CTRL_CLKSOURCE_Msk
 (1UL << 
SysTick_CTRL_CLKSOURCE_Pos
è

	)

588 

	#SysTick_CTRL_TICKINT_Pos
 1

	)

589 

	#SysTick_CTRL_TICKINT_Msk
 (1UL << 
SysTick_CTRL_TICKINT_Pos
è

	)

591 

	#SysTick_CTRL_ENABLE_Pos
 0

	)

592 

	#SysTick_CTRL_ENABLE_Msk
 (1UL << 
SysTick_CTRL_ENABLE_Pos
è

	)

595 

	#SysTick_LOAD_RELOAD_Pos
 0

	)

596 

	#SysTick_LOAD_RELOAD_Msk
 (0xFFFFFFUL << 
SysTick_LOAD_RELOAD_Pos
è

	)

599 

	#SysTick_VAL_CURRENT_Pos
 0

	)

600 

	#SysTick_VAL_CURRENT_Msk
 (0xFFFFFFUL << 
SysTick_VAL_CURRENT_Pos
è

	)

603 

	#SysTick_CALIB_NOREF_Pos
 31

	)

604 

	#SysTick_CALIB_NOREF_Msk
 (1UL << 
SysTick_CALIB_NOREF_Pos
è

	)

606 

	#SysTick_CALIB_SKEW_Pos
 30

	)

607 

	#SysTick_CALIB_SKEW_Msk
 (1UL << 
SysTick_CALIB_SKEW_Pos
è

	)

609 

	#SysTick_CALIB_TENMS_Pos
 0

	)

610 

	#SysTick_CALIB_TENMS_Msk
 (0xFFFFFFUL << 
SysTick_VAL_CURRENT_Pos
è

	)

625 
__O
 union

627 
__O
 
ušt8_t
 
	mu8
;

628 
__O
 
ušt16_t
 
	mu16
;

629 
__O
 
ušt32_t
 
	mu32
;

630 } 
	mPORT
 [32];

631 
ušt32_t
 
	mRESERVED0
[864];

632 
__IO
 
ušt32_t
 
	mTER
;

633 
ušt32_t
 
	mRESERVED1
[15];

634 
__IO
 
ušt32_t
 
	mTPR
;

635 
ušt32_t
 
	mRESERVED2
[15];

636 
__IO
 
ušt32_t
 
	mTCR
;

637 } 
	tITM_Ty³
;

640 

	#ITM_TPR_PRIVMASK_Pos
 0

	)

641 

	#ITM_TPR_PRIVMASK_Msk
 (0xFUL << 
ITM_TPR_PRIVMASK_Pos
è

	)

644 

	#ITM_TCR_BUSY_Pos
 23

	)

645 

	#ITM_TCR_BUSY_Msk
 (1UL << 
ITM_TCR_BUSY_Pos
è

	)

647 

	#ITM_TCR_T¿ûBusID_Pos
 16

	)

648 

	#ITM_TCR_T¿ûBusID_Msk
 (0x7FUL << 
ITM_TCR_T¿ûBusID_Pos
è

	)

650 

	#ITM_TCR_GTSFREQ_Pos
 10

	)

651 

	#ITM_TCR_GTSFREQ_Msk
 (3UL << 
ITM_TCR_GTSFREQ_Pos
è

	)

653 

	#ITM_TCR_TSP»sÿË_Pos
 8

	)

654 

	#ITM_TCR_TSP»sÿË_Msk
 (3UL << 
ITM_TCR_TSP»sÿË_Pos
è

	)

656 

	#ITM_TCR_SWOENA_Pos
 4

	)

657 

	#ITM_TCR_SWOENA_Msk
 (1UL << 
ITM_TCR_SWOENA_Pos
è

	)

659 

	#ITM_TCR_TXENA_Pos
 3

	)

660 

	#ITM_TCR_TXENA_Msk
 (1UL << 
ITM_TCR_TXENA_Pos
è

	)

662 

	#ITM_TCR_SYNCENA_Pos
 2

	)

663 

	#ITM_TCR_SYNCENA_Msk
 (1UL << 
ITM_TCR_SYNCENA_Pos
è

	)

665 

	#ITM_TCR_TSENA_Pos
 1

	)

666 

	#ITM_TCR_TSENA_Msk
 (1UL << 
ITM_TCR_TSENA_Pos
è

	)

668 

	#ITM_TCR_ITMENA_Pos
 0

	)

669 

	#ITM_TCR_ITMENA_Msk
 (1UL << 
ITM_TCR_ITMENA_Pos
è

	)

684 
__IO
 
ušt32_t
 
	mCTRL
;

685 
__IO
 
ušt32_t
 
	mCYCCNT
;

686 
__IO
 
ušt32_t
 
	mCPICNT
;

687 
__IO
 
ušt32_t
 
	mEXCCNT
;

688 
__IO
 
ušt32_t
 
	mSLEEPCNT
;

689 
__IO
 
ušt32_t
 
	mLSUCNT
;

690 
__IO
 
ušt32_t
 
	mFOLDCNT
;

691 
__I
 
ušt32_t
 
	mPCSR
;

692 
__IO
 
ušt32_t
 
	mCOMP0
;

693 
__IO
 
ušt32_t
 
	mMASK0
;

694 
__IO
 
ušt32_t
 
	mFUNCTION0
;

695 
ušt32_t
 
	mRESERVED0
[1];

696 
__IO
 
ušt32_t
 
	mCOMP1
;

697 
__IO
 
ušt32_t
 
	mMASK1
;

698 
__IO
 
ušt32_t
 
	mFUNCTION1
;

699 
ušt32_t
 
	mRESERVED1
[1];

700 
__IO
 
ušt32_t
 
	mCOMP2
;

701 
__IO
 
ušt32_t
 
	mMASK2
;

702 
__IO
 
ušt32_t
 
	mFUNCTION2
;

703 
ušt32_t
 
	mRESERVED2
[1];

704 
__IO
 
ušt32_t
 
	mCOMP3
;

705 
__IO
 
ušt32_t
 
	mMASK3
;

706 
__IO
 
ušt32_t
 
	mFUNCTION3
;

707 } 
	tDWT_Ty³
;

710 

	#DWT_CTRL_NUMCOMP_Pos
 28

	)

711 

	#DWT_CTRL_NUMCOMP_Msk
 (0xFUL << 
DWT_CTRL_NUMCOMP_Pos
è

	)

713 

	#DWT_CTRL_NOTRCPKT_Pos
 27

	)

714 

	#DWT_CTRL_NOTRCPKT_Msk
 (0x1UL << 
DWT_CTRL_NOTRCPKT_Pos
è

	)

716 

	#DWT_CTRL_NOEXTTRIG_Pos
 26

	)

717 

	#DWT_CTRL_NOEXTTRIG_Msk
 (0x1UL << 
DWT_CTRL_NOEXTTRIG_Pos
è

	)

719 

	#DWT_CTRL_NOCYCCNT_Pos
 25

	)

720 

	#DWT_CTRL_NOCYCCNT_Msk
 (0x1UL << 
DWT_CTRL_NOCYCCNT_Pos
è

	)

722 

	#DWT_CTRL_NOPRFCNT_Pos
 24

	)

723 

	#DWT_CTRL_NOPRFCNT_Msk
 (0x1UL << 
DWT_CTRL_NOPRFCNT_Pos
è

	)

725 

	#DWT_CTRL_CYCEVTENA_Pos
 22

	)

726 

	#DWT_CTRL_CYCEVTENA_Msk
 (0x1UL << 
DWT_CTRL_CYCEVTENA_Pos
è

	)

728 

	#DWT_CTRL_FOLDEVTENA_Pos
 21

	)

729 

	#DWT_CTRL_FOLDEVTENA_Msk
 (0x1UL << 
DWT_CTRL_FOLDEVTENA_Pos
è

	)

731 

	#DWT_CTRL_LSUEVTENA_Pos
 20

	)

732 

	#DWT_CTRL_LSUEVTENA_Msk
 (0x1UL << 
DWT_CTRL_LSUEVTENA_Pos
è

	)

734 

	#DWT_CTRL_SLEEPEVTENA_Pos
 19

	)

735 

	#DWT_CTRL_SLEEPEVTENA_Msk
 (0x1UL << 
DWT_CTRL_SLEEPEVTENA_Pos
è

	)

737 

	#DWT_CTRL_EXCEVTENA_Pos
 18

	)

738 

	#DWT_CTRL_EXCEVTENA_Msk
 (0x1UL << 
DWT_CTRL_EXCEVTENA_Pos
è

	)

740 

	#DWT_CTRL_CPIEVTENA_Pos
 17

	)

741 

	#DWT_CTRL_CPIEVTENA_Msk
 (0x1UL << 
DWT_CTRL_CPIEVTENA_Pos
è

	)

743 

	#DWT_CTRL_EXCTRCENA_Pos
 16

	)

744 

	#DWT_CTRL_EXCTRCENA_Msk
 (0x1UL << 
DWT_CTRL_EXCTRCENA_Pos
è

	)

746 

	#DWT_CTRL_PCSAMPLENA_Pos
 12

	)

747 

	#DWT_CTRL_PCSAMPLENA_Msk
 (0x1UL << 
DWT_CTRL_PCSAMPLENA_Pos
è

	)

749 

	#DWT_CTRL_SYNCTAP_Pos
 10

	)

750 

	#DWT_CTRL_SYNCTAP_Msk
 (0x3UL << 
DWT_CTRL_SYNCTAP_Pos
è

	)

752 

	#DWT_CTRL_CYCTAP_Pos
 9

	)

753 

	#DWT_CTRL_CYCTAP_Msk
 (0x1UL << 
DWT_CTRL_CYCTAP_Pos
è

	)

755 

	#DWT_CTRL_POSTINIT_Pos
 5

	)

756 

	#DWT_CTRL_POSTINIT_Msk
 (0xFUL << 
DWT_CTRL_POSTINIT_Pos
è

	)

758 

	#DWT_CTRL_POSTPRESET_Pos
 1

	)

759 

	#DWT_CTRL_POSTPRESET_Msk
 (0xFUL << 
DWT_CTRL_POSTPRESET_Pos
è

	)

761 

	#DWT_CTRL_CYCCNTENA_Pos
 0

	)

762 

	#DWT_CTRL_CYCCNTENA_Msk
 (0x1UL << 
DWT_CTRL_CYCCNTENA_Pos
è

	)

765 

	#DWT_CPICNT_CPICNT_Pos
 0

	)

766 

	#DWT_CPICNT_CPICNT_Msk
 (0xFFUL << 
DWT_CPICNT_CPICNT_Pos
è

	)

769 

	#DWT_EXCCNT_EXCCNT_Pos
 0

	)

770 

	#DWT_EXCCNT_EXCCNT_Msk
 (0xFFUL << 
DWT_EXCCNT_EXCCNT_Pos
è

	)

773 

	#DWT_SLEEPCNT_SLEEPCNT_Pos
 0

	)

774 

	#DWT_SLEEPCNT_SLEEPCNT_Msk
 (0xFFUL << 
DWT_SLEEPCNT_SLEEPCNT_Pos
è

	)

777 

	#DWT_LSUCNT_LSUCNT_Pos
 0

	)

778 

	#DWT_LSUCNT_LSUCNT_Msk
 (0xFFUL << 
DWT_LSUCNT_LSUCNT_Pos
è

	)

781 

	#DWT_FOLDCNT_FOLDCNT_Pos
 0

	)

782 

	#DWT_FOLDCNT_FOLDCNT_Msk
 (0xFFUL << 
DWT_FOLDCNT_FOLDCNT_Pos
è

	)

785 

	#DWT_MASK_MASK_Pos
 0

	)

786 

	#DWT_MASK_MASK_Msk
 (0x1FUL << 
DWT_MASK_MASK_Pos
è

	)

789 

	#DWT_FUNCTION_MATCHED_Pos
 24

	)

790 

	#DWT_FUNCTION_MATCHED_Msk
 (0x1UL << 
DWT_FUNCTION_MATCHED_Pos
è

	)

792 

	#DWT_FUNCTION_DATAVADDR1_Pos
 16

	)

793 

	#DWT_FUNCTION_DATAVADDR1_Msk
 (0xFUL << 
DWT_FUNCTION_DATAVADDR1_Pos
è

	)

795 

	#DWT_FUNCTION_DATAVADDR0_Pos
 12

	)

796 

	#DWT_FUNCTION_DATAVADDR0_Msk
 (0xFUL << 
DWT_FUNCTION_DATAVADDR0_Pos
è

	)

798 

	#DWT_FUNCTION_DATAVSIZE_Pos
 10

	)

799 

	#DWT_FUNCTION_DATAVSIZE_Msk
 (0x3UL << 
DWT_FUNCTION_DATAVSIZE_Pos
è

	)

801 

	#DWT_FUNCTION_LNK1ENA_Pos
 9

	)

802 

	#DWT_FUNCTION_LNK1ENA_Msk
 (0x1UL << 
DWT_FUNCTION_LNK1ENA_Pos
è

	)

804 

	#DWT_FUNCTION_DATAVMATCH_Pos
 8

	)

805 

	#DWT_FUNCTION_DATAVMATCH_Msk
 (0x1UL << 
DWT_FUNCTION_DATAVMATCH_Pos
è

	)

807 

	#DWT_FUNCTION_CYCMATCH_Pos
 7

	)

808 

	#DWT_FUNCTION_CYCMATCH_Msk
 (0x1UL << 
DWT_FUNCTION_CYCMATCH_Pos
è

	)

810 

	#DWT_FUNCTION_EMITRANGE_Pos
 5

	)

811 

	#DWT_FUNCTION_EMITRANGE_Msk
 (0x1UL << 
DWT_FUNCTION_EMITRANGE_Pos
è

	)

813 

	#DWT_FUNCTION_FUNCTION_Pos
 0

	)

814 

	#DWT_FUNCTION_FUNCTION_Msk
 (0xFUL << 
DWT_FUNCTION_FUNCTION_Pos
è

	)

829 
__IO
 
ušt32_t
 
	mSSPSR
;

830 
__IO
 
ušt32_t
 
	mCSPSR
;

831 
ušt32_t
 
	mRESERVED0
[2];

832 
__IO
 
ušt32_t
 
	mACPR
;

833 
ušt32_t
 
	mRESERVED1
[55];

834 
__IO
 
ušt32_t
 
	mSPPR
;

835 
ušt32_t
 
	mRESERVED2
[131];

836 
__I
 
ušt32_t
 
	mFFSR
;

837 
__IO
 
ušt32_t
 
	mFFCR
;

838 
__I
 
ušt32_t
 
	mFSCR
;

839 
ušt32_t
 
	mRESERVED3
[759];

840 
__I
 
ušt32_t
 
	mTRIGGER
;

841 
__I
 
ušt32_t
 
	mFIFO0
;

842 
__I
 
ušt32_t
 
	mITATBCTR2
;

843 
ušt32_t
 
	mRESERVED4
[1];

844 
__I
 
ušt32_t
 
	mITATBCTR0
;

845 
__I
 
ušt32_t
 
	mFIFO1
;

846 
__IO
 
ušt32_t
 
	mITCTRL
;

847 
ušt32_t
 
	mRESERVED5
[39];

848 
__IO
 
ušt32_t
 
	mCLAIMSET
;

849 
__IO
 
ušt32_t
 
	mCLAIMCLR
;

850 
ušt32_t
 
	mRESERVED7
[8];

851 
__I
 
ušt32_t
 
	mDEVID
;

852 
__I
 
ušt32_t
 
	mDEVTYPE
;

853 } 
	tTPI_Ty³
;

856 

	#TPI_ACPR_PRESCALER_Pos
 0

	)

857 

	#TPI_ACPR_PRESCALER_Msk
 (0x1FFFUL << 
TPI_ACPR_PRESCALER_Pos
è

	)

860 

	#TPI_SPPR_TXMODE_Pos
 0

	)

861 

	#TPI_SPPR_TXMODE_Msk
 (0x3UL << 
TPI_SPPR_TXMODE_Pos
è

	)

864 

	#TPI_FFSR_FtNÚStÝ_Pos
 3

	)

865 

	#TPI_FFSR_FtNÚStÝ_Msk
 (0x1UL << 
TPI_FFSR_FtNÚStÝ_Pos
è

	)

867 

	#TPI_FFSR_TCP»£Á_Pos
 2

	)

868 

	#TPI_FFSR_TCP»£Á_Msk
 (0x1UL << 
TPI_FFSR_TCP»£Á_Pos
è

	)

870 

	#TPI_FFSR_FtStݳd_Pos
 1

	)

871 

	#TPI_FFSR_FtStݳd_Msk
 (0x1UL << 
TPI_FFSR_FtStݳd_Pos
è

	)

873 

	#TPI_FFSR_FlInProg_Pos
 0

	)

874 

	#TPI_FFSR_FlInProg_Msk
 (0x1UL << 
TPI_FFSR_FlInProg_Pos
è

	)

877 

	#TPI_FFCR_TrigIn_Pos
 8

	)

878 

	#TPI_FFCR_TrigIn_Msk
 (0x1UL << 
TPI_FFCR_TrigIn_Pos
è

	)

880 

	#TPI_FFCR_EnFCÚt_Pos
 1

	)

881 

	#TPI_FFCR_EnFCÚt_Msk
 (0x1UL << 
TPI_FFCR_EnFCÚt_Pos
è

	)

884 

	#TPI_TRIGGER_TRIGGER_Pos
 0

	)

885 

	#TPI_TRIGGER_TRIGGER_Msk
 (0x1UL << 
TPI_TRIGGER_TRIGGER_Pos
è

	)

888 

	#TPI_FIFO0_ITM_ATVALID_Pos
 29

	)

889 

	#TPI_FIFO0_ITM_ATVALID_Msk
 (0x3UL << 
TPI_FIFO0_ITM_ATVALID_Pos
è

	)

891 

	#TPI_FIFO0_ITM_by‹couÁ_Pos
 27

	)

892 

	#TPI_FIFO0_ITM_by‹couÁ_Msk
 (0x3UL << 
TPI_FIFO0_ITM_by‹couÁ_Pos
è

	)

894 

	#TPI_FIFO0_ETM_ATVALID_Pos
 26

	)

895 

	#TPI_FIFO0_ETM_ATVALID_Msk
 (0x3UL << 
TPI_FIFO0_ETM_ATVALID_Pos
è

	)

897 

	#TPI_FIFO0_ETM_by‹couÁ_Pos
 24

	)

898 

	#TPI_FIFO0_ETM_by‹couÁ_Msk
 (0x3UL << 
TPI_FIFO0_ETM_by‹couÁ_Pos
è

	)

900 

	#TPI_FIFO0_ETM2_Pos
 16

	)

901 

	#TPI_FIFO0_ETM2_Msk
 (0xFFUL << 
TPI_FIFO0_ETM2_Pos
è

	)

903 

	#TPI_FIFO0_ETM1_Pos
 8

	)

904 

	#TPI_FIFO0_ETM1_Msk
 (0xFFUL << 
TPI_FIFO0_ETM1_Pos
è

	)

906 

	#TPI_FIFO0_ETM0_Pos
 0

	)

907 

	#TPI_FIFO0_ETM0_Msk
 (0xFFUL << 
TPI_FIFO0_ETM0_Pos
è

	)

910 

	#TPI_ITATBCTR2_ATREADY_Pos
 0

	)

911 

	#TPI_ITATBCTR2_ATREADY_Msk
 (0x1UL << 
TPI_ITATBCTR2_ATREADY_Pos
è

	)

914 

	#TPI_FIFO1_ITM_ATVALID_Pos
 29

	)

915 

	#TPI_FIFO1_ITM_ATVALID_Msk
 (0x3UL << 
TPI_FIFO1_ITM_ATVALID_Pos
è

	)

917 

	#TPI_FIFO1_ITM_by‹couÁ_Pos
 27

	)

918 

	#TPI_FIFO1_ITM_by‹couÁ_Msk
 (0x3UL << 
TPI_FIFO1_ITM_by‹couÁ_Pos
è

	)

920 

	#TPI_FIFO1_ETM_ATVALID_Pos
 26

	)

921 

	#TPI_FIFO1_ETM_ATVALID_Msk
 (0x3UL << 
TPI_FIFO1_ETM_ATVALID_Pos
è

	)

923 

	#TPI_FIFO1_ETM_by‹couÁ_Pos
 24

	)

924 

	#TPI_FIFO1_ETM_by‹couÁ_Msk
 (0x3UL << 
TPI_FIFO1_ETM_by‹couÁ_Pos
è

	)

926 

	#TPI_FIFO1_ITM2_Pos
 16

	)

927 

	#TPI_FIFO1_ITM2_Msk
 (0xFFUL << 
TPI_FIFO1_ITM2_Pos
è

	)

929 

	#TPI_FIFO1_ITM1_Pos
 8

	)

930 

	#TPI_FIFO1_ITM1_Msk
 (0xFFUL << 
TPI_FIFO1_ITM1_Pos
è

	)

932 

	#TPI_FIFO1_ITM0_Pos
 0

	)

933 

	#TPI_FIFO1_ITM0_Msk
 (0xFFUL << 
TPI_FIFO1_ITM0_Pos
è

	)

936 

	#TPI_ITATBCTR0_ATREADY_Pos
 0

	)

937 

	#TPI_ITATBCTR0_ATREADY_Msk
 (0x1UL << 
TPI_ITATBCTR0_ATREADY_Pos
è

	)

940 

	#TPI_ITCTRL_Mode_Pos
 0

	)

941 

	#TPI_ITCTRL_Mode_Msk
 (0x1UL << 
TPI_ITCTRL_Mode_Pos
è

	)

944 

	#TPI_DEVID_NRZVALID_Pos
 11

	)

945 

	#TPI_DEVID_NRZVALID_Msk
 (0x1UL << 
TPI_DEVID_NRZVALID_Pos
è

	)

947 

	#TPI_DEVID_MANCVALID_Pos
 10

	)

948 

	#TPI_DEVID_MANCVALID_Msk
 (0x1UL << 
TPI_DEVID_MANCVALID_Pos
è

	)

950 

	#TPI_DEVID_PTINVALID_Pos
 9

	)

951 

	#TPI_DEVID_PTINVALID_Msk
 (0x1UL << 
TPI_DEVID_PTINVALID_Pos
è

	)

953 

	#TPI_DEVID_MšBufSz_Pos
 6

	)

954 

	#TPI_DEVID_MšBufSz_Msk
 (0x7UL << 
TPI_DEVID_MšBufSz_Pos
è

	)

956 

	#TPI_DEVID_AsynClkIn_Pos
 5

	)

957 

	#TPI_DEVID_AsynClkIn_Msk
 (0x1UL << 
TPI_DEVID_AsynClkIn_Pos
è

	)

959 

	#TPI_DEVID_NrT¿ûIÅut_Pos
 0

	)

960 

	#TPI_DEVID_NrT¿ûIÅut_Msk
 (0x1FUL << 
TPI_DEVID_NrT¿ûIÅut_Pos
è

	)

963 

	#TPI_DEVTYPE_SubTy³_Pos
 0

	)

964 

	#TPI_DEVTYPE_SubTy³_Msk
 (0xFUL << 
TPI_DEVTYPE_SubTy³_Pos
è

	)

966 

	#TPI_DEVTYPE_MajÜTy³_Pos
 4

	)

967 

	#TPI_DEVTYPE_MajÜTy³_Msk
 (0xFUL << 
TPI_DEVTYPE_MajÜTy³_Pos
è

	)

972 #ià(
__MPU_PRESENT
 == 1)

983 
__I
 
ušt32_t
 
	mTYPE
;

984 
__IO
 
ušt32_t
 
	mCTRL
;

985 
__IO
 
ušt32_t
 
	mRNR
;

986 
__IO
 
ušt32_t
 
	mRBAR
;

987 
__IO
 
ušt32_t
 
	mRASR
;

988 
__IO
 
ušt32_t
 
	mRBAR_A1
;

989 
__IO
 
ušt32_t
 
	mRASR_A1
;

990 
__IO
 
ušt32_t
 
	mRBAR_A2
;

991 
__IO
 
ušt32_t
 
	mRASR_A2
;

992 
__IO
 
ušt32_t
 
	mRBAR_A3
;

993 
__IO
 
ušt32_t
 
	mRASR_A3
;

994 } 
	tMPU_Ty³
;

997 

	#MPU_TYPE_IREGION_Pos
 16

	)

998 

	#MPU_TYPE_IREGION_Msk
 (0xFFUL << 
MPU_TYPE_IREGION_Pos
è

	)

1000 

	#MPU_TYPE_DREGION_Pos
 8

	)

1001 

	#MPU_TYPE_DREGION_Msk
 (0xFFUL << 
MPU_TYPE_DREGION_Pos
è

	)

1003 

	#MPU_TYPE_SEPARATE_Pos
 0

	)

1004 

	#MPU_TYPE_SEPARATE_Msk
 (1UL << 
MPU_TYPE_SEPARATE_Pos
è

	)

1007 

	#MPU_CTRL_PRIVDEFENA_Pos
 2

	)

1008 

	#MPU_CTRL_PRIVDEFENA_Msk
 (1UL << 
MPU_CTRL_PRIVDEFENA_Pos
è

	)

1010 

	#MPU_CTRL_HFNMIENA_Pos
 1

	)

1011 

	#MPU_CTRL_HFNMIENA_Msk
 (1UL << 
MPU_CTRL_HFNMIENA_Pos
è

	)

1013 

	#MPU_CTRL_ENABLE_Pos
 0

	)

1014 

	#MPU_CTRL_ENABLE_Msk
 (1UL << 
MPU_CTRL_ENABLE_Pos
è

	)

1017 

	#MPU_RNR_REGION_Pos
 0

	)

1018 

	#MPU_RNR_REGION_Msk
 (0xFFUL << 
MPU_RNR_REGION_Pos
è

	)

1021 

	#MPU_RBAR_ADDR_Pos
 5

	)

1022 

	#MPU_RBAR_ADDR_Msk
 (0x7FFFFFFUL << 
MPU_RBAR_ADDR_Pos
è

	)

1024 

	#MPU_RBAR_VALID_Pos
 4

	)

1025 

	#MPU_RBAR_VALID_Msk
 (1UL << 
MPU_RBAR_VALID_Pos
è

	)

1027 

	#MPU_RBAR_REGION_Pos
 0

	)

1028 

	#MPU_RBAR_REGION_Msk
 (0xFUL << 
MPU_RBAR_REGION_Pos
è

	)

1031 

	#MPU_RASR_ATTRS_Pos
 16

	)

1032 

	#MPU_RASR_ATTRS_Msk
 (0xFFFFUL << 
MPU_RASR_ATTRS_Pos
è

	)

1034 

	#MPU_RASR_SRD_Pos
 8

	)

1035 

	#MPU_RASR_SRD_Msk
 (0xFFUL << 
MPU_RASR_SRD_Pos
è

	)

1037 

	#MPU_RASR_SIZE_Pos
 1

	)

1038 

	#MPU_RASR_SIZE_Msk
 (0x1FUL << 
MPU_RASR_SIZE_Pos
è

	)

1040 

	#MPU_RASR_ENABLE_Pos
 0

	)

1041 

	#MPU_RASR_ENABLE_Msk
 (1UL << 
MPU_RASR_ENABLE_Pos
è

	)

1057 
__IO
 
ušt32_t
 
	mDHCSR
;

1058 
__O
 
ušt32_t
 
	mDCRSR
;

1059 
__IO
 
ušt32_t
 
	mDCRDR
;

1060 
__IO
 
ušt32_t
 
	mDEMCR
;

1061 } 
	tCÜeDebug_Ty³
;

1064 

	#CÜeDebug_DHCSR_DBGKEY_Pos
 16

	)

1065 

	#CÜeDebug_DHCSR_DBGKEY_Msk
 (0xFFFFUL << 
CÜeDebug_DHCSR_DBGKEY_Pos
è

	)

1067 

	#CÜeDebug_DHCSR_S_RESET_ST_Pos
 25

	)

1068 

	#CÜeDebug_DHCSR_S_RESET_ST_Msk
 (1UL << 
CÜeDebug_DHCSR_S_RESET_ST_Pos
è

	)

1070 

	#CÜeDebug_DHCSR_S_RETIRE_ST_Pos
 24

	)

1071 

	#CÜeDebug_DHCSR_S_RETIRE_ST_Msk
 (1UL << 
CÜeDebug_DHCSR_S_RETIRE_ST_Pos
è

	)

1073 

	#CÜeDebug_DHCSR_S_LOCKUP_Pos
 19

	)

1074 

	#CÜeDebug_DHCSR_S_LOCKUP_Msk
 (1UL << 
CÜeDebug_DHCSR_S_LOCKUP_Pos
è

	)

1076 

	#CÜeDebug_DHCSR_S_SLEEP_Pos
 18

	)

1077 

	#CÜeDebug_DHCSR_S_SLEEP_Msk
 (1UL << 
CÜeDebug_DHCSR_S_SLEEP_Pos
è

	)

1079 

	#CÜeDebug_DHCSR_S_HALT_Pos
 17

	)

1080 

	#CÜeDebug_DHCSR_S_HALT_Msk
 (1UL << 
CÜeDebug_DHCSR_S_HALT_Pos
è

	)

1082 

	#CÜeDebug_DHCSR_S_REGRDY_Pos
 16

	)

1083 

	#CÜeDebug_DHCSR_S_REGRDY_Msk
 (1UL << 
CÜeDebug_DHCSR_S_REGRDY_Pos
è

	)

1085 

	#CÜeDebug_DHCSR_C_SNAPSTALL_Pos
 5

	)

1086 

	#CÜeDebug_DHCSR_C_SNAPSTALL_Msk
 (1UL << 
CÜeDebug_DHCSR_C_SNAPSTALL_Pos
è

	)

1088 

	#CÜeDebug_DHCSR_C_MASKINTS_Pos
 3

	)

1089 

	#CÜeDebug_DHCSR_C_MASKINTS_Msk
 (1UL << 
CÜeDebug_DHCSR_C_MASKINTS_Pos
è

	)

1091 

	#CÜeDebug_DHCSR_C_STEP_Pos
 2

	)

1092 

	#CÜeDebug_DHCSR_C_STEP_Msk
 (1UL << 
CÜeDebug_DHCSR_C_STEP_Pos
è

	)

1094 

	#CÜeDebug_DHCSR_C_HALT_Pos
 1

	)

1095 

	#CÜeDebug_DHCSR_C_HALT_Msk
 (1UL << 
CÜeDebug_DHCSR_C_HALT_Pos
è

	)

1097 

	#CÜeDebug_DHCSR_C_DEBUGEN_Pos
 0

	)

1098 

	#CÜeDebug_DHCSR_C_DEBUGEN_Msk
 (1UL << 
CÜeDebug_DHCSR_C_DEBUGEN_Pos
è

	)

1101 

	#CÜeDebug_DCRSR_REGWnR_Pos
 16

	)

1102 

	#CÜeDebug_DCRSR_REGWnR_Msk
 (1UL << 
CÜeDebug_DCRSR_REGWnR_Pos
è

	)

1104 

	#CÜeDebug_DCRSR_REGSEL_Pos
 0

	)

1105 

	#CÜeDebug_DCRSR_REGSEL_Msk
 (0x1FUL << 
CÜeDebug_DCRSR_REGSEL_Pos
è

	)

1108 

	#CÜeDebug_DEMCR_TRCENA_Pos
 24

	)

1109 

	#CÜeDebug_DEMCR_TRCENA_Msk
 (1UL << 
CÜeDebug_DEMCR_TRCENA_Pos
è

	)

1111 

	#CÜeDebug_DEMCR_MON_REQ_Pos
 19

	)

1112 

	#CÜeDebug_DEMCR_MON_REQ_Msk
 (1UL << 
CÜeDebug_DEMCR_MON_REQ_Pos
è

	)

1114 

	#CÜeDebug_DEMCR_MON_STEP_Pos
 18

	)

1115 

	#CÜeDebug_DEMCR_MON_STEP_Msk
 (1UL << 
CÜeDebug_DEMCR_MON_STEP_Pos
è

	)

1117 

	#CÜeDebug_DEMCR_MON_PEND_Pos
 17

	)

1118 

	#CÜeDebug_DEMCR_MON_PEND_Msk
 (1UL << 
CÜeDebug_DEMCR_MON_PEND_Pos
è

	)

1120 

	#CÜeDebug_DEMCR_MON_EN_Pos
 16

	)

1121 

	#CÜeDebug_DEMCR_MON_EN_Msk
 (1UL << 
CÜeDebug_DEMCR_MON_EN_Pos
è

	)

1123 

	#CÜeDebug_DEMCR_VC_HARDERR_Pos
 10

	)

1124 

	#CÜeDebug_DEMCR_VC_HARDERR_Msk
 (1UL << 
CÜeDebug_DEMCR_VC_HARDERR_Pos
è

	)

1126 

	#CÜeDebug_DEMCR_VC_INTERR_Pos
 9

	)

1127 

	#CÜeDebug_DEMCR_VC_INTERR_Msk
 (1UL << 
CÜeDebug_DEMCR_VC_INTERR_Pos
è

	)

1129 

	#CÜeDebug_DEMCR_VC_BUSERR_Pos
 8

	)

1130 

	#CÜeDebug_DEMCR_VC_BUSERR_Msk
 (1UL << 
CÜeDebug_DEMCR_VC_BUSERR_Pos
è

	)

1132 

	#CÜeDebug_DEMCR_VC_STATERR_Pos
 7

	)

1133 

	#CÜeDebug_DEMCR_VC_STATERR_Msk
 (1UL << 
CÜeDebug_DEMCR_VC_STATERR_Pos
è

	)

1135 

	#CÜeDebug_DEMCR_VC_CHKERR_Pos
 6

	)

1136 

	#CÜeDebug_DEMCR_VC_CHKERR_Msk
 (1UL << 
CÜeDebug_DEMCR_VC_CHKERR_Pos
è

	)

1138 

	#CÜeDebug_DEMCR_VC_NOCPERR_Pos
 5

	)

1139 

	#CÜeDebug_DEMCR_VC_NOCPERR_Msk
 (1UL << 
CÜeDebug_DEMCR_VC_NOCPERR_Pos
è

	)

1141 

	#CÜeDebug_DEMCR_VC_MMERR_Pos
 4

	)

1142 

	#CÜeDebug_DEMCR_VC_MMERR_Msk
 (1UL << 
CÜeDebug_DEMCR_VC_MMERR_Pos
è

	)

1144 

	#CÜeDebug_DEMCR_VC_CORERESET_Pos
 0

	)

1145 

	#CÜeDebug_DEMCR_VC_CORERESET_Msk
 (1UL << 
CÜeDebug_DEMCR_VC_CORERESET_Pos
è

	)

1157 

	#SCS_BASE
 (0xE000E000ULè

	)

1158 

	#ITM_BASE
 (0xE0000000ULè

	)

1159 

	#DWT_BASE
 (0xE0001000ULè

	)

1160 

	#TPI_BASE
 (0xE0040000ULè

	)

1161 

	#CÜeDebug_BASE
 (0xE000EDF0ULè

	)

1162 

	#SysTick_BASE
 (
SCS_BASE
 + 0x0010ULè

	)

1163 

	#NVIC_BASE
 (
SCS_BASE
 + 0x0100ULè

	)

1164 

	#SCB_BASE
 (
SCS_BASE
 + 0x0D00ULè

	)

1166 

	#SCnSCB
 ((
SCnSCB_Ty³
 *è
SCS_BASE
 )

	)

1167 

	#SCB
 ((
SCB_Ty³
 *è
SCB_BASE
 )

	)

1168 

	#SysTick
 ((
SysTick_Ty³
 *è
SysTick_BASE
 )

	)

1169 

	#NVIC
 ((
NVIC_Ty³
 *è
NVIC_BASE
 )

	)

1170 

	#ITM
 ((
ITM_Ty³
 *è
ITM_BASE
 )

	)

1171 

	#DWT
 ((
DWT_Ty³
 *è
DWT_BASE
 )

	)

1172 

	#TPI
 ((
TPI_Ty³
 *è
TPI_BASE
 )

	)

1173 

	#CÜeDebug
 ((
CÜeDebug_Ty³
 *è
CÜeDebug_BASE
è

	)

1175 #ià(
__MPU_PRESENT
 == 1)

1176 

	#MPU_BASE
 (
SCS_BASE
 + 0x0D90ULè

	)

1177 

	#MPU
 ((
MPU_Ty³
 *è
MPU_BASE
 )

	)

1214 
__STATIC_INLINE
 
	$NVIC_S‘PriÜ™yGroupšg
(
ušt32_t
 
PriܙyGroup
)

1216 
ušt32_t
 
»g_v®ue
;

1217 
ušt32_t
 
PriܙyGroupTmp
 = (
PriܙyGroup
 & (uint32_t)0x07);

1219 
»g_v®ue
 = 
SCB
->
AIRCR
;

1220 
»g_v®ue
 &ð~(
SCB_AIRCR_VECTKEY_Msk
 | 
SCB_AIRCR_PRIGROUP_Msk
);

1221 
»g_v®ue
 = (reg_value |

1222 ((
ušt32_t
)0x5FA << 
SCB_AIRCR_VECTKEY_Pos
) |

1223 (
PriܙyGroupTmp
 << 8));

1224 
SCB
->
AIRCR
 = 
»g_v®ue
;

1225 
	}
}

1234 
__STATIC_INLINE
 
ušt32_t
 
	$NVIC_G‘PriÜ™yGroupšg
()

1236  ((
SCB
->
AIRCR
 & 
SCB_AIRCR_PRIGROUP_Msk
è>> 
SCB_AIRCR_PRIGROUP_Pos
);

1237 
	}
}

1246 
__STATIC_INLINE
 
	$NVIC_EÇbËIRQ
(
IRQn_Ty³
 
IRQn
)

1248 
NVIC
->
ISER
[((
ušt32_t
)(
IRQn
) >> 5)] = (1 << ((uint32_t)(IRQn) & 0x1F));

1249 
	}
}

1258 
__STATIC_INLINE
 
	$NVIC_Di§bËIRQ
(
IRQn_Ty³
 
IRQn
)

1260 
NVIC
->
ICER
[((
ušt32_t
)(
IRQn
) >> 5)] = (1 << ((uint32_t)(IRQn) & 0x1F));

1261 
	}
}

1274 
__STATIC_INLINE
 
ušt32_t
 
	$NVIC_G‘P’dšgIRQ
(
IRQn_Ty³
 
IRQn
)

1276 ((
ušt32_t
è((
NVIC
->
ISPR
[(ušt32_t)(
IRQn
) >> 5] & (1 << ((uint32_t)(IRQn) & 0x1F)))?1:0));

1277 
	}
}

1286 
__STATIC_INLINE
 
	$NVIC_S‘P’dšgIRQ
(
IRQn_Ty³
 
IRQn
)

1288 
NVIC
->
ISPR
[((
ušt32_t
)(
IRQn
) >> 5)] = (1 << ((uint32_t)(IRQn) & 0x1F));

1289 
	}
}

1298 
__STATIC_INLINE
 
	$NVIC_CˬP’dšgIRQ
(
IRQn_Ty³
 
IRQn
)

1300 
NVIC
->
ICPR
[((
ušt32_t
)(
IRQn
) >> 5)] = (1 << ((uint32_t)(IRQn) & 0x1F));

1301 
	}
}

1313 
__STATIC_INLINE
 
ušt32_t
 
	$NVIC_G‘Aùive
(
IRQn_Ty³
 
IRQn
)

1315 ((
ušt32_t
)((
NVIC
->
IABR
[(ušt32_t)(
IRQn
) >> 5] & (1 << ((uint32_t)(IRQn) & 0x1F)))?1:0));

1316 
	}
}

1328 
__STATIC_INLINE
 
	$NVIC_S‘PriÜ™y
(
IRQn_Ty³
 
IRQn
, 
ušt32_t
 
´iÜ™y
)

1330 if(
IRQn
 < 0) {

1331 
SCB
->
SHP
[((
ušt32_t
)(
IRQn
è& 0xF)-4] = ((
´iÜ™y
 << (8 - 
__NVIC_PRIO_BITS
)) & 0xff); }

1333 
NVIC
->
IP
[(
ušt32_t
)(
IRQn
)] = ((
´iÜ™y
 << (8 - 
__NVIC_PRIO_BITS
)) & 0xff); }

1334 
	}
}

1348 
__STATIC_INLINE
 
ušt32_t
 
	$NVIC_G‘PriÜ™y
(
IRQn_Ty³
 
IRQn
)

1351 if(
IRQn
 < 0) {

1352 ((
ušt32_t
)(
SCB
->
SHP
[((ušt32_t)(
IRQn
è& 0xF)-4] >> (8 - 
__NVIC_PRIO_BITS
))); }

1354 ((
ušt32_t
)(
NVIC
->
IP
[(ušt32_t)(
IRQn
)] >> (8 - 
__NVIC_PRIO_BITS
))); }

1355 
	}
}

1370 
__STATIC_INLINE
 
ušt32_t
 
	$NVIC_EncodePriܙy
 (
ušt32_t
 
PriܙyGroup
, ušt32_ˆ
P»em±PriÜ™y
, ušt32_ˆ
SubPriܙy
)

1372 
ušt32_t
 
PriܙyGroupTmp
 = (
PriܙyGroup
 & 0x07);

1373 
ušt32_t
 
P»em±PriÜ™yB™s
;

1374 
ušt32_t
 
SubPriÜ™yB™s
;

1376 
P»em±PriÜ™yB™s
 = ((7 - 
PriܙyGroupTmp
è> 
__NVIC_PRIO_BITS
) ? __NVIC_PRIO_BITS : 7 - PriorityGroupTmp;

1377 
SubPriÜ™yB™s
 = ((
PriܙyGroupTmp
 + 
__NVIC_PRIO_BITS
) < 7) ? 0 : PriorityGroupTmp - 7 + __NVIC_PRIO_BITS;

1380 ((
P»em±PriÜ™y
 & ((1 << (
P»em±PriÜ™yB™s
)è- 1)è<< 
SubPriÜ™yB™s
) |

1381 ((
SubPriܙy
 & ((1 << (
SubPriÜ™yB™s
 )) - 1)))

1383 
	}
}

1398 
__STATIC_INLINE
 
	$NVIC_DecodePriܙy
 (
ušt32_t
 
Priܙy
, ušt32_ˆ
PriܙyGroup
, ušt32_t* 
pP»em±PriÜ™y
, ušt32_t* 
pSubPriܙy
)

1400 
ušt32_t
 
PriܙyGroupTmp
 = (
PriܙyGroup
 & 0x07);

1401 
ušt32_t
 
P»em±PriÜ™yB™s
;

1402 
ušt32_t
 
SubPriÜ™yB™s
;

1404 
P»em±PriÜ™yB™s
 = ((7 - 
PriܙyGroupTmp
è> 
__NVIC_PRIO_BITS
) ? __NVIC_PRIO_BITS : 7 - PriorityGroupTmp;

1405 
SubPriÜ™yB™s
 = ((
PriܙyGroupTmp
 + 
__NVIC_PRIO_BITS
) < 7) ? 0 : PriorityGroupTmp - 7 + __NVIC_PRIO_BITS;

1407 *
pP»em±PriÜ™y
 = (
Priܙy
 >> 
SubPriÜ™yB™s
è& ((1 << (
P»em±PriÜ™yB™s
)) - 1);

1408 *
pSubPriܙy
 = (
Priܙy
 ) & ((1 << (
SubPriÜ™yB™s
 )) - 1);

1409 
	}
}

1416 
__STATIC_INLINE
 
	$NVIC_Sy¡emRe£t
()

1418 
	`__DSB
();

1420 
SCB
->
AIRCR
 = ((0x5FA << 
SCB_AIRCR_VECTKEY_Pos
) |

1421 (
SCB
->
AIRCR
 & 
SCB_AIRCR_PRIGROUP_Msk
) |

1422 
SCB_AIRCR_SYSRESETREQ_Msk
);

1423 
	`__DSB
();

1425 
	}
}

1438 #ià(
__V’dÜ_SysTickCÚfig
 == 0)

1455 
__STATIC_INLINE
 
ušt32_t
 
	$SysTick_CÚfig
(
ušt32_t
 
ticks
)

1457 ià(
ticks
 > 
SysTick_LOAD_RELOAD_Msk
)  (1);

1459 
SysTick
->
LOAD
 = (
ticks
 & 
SysTick_LOAD_RELOAD_Msk
) - 1;

1460 
	`NVIC_S‘PriÜ™y
 (
SysTick_IRQn
, (1<<
__NVIC_PRIO_BITS
) - 1);

1461 
SysTick
->
VAL
 = 0;

1462 
SysTick
->
CTRL
 = 
SysTick_CTRL_CLKSOURCE_Msk
 |

1463 
SysTick_CTRL_TICKINT_Msk
 |

1464 
SysTick_CTRL_ENABLE_Msk
;

1466 
	}
}

1481 
vÞ©ž
št32_t
 
ITM_RxBufãr
;

1482 

	#ITM_RXBUFFER_EMPTY
 0x5AA55AA5

	)

1495 
__STATIC_INLINE
 
ušt32_t
 
	$ITM_S’dCh¬
 (
ušt32_t
 
ch
)

1497 ià((
ITM
->
TCR
 & 
ITM_TCR_ITMENA_Msk
) &&

1498 (
ITM
->
TER
 & (1UL << 0) ) )

1500 
ITM
->
PORT
[0].
u32
 == 0);

1501 
ITM
->
PORT
[0].
u8
 = (
ušt8_t
è
ch
;

1503  (
ch
);

1504 
	}
}

1514 
__STATIC_INLINE
 
št32_t
 
	$ITM_ReûiveCh¬
 () {

1515 
št32_t
 
ch
 = -1;

1517 ià(
ITM_RxBufãr
 !ð
ITM_RXBUFFER_EMPTY
) {

1518 
ch
 = 
ITM_RxBufãr
;

1519 
ITM_RxBufãr
 = 
ITM_RXBUFFER_EMPTY
;

1522  (
ch
);

1523 
	}
}

1533 
__STATIC_INLINE
 
št32_t
 
	$ITM_CheckCh¬
 () {

1535 ià(
ITM_RxBufãr
 =ð
ITM_RXBUFFER_EMPTY
) {

1540 
	}
}

1548 #ifdeà
__ýlu¥lus


	@C:\Users\Victor\EMBITZ~1\STM32W~1\inc\STM32F~1.H

56 #iâdeà
__STM32F10x_H


57 

	#__STM32F10x_H


	)

59 #ifdeà
__ýlu¥lus


71 #ià!
defšed
 (
STM32F10X_LD
è&& !defšed (
STM32F10X_LD_VL
è&& !defšed (
STM32F10X_MD
è&& !defšed (
STM32F10X_MD_VL
è&& !defšed (
STM32F10X_HD
è&& !defšed (
STM32F10X_HD_VL
è&& !defšed (
STM32F10X_XL
è&& !defšed (
STM32F10X_CL
)

101 #ià!
defšed
 (
STM32F10X_LD
è&& !defšed (
STM32F10X_LD_VL
è&& !defšed (
STM32F10X_MD
è&& !defšed (
STM32F10X_MD_VL
è&& !defšed (
STM32F10X_HD
è&& !defšed (
STM32F10X_HD_VL
è&& !defšed (
STM32F10X_XL
è&& !defšed (
STM32F10X_CL
)

105 #ià!
defšed
 (
USE_STDPERIPH_DRIVER
)

121 #ià!
defšed
 
HSE_VALUE


122 #ifdeà
STM32F10X_CL


123 

	#HSE_VALUE
 ((
ušt32_t
)25000000è

	)

125 

	#HSE_VALUE
 ((
ušt32_t
)8000000è

	)

133 #ià!
defšed
 (
HSE_STARTUP_TIMEOUT
)

134 

	#HSE_STARTUP_TIMEOUT
 ((
ušt16_t
)0x0500è

	)

137 #ià!
defšed
 (
HSI_VALUE
)

138 

	#HSI_VALUE
 ((
ušt32_t
)8000000è

	)

144 

	#__STM32F10X_STDPERIPH_VERSION_MAIN
 (0x03è

	)

145 

	#__STM32F10X_STDPERIPH_VERSION_SUB1
 (0x06è

	)

146 

	#__STM32F10X_STDPERIPH_VERSION_SUB2
 (0x01è

	)

147 

	#__STM32F10X_STDPERIPH_VERSION_RC
 (0x00è

	)

148 

	#__STM32F10X_STDPERIPH_VERSION
 ((
__STM32F10X_STDPERIPH_VERSION_MAIN
 << 24)\

149 |(
__STM32F10X_STDPERIPH_VERSION_SUB1
 << 16)\

150 |(
__STM32F10X_STDPERIPH_VERSION_SUB2
 << 8)\

151 |(
__STM32F10X_STDPERIPH_VERSION_RC
))

	)

164 #ifdeà
STM32F10X_XL


165 

	#__MPU_PRESENT
 1

	)

167 

	#__MPU_PRESENT
 0

	)

169 

	#__CM3_REV
 0x0200

	)

170 

	#__NVIC_PRIO_BITS
 4

	)

171 

	#__V’dÜ_SysTickCÚfig
 0

	)

177 
	eIRQn


180 
NÚMaskabËIÁ_IRQn
 = -14,

181 
MemÜyMªagem’t_IRQn
 = -12,

182 
BusFauÉ_IRQn
 = -11,

183 
U§geFauÉ_IRQn
 = -10,

184 
SVC®l_IRQn
 = -5,

185 
DebugMÚ™Ü_IRQn
 = -4,

186 
P’dSV_IRQn
 = -2,

187 
SysTick_IRQn
 = -1,

190 
WWDG_IRQn
 = 0,

191 
PVD_IRQn
 = 1,

192 
TAMPER_IRQn
 = 2,

193 
RTC_IRQn
 = 3,

194 
FLASH_IRQn
 = 4,

195 
RCC_IRQn
 = 5,

196 
EXTI0_IRQn
 = 6,

197 
EXTI1_IRQn
 = 7,

198 
EXTI2_IRQn
 = 8,

199 
EXTI3_IRQn
 = 9,

200 
EXTI4_IRQn
 = 10,

201 
DMA1_ChªÃl1_IRQn
 = 11,

202 
DMA1_ChªÃl2_IRQn
 = 12,

203 
DMA1_ChªÃl3_IRQn
 = 13,

204 
DMA1_ChªÃl4_IRQn
 = 14,

205 
DMA1_ChªÃl5_IRQn
 = 15,

206 
DMA1_ChªÃl6_IRQn
 = 16,

207 
DMA1_ChªÃl7_IRQn
 = 17,

209 #ifdeà
STM32F10X_LD


210 
ADC1_2_IRQn
 = 18,

211 
USB_HP_CAN1_TX_IRQn
 = 19,

212 
USB_LP_CAN1_RX0_IRQn
 = 20,

213 
CAN1_RX1_IRQn
 = 21,

214 
CAN1_SCE_IRQn
 = 22,

215 
EXTI9_5_IRQn
 = 23,

216 
TIM1_BRK_IRQn
 = 24,

217 
TIM1_UP_IRQn
 = 25,

218 
TIM1_TRG_COM_IRQn
 = 26,

219 
TIM1_CC_IRQn
 = 27,

220 
TIM2_IRQn
 = 28,

221 
TIM3_IRQn
 = 29,

222 
I2C1_EV_IRQn
 = 31,

223 
I2C1_ER_IRQn
 = 32,

224 
SPI1_IRQn
 = 35,

225 
USART1_IRQn
 = 37,

226 
USART2_IRQn
 = 38,

227 
EXTI15_10_IRQn
 = 40,

228 
RTCAÏrm_IRQn
 = 41,

229 
USBWakeUp_IRQn
 = 42

232 #ifdeà
STM32F10X_LD_VL


233 
ADC1_IRQn
 = 18,

234 
EXTI9_5_IRQn
 = 23,

235 
TIM1_BRK_TIM15_IRQn
 = 24,

236 
TIM1_UP_TIM16_IRQn
 = 25,

237 
TIM1_TRG_COM_TIM17_IRQn
 = 26,

238 
TIM1_CC_IRQn
 = 27,

239 
TIM2_IRQn
 = 28,

240 
TIM3_IRQn
 = 29,

241 
I2C1_EV_IRQn
 = 31,

242 
I2C1_ER_IRQn
 = 32,

243 
SPI1_IRQn
 = 35,

244 
USART1_IRQn
 = 37,

245 
USART2_IRQn
 = 38,

246 
EXTI15_10_IRQn
 = 40,

247 
RTCAÏrm_IRQn
 = 41,

248 
CEC_IRQn
 = 42,

249 
TIM6_DAC_IRQn
 = 54,

250 
TIM7_IRQn
 = 55

253 #ifdeà
STM32F10X_MD


254 
ADC1_2_IRQn
 = 18,

255 
USB_HP_CAN1_TX_IRQn
 = 19,

256 
USB_LP_CAN1_RX0_IRQn
 = 20,

257 
CAN1_RX1_IRQn
 = 21,

258 
CAN1_SCE_IRQn
 = 22,

259 
EXTI9_5_IRQn
 = 23,

260 
TIM1_BRK_IRQn
 = 24,

261 
TIM1_UP_IRQn
 = 25,

262 
TIM1_TRG_COM_IRQn
 = 26,

263 
TIM1_CC_IRQn
 = 27,

264 
TIM2_IRQn
 = 28,

265 
TIM3_IRQn
 = 29,

266 
TIM4_IRQn
 = 30,

267 
I2C1_EV_IRQn
 = 31,

268 
I2C1_ER_IRQn
 = 32,

269 
I2C2_EV_IRQn
 = 33,

270 
I2C2_ER_IRQn
 = 34,

271 
SPI1_IRQn
 = 35,

272 
SPI2_IRQn
 = 36,

273 
USART1_IRQn
 = 37,

274 
USART2_IRQn
 = 38,

275 
USART3_IRQn
 = 39,

276 
EXTI15_10_IRQn
 = 40,

277 
RTCAÏrm_IRQn
 = 41,

278 
USBWakeUp_IRQn
 = 42

281 #ifdeà
STM32F10X_MD_VL


282 
ADC1_IRQn
 = 18,

283 
EXTI9_5_IRQn
 = 23,

284 
TIM1_BRK_TIM15_IRQn
 = 24,

285 
TIM1_UP_TIM16_IRQn
 = 25,

286 
TIM1_TRG_COM_TIM17_IRQn
 = 26,

287 
TIM1_CC_IRQn
 = 27,

288 
TIM2_IRQn
 = 28,

289 
TIM3_IRQn
 = 29,

290 
TIM4_IRQn
 = 30,

291 
I2C1_EV_IRQn
 = 31,

292 
I2C1_ER_IRQn
 = 32,

293 
I2C2_EV_IRQn
 = 33,

294 
I2C2_ER_IRQn
 = 34,

295 
SPI1_IRQn
 = 35,

296 
SPI2_IRQn
 = 36,

297 
USART1_IRQn
 = 37,

298 
USART2_IRQn
 = 38,

299 
USART3_IRQn
 = 39,

300 
EXTI15_10_IRQn
 = 40,

301 
RTCAÏrm_IRQn
 = 41,

302 
CEC_IRQn
 = 42,

303 
TIM6_DAC_IRQn
 = 54,

304 
TIM7_IRQn
 = 55

307 #ifdeà
STM32F10X_HD


308 
ADC1_2_IRQn
 = 18,

309 
USB_HP_CAN1_TX_IRQn
 = 19,

310 
USB_LP_CAN1_RX0_IRQn
 = 20,

311 
CAN1_RX1_IRQn
 = 21,

312 
CAN1_SCE_IRQn
 = 22,

313 
EXTI9_5_IRQn
 = 23,

314 
TIM1_BRK_IRQn
 = 24,

315 
TIM1_UP_IRQn
 = 25,

316 
TIM1_TRG_COM_IRQn
 = 26,

317 
TIM1_CC_IRQn
 = 27,

318 
TIM2_IRQn
 = 28,

319 
TIM3_IRQn
 = 29,

320 
TIM4_IRQn
 = 30,

321 
I2C1_EV_IRQn
 = 31,

322 
I2C1_ER_IRQn
 = 32,

323 
I2C2_EV_IRQn
 = 33,

324 
I2C2_ER_IRQn
 = 34,

325 
SPI1_IRQn
 = 35,

326 
SPI2_IRQn
 = 36,

327 
USART1_IRQn
 = 37,

328 
USART2_IRQn
 = 38,

329 
USART3_IRQn
 = 39,

330 
EXTI15_10_IRQn
 = 40,

331 
RTCAÏrm_IRQn
 = 41,

332 
USBWakeUp_IRQn
 = 42,

333 
TIM8_BRK_IRQn
 = 43,

334 
TIM8_UP_IRQn
 = 44,

335 
TIM8_TRG_COM_IRQn
 = 45,

336 
TIM8_CC_IRQn
 = 46,

337 
ADC3_IRQn
 = 47,

338 
FSMC_IRQn
 = 48,

339 
SDIO_IRQn
 = 49,

340 
TIM5_IRQn
 = 50,

341 
SPI3_IRQn
 = 51,

342 
UART4_IRQn
 = 52,

343 
UART5_IRQn
 = 53,

344 
TIM6_IRQn
 = 54,

345 
TIM7_IRQn
 = 55,

346 
DMA2_ChªÃl1_IRQn
 = 56,

347 
DMA2_ChªÃl2_IRQn
 = 57,

348 
DMA2_ChªÃl3_IRQn
 = 58,

349 
DMA2_ChªÃl4_5_IRQn
 = 59

352 #ifdeà
STM32F10X_HD_VL


353 
ADC1_IRQn
 = 18,

354 
EXTI9_5_IRQn
 = 23,

355 
TIM1_BRK_TIM15_IRQn
 = 24,

356 
TIM1_UP_TIM16_IRQn
 = 25,

357 
TIM1_TRG_COM_TIM17_IRQn
 = 26,

358 
TIM1_CC_IRQn
 = 27,

359 
TIM2_IRQn
 = 28,

360 
TIM3_IRQn
 = 29,

361 
TIM4_IRQn
 = 30,

362 
I2C1_EV_IRQn
 = 31,

363 
I2C1_ER_IRQn
 = 32,

364 
I2C2_EV_IRQn
 = 33,

365 
I2C2_ER_IRQn
 = 34,

366 
SPI1_IRQn
 = 35,

367 
SPI2_IRQn
 = 36,

368 
USART1_IRQn
 = 37,

369 
USART2_IRQn
 = 38,

370 
USART3_IRQn
 = 39,

371 
EXTI15_10_IRQn
 = 40,

372 
RTCAÏrm_IRQn
 = 41,

373 
CEC_IRQn
 = 42,

374 
TIM12_IRQn
 = 43,

375 
TIM13_IRQn
 = 44,

376 
TIM14_IRQn
 = 45,

377 
TIM5_IRQn
 = 50,

378 
SPI3_IRQn
 = 51,

379 
UART4_IRQn
 = 52,

380 
UART5_IRQn
 = 53,

381 
TIM6_DAC_IRQn
 = 54,

382 
TIM7_IRQn
 = 55,

383 
DMA2_ChªÃl1_IRQn
 = 56,

384 
DMA2_ChªÃl2_IRQn
 = 57,

385 
DMA2_ChªÃl3_IRQn
 = 58,

386 
DMA2_ChªÃl4_5_IRQn
 = 59,

387 
DMA2_ChªÃl5_IRQn
 = 60

392 #ifdeà
STM32F10X_XL


393 
ADC1_2_IRQn
 = 18,

394 
USB_HP_CAN1_TX_IRQn
 = 19,

395 
USB_LP_CAN1_RX0_IRQn
 = 20,

396 
CAN1_RX1_IRQn
 = 21,

397 
CAN1_SCE_IRQn
 = 22,

398 
EXTI9_5_IRQn
 = 23,

399 
TIM1_BRK_TIM9_IRQn
 = 24,

400 
TIM1_UP_TIM10_IRQn
 = 25,

401 
TIM1_TRG_COM_TIM11_IRQn
 = 26,

402 
TIM1_CC_IRQn
 = 27,

403 
TIM2_IRQn
 = 28,

404 
TIM3_IRQn
 = 29,

405 
TIM4_IRQn
 = 30,

406 
I2C1_EV_IRQn
 = 31,

407 
I2C1_ER_IRQn
 = 32,

408 
I2C2_EV_IRQn
 = 33,

409 
I2C2_ER_IRQn
 = 34,

410 
SPI1_IRQn
 = 35,

411 
SPI2_IRQn
 = 36,

412 
USART1_IRQn
 = 37,

413 
USART2_IRQn
 = 38,

414 
USART3_IRQn
 = 39,

415 
EXTI15_10_IRQn
 = 40,

416 
RTCAÏrm_IRQn
 = 41,

417 
USBWakeUp_IRQn
 = 42,

418 
TIM8_BRK_TIM12_IRQn
 = 43,

419 
TIM8_UP_TIM13_IRQn
 = 44,

420 
TIM8_TRG_COM_TIM14_IRQn
 = 45,

421 
TIM8_CC_IRQn
 = 46,

422 
ADC3_IRQn
 = 47,

423 
FSMC_IRQn
 = 48,

424 
SDIO_IRQn
 = 49,

425 
TIM5_IRQn
 = 50,

426 
SPI3_IRQn
 = 51,

427 
UART4_IRQn
 = 52,

428 
UART5_IRQn
 = 53,

429 
TIM6_IRQn
 = 54,

430 
TIM7_IRQn
 = 55,

431 
DMA2_ChªÃl1_IRQn
 = 56,

432 
DMA2_ChªÃl2_IRQn
 = 57,

433 
DMA2_ChªÃl3_IRQn
 = 58,

434 
DMA2_ChªÃl4_5_IRQn
 = 59

437 #ifdeà
STM32F10X_CL


438 
ADC1_2_IRQn
 = 18,

439 
CAN1_TX_IRQn
 = 19,

440 
CAN1_RX0_IRQn
 = 20,

441 
CAN1_RX1_IRQn
 = 21,

442 
CAN1_SCE_IRQn
 = 22,

443 
EXTI9_5_IRQn
 = 23,

444 
TIM1_BRK_IRQn
 = 24,

445 
TIM1_UP_IRQn
 = 25,

446 
TIM1_TRG_COM_IRQn
 = 26,

447 
TIM1_CC_IRQn
 = 27,

448 
TIM2_IRQn
 = 28,

449 
TIM3_IRQn
 = 29,

450 
TIM4_IRQn
 = 30,

451 
I2C1_EV_IRQn
 = 31,

452 
I2C1_ER_IRQn
 = 32,

453 
I2C2_EV_IRQn
 = 33,

454 
I2C2_ER_IRQn
 = 34,

455 
SPI1_IRQn
 = 35,

456 
SPI2_IRQn
 = 36,

457 
USART1_IRQn
 = 37,

458 
USART2_IRQn
 = 38,

459 
USART3_IRQn
 = 39,

460 
EXTI15_10_IRQn
 = 40,

461 
RTCAÏrm_IRQn
 = 41,

462 
OTG_FS_WKUP_IRQn
 = 42,

463 
TIM5_IRQn
 = 50,

464 
SPI3_IRQn
 = 51,

465 
UART4_IRQn
 = 52,

466 
UART5_IRQn
 = 53,

467 
TIM6_IRQn
 = 54,

468 
TIM7_IRQn
 = 55,

469 
DMA2_ChªÃl1_IRQn
 = 56,

470 
DMA2_ChªÃl2_IRQn
 = 57,

471 
DMA2_ChªÃl3_IRQn
 = 58,

472 
DMA2_ChªÃl4_IRQn
 = 59,

473 
DMA2_ChªÃl5_IRQn
 = 60,

474 
ETH_IRQn
 = 61,

475 
ETH_WKUP_IRQn
 = 62,

476 
CAN2_TX_IRQn
 = 63,

477 
CAN2_RX0_IRQn
 = 64,

478 
CAN2_RX1_IRQn
 = 65,

479 
CAN2_SCE_IRQn
 = 66,

480 
OTG_FS_IRQn
 = 67

482 } 
	tIRQn_Ty³
;

488 
	~"cÜe_cm3.h
"

489 
	~"sy¡em_¡m32f10x.h
"

490 
	~<¡dšt.h
>

497 
št32_t
 
	ts32
;

498 
št16_t
 
	ts16
;

499 
št8_t
 
	ts8
;

501 cÚ¡ 
	tšt32_t
 
	tsc32
;

502 cÚ¡ 
	tšt16_t
 
	tsc16
;

503 cÚ¡ 
	tšt8_t
 
	tsc8
;

505 
__IO
 
	tšt32_t
 
	tvs32
;

506 
__IO
 
	tšt16_t
 
	tvs16
;

507 
__IO
 
	tšt8_t
 
	tvs8
;

509 
__I
 
	tšt32_t
 
	tvsc32
;

510 
__I
 
	tšt16_t
 
	tvsc16
;

511 
__I
 
	tšt8_t
 
	tvsc8
;

513 
ušt32_t
 
	tu32
;

514 
ušt16_t
 
	tu16
;

515 
ušt8_t
 
	tu8
;

517 cÚ¡ 
	tušt32_t
 
	tuc32
;

518 cÚ¡ 
	tušt16_t
 
	tuc16
;

519 cÚ¡ 
	tušt8_t
 
	tuc8
;

521 
__IO
 
	tušt32_t
 
	tvu32
;

522 
__IO
 
	tušt16_t
 
	tvu16
;

523 
__IO
 
	tušt8_t
 
	tvu8
;

525 
__I
 
	tušt32_t
 
	tvuc32
;

526 
__I
 
	tušt16_t
 
	tvuc16
;

527 
__I
 
	tušt8_t
 
	tvuc8
;

529 ’um {
RESET
 = 0, 
SET
 = !RESET} 
	tFÏgStus
, 
	tITStus
;

531 ’um {
DISABLE
 = 0, 
ENABLE
 = !DISABLE} 
	tFunùiÚ®S‹
;

532 

	#IS_FUNCTIONAL_STATE
(
STATE
è(((STATEè=ð
DISABLE
è|| ((STATEè=ð
ENABLE
))

	)

534 ’um {
ERROR
 = 0, 
SUCCESS
 = !ERROR} 
	tE¼ÜStus
;

537 

	#HSES¹Up_TimeOut
 
HSE_STARTUP_TIMEOUT


	)

538 

	#HSE_V®ue
 
HSE_VALUE


	)

539 

	#HSI_V®ue
 
HSI_VALUE


	)

554 
__IO
 
ušt32_t
 
SR
;

555 
__IO
 
ušt32_t
 
CR1
;

556 
__IO
 
ušt32_t
 
CR2
;

557 
__IO
 
ušt32_t
 
SMPR1
;

558 
__IO
 
ušt32_t
 
SMPR2
;

559 
__IO
 
ušt32_t
 
JOFR1
;

560 
__IO
 
ušt32_t
 
JOFR2
;

561 
__IO
 
ušt32_t
 
JOFR3
;

562 
__IO
 
ušt32_t
 
JOFR4
;

563 
__IO
 
ušt32_t
 
HTR
;

564 
__IO
 
ušt32_t
 
LTR
;

565 
__IO
 
ušt32_t
 
SQR1
;

566 
__IO
 
ušt32_t
 
SQR2
;

567 
__IO
 
ušt32_t
 
SQR3
;

568 
__IO
 
ušt32_t
 
JSQR
;

569 
__IO
 
ušt32_t
 
JDR1
;

570 
__IO
 
ušt32_t
 
JDR2
;

571 
__IO
 
ušt32_t
 
JDR3
;

572 
__IO
 
ušt32_t
 
JDR4
;

573 
__IO
 
ušt32_t
 
DR
;

574 } 
	tADC_Ty³Def
;

582 
ušt32_t
 
RESERVED0
;

583 
__IO
 
ušt16_t
 
DR1
;

584 
ušt16_t
 
RESERVED1
;

585 
__IO
 
ušt16_t
 
DR2
;

586 
ušt16_t
 
RESERVED2
;

587 
__IO
 
ušt16_t
 
DR3
;

588 
ušt16_t
 
RESERVED3
;

589 
__IO
 
ušt16_t
 
DR4
;

590 
ušt16_t
 
RESERVED4
;

591 
__IO
 
ušt16_t
 
DR5
;

592 
ušt16_t
 
RESERVED5
;

593 
__IO
 
ušt16_t
 
DR6
;

594 
ušt16_t
 
RESERVED6
;

595 
__IO
 
ušt16_t
 
DR7
;

596 
ušt16_t
 
RESERVED7
;

597 
__IO
 
ušt16_t
 
DR8
;

598 
ušt16_t
 
RESERVED8
;

599 
__IO
 
ušt16_t
 
DR9
;

600 
ušt16_t
 
RESERVED9
;

601 
__IO
 
ušt16_t
 
DR10
;

602 
ušt16_t
 
RESERVED10
;

603 
__IO
 
ušt16_t
 
RTCCR
;

604 
ušt16_t
 
RESERVED11
;

605 
__IO
 
ušt16_t
 
CR
;

606 
ušt16_t
 
RESERVED12
;

607 
__IO
 
ušt16_t
 
CSR
;

608 
ušt16_t
 
RESERVED13
[5];

609 
__IO
 
ušt16_t
 
DR11
;

610 
ušt16_t
 
RESERVED14
;

611 
__IO
 
ušt16_t
 
DR12
;

612 
ušt16_t
 
RESERVED15
;

613 
__IO
 
ušt16_t
 
DR13
;

614 
ušt16_t
 
RESERVED16
;

615 
__IO
 
ušt16_t
 
DR14
;

616 
ušt16_t
 
RESERVED17
;

617 
__IO
 
ušt16_t
 
DR15
;

618 
ušt16_t
 
RESERVED18
;

619 
__IO
 
ušt16_t
 
DR16
;

620 
ušt16_t
 
RESERVED19
;

621 
__IO
 
ušt16_t
 
DR17
;

622 
ušt16_t
 
RESERVED20
;

623 
__IO
 
ušt16_t
 
DR18
;

624 
ušt16_t
 
RESERVED21
;

625 
__IO
 
ušt16_t
 
DR19
;

626 
ušt16_t
 
RESERVED22
;

627 
__IO
 
ušt16_t
 
DR20
;

628 
ušt16_t
 
RESERVED23
;

629 
__IO
 
ušt16_t
 
DR21
;

630 
ušt16_t
 
RESERVED24
;

631 
__IO
 
ušt16_t
 
DR22
;

632 
ušt16_t
 
RESERVED25
;

633 
__IO
 
ušt16_t
 
DR23
;

634 
ušt16_t
 
RESERVED26
;

635 
__IO
 
ušt16_t
 
DR24
;

636 
ušt16_t
 
RESERVED27
;

637 
__IO
 
ušt16_t
 
DR25
;

638 
ušt16_t
 
RESERVED28
;

639 
__IO
 
ušt16_t
 
DR26
;

640 
ušt16_t
 
RESERVED29
;

641 
__IO
 
ušt16_t
 
DR27
;

642 
ušt16_t
 
RESERVED30
;

643 
__IO
 
ušt16_t
 
DR28
;

644 
ušt16_t
 
RESERVED31
;

645 
__IO
 
ušt16_t
 
DR29
;

646 
ušt16_t
 
RESERVED32
;

647 
__IO
 
ušt16_t
 
DR30
;

648 
ušt16_t
 
RESERVED33
;

649 
__IO
 
ušt16_t
 
DR31
;

650 
ušt16_t
 
RESERVED34
;

651 
__IO
 
ušt16_t
 
DR32
;

652 
ušt16_t
 
RESERVED35
;

653 
__IO
 
ušt16_t
 
DR33
;

654 
ušt16_t
 
RESERVED36
;

655 
__IO
 
ušt16_t
 
DR34
;

656 
ušt16_t
 
RESERVED37
;

657 
__IO
 
ušt16_t
 
DR35
;

658 
ušt16_t
 
RESERVED38
;

659 
__IO
 
ušt16_t
 
DR36
;

660 
ušt16_t
 
RESERVED39
;

661 
__IO
 
ušt16_t
 
DR37
;

662 
ušt16_t
 
RESERVED40
;

663 
__IO
 
ušt16_t
 
DR38
;

664 
ušt16_t
 
RESERVED41
;

665 
__IO
 
ušt16_t
 
DR39
;

666 
ušt16_t
 
RESERVED42
;

667 
__IO
 
ušt16_t
 
DR40
;

668 
ušt16_t
 
RESERVED43
;

669 
__IO
 
ušt16_t
 
DR41
;

670 
ušt16_t
 
RESERVED44
;

671 
__IO
 
ušt16_t
 
DR42
;

672 
ušt16_t
 
RESERVED45
;

673 } 
	tBKP_Ty³Def
;

681 
__IO
 
ušt32_t
 
TIR
;

682 
__IO
 
ušt32_t
 
TDTR
;

683 
__IO
 
ušt32_t
 
TDLR
;

684 
__IO
 
ušt32_t
 
TDHR
;

685 } 
	tCAN_TxMažBox_Ty³Def
;

693 
__IO
 
ušt32_t
 
RIR
;

694 
__IO
 
ušt32_t
 
RDTR
;

695 
__IO
 
ušt32_t
 
RDLR
;

696 
__IO
 
ušt32_t
 
RDHR
;

697 } 
	tCAN_FIFOMažBox_Ty³Def
;

705 
__IO
 
ušt32_t
 
FR1
;

706 
__IO
 
ušt32_t
 
FR2
;

707 } 
	tCAN_Fž‹rRegi¡”_Ty³Def
;

715 
__IO
 
ušt32_t
 
MCR
;

716 
__IO
 
ušt32_t
 
MSR
;

717 
__IO
 
ušt32_t
 
TSR
;

718 
__IO
 
ušt32_t
 
RF0R
;

719 
__IO
 
ušt32_t
 
RF1R
;

720 
__IO
 
ušt32_t
 
IER
;

721 
__IO
 
ušt32_t
 
ESR
;

722 
__IO
 
ušt32_t
 
BTR
;

723 
ušt32_t
 
RESERVED0
[88];

724 
CAN_TxMažBox_Ty³Def
 
sTxMažBox
[3];

725 
CAN_FIFOMažBox_Ty³Def
 
sFIFOMažBox
[2];

726 
ušt32_t
 
RESERVED1
[12];

727 
__IO
 
ušt32_t
 
FMR
;

728 
__IO
 
ušt32_t
 
FM1R
;

729 
ušt32_t
 
RESERVED2
;

730 
__IO
 
ušt32_t
 
FS1R
;

731 
ušt32_t
 
RESERVED3
;

732 
__IO
 
ušt32_t
 
FFA1R
;

733 
ušt32_t
 
RESERVED4
;

734 
__IO
 
ušt32_t
 
FA1R
;

735 
ušt32_t
 
RESERVED5
[8];

736 #iâdeà
STM32F10X_CL


737 
CAN_Fž‹rRegi¡”_Ty³Def
 
sFž‹rRegi¡”
[14];

739 
CAN_Fž‹rRegi¡”_Ty³Def
 
sFž‹rRegi¡”
[28];

741 } 
	tCAN_Ty³Def
;

748 
__IO
 
ušt32_t
 
CFGR
;

749 
__IO
 
ušt32_t
 
OAR
;

750 
__IO
 
ušt32_t
 
PRES
;

751 
__IO
 
ušt32_t
 
ESR
;

752 
__IO
 
ušt32_t
 
CSR
;

753 
__IO
 
ušt32_t
 
TXD
;

754 
__IO
 
ušt32_t
 
RXD
;

755 } 
	tCEC_Ty³Def
;

763 
__IO
 
ušt32_t
 
DR
;

764 
__IO
 
ušt8_t
 
IDR
;

765 
ušt8_t
 
RESERVED0
;

766 
ušt16_t
 
RESERVED1
;

767 
__IO
 
ušt32_t
 
CR
;

768 } 
	tCRC_Ty³Def
;

776 
__IO
 
ušt32_t
 
CR
;

777 
__IO
 
ušt32_t
 
SWTRIGR
;

778 
__IO
 
ušt32_t
 
DHR12R1
;

779 
__IO
 
ušt32_t
 
DHR12L1
;

780 
__IO
 
ušt32_t
 
DHR8R1
;

781 
__IO
 
ušt32_t
 
DHR12R2
;

782 
__IO
 
ušt32_t
 
DHR12L2
;

783 
__IO
 
ušt32_t
 
DHR8R2
;

784 
__IO
 
ušt32_t
 
DHR12RD
;

785 
__IO
 
ušt32_t
 
DHR12LD
;

786 
__IO
 
ušt32_t
 
DHR8RD
;

787 
__IO
 
ušt32_t
 
DOR1
;

788 
__IO
 
ušt32_t
 
DOR2
;

789 #ià
defšed
 (
STM32F10X_LD_VL
è|| defšed (
STM32F10X_MD_VL
è|| defšed (
STM32F10X_HD_VL
)

790 
__IO
 
ušt32_t
 
SR
;

792 } 
	tDAC_Ty³Def
;

800 
__IO
 
ušt32_t
 
IDCODE
;

801 
__IO
 
ušt32_t
 
CR
;

802 }
	tDBGMCU_Ty³Def
;

810 
__IO
 
ušt32_t
 
CCR
;

811 
__IO
 
ušt32_t
 
CNDTR
;

812 
__IO
 
ušt32_t
 
CPAR
;

813 
__IO
 
ušt32_t
 
CMAR
;

814 } 
	tDMA_ChªÃl_Ty³Def
;

818 
__IO
 
ušt32_t
 
ISR
;

819 
__IO
 
ušt32_t
 
IFCR
;

820 } 
	tDMA_Ty³Def
;

828 
__IO
 
ušt32_t
 
MACCR
;

829 
__IO
 
ušt32_t
 
MACFFR
;

830 
__IO
 
ušt32_t
 
MACHTHR
;

831 
__IO
 
ušt32_t
 
MACHTLR
;

832 
__IO
 
ušt32_t
 
MACMIIAR
;

833 
__IO
 
ušt32_t
 
MACMIIDR
;

834 
__IO
 
ušt32_t
 
MACFCR
;

835 
__IO
 
ušt32_t
 
MACVLANTR
;

836 
ušt32_t
 
RESERVED0
[2];

837 
__IO
 
ušt32_t
 
MACRWUFFR
;

838 
__IO
 
ušt32_t
 
MACPMTCSR
;

839 
ušt32_t
 
RESERVED1
[2];

840 
__IO
 
ušt32_t
 
MACSR
;

841 
__IO
 
ušt32_t
 
MACIMR
;

842 
__IO
 
ušt32_t
 
MACA0HR
;

843 
__IO
 
ušt32_t
 
MACA0LR
;

844 
__IO
 
ušt32_t
 
MACA1HR
;

845 
__IO
 
ušt32_t
 
MACA1LR
;

846 
__IO
 
ušt32_t
 
MACA2HR
;

847 
__IO
 
ušt32_t
 
MACA2LR
;

848 
__IO
 
ušt32_t
 
MACA3HR
;

849 
__IO
 
ušt32_t
 
MACA3LR
;

850 
ušt32_t
 
RESERVED2
[40];

851 
__IO
 
ušt32_t
 
MMCCR
;

852 
__IO
 
ušt32_t
 
MMCRIR
;

853 
__IO
 
ušt32_t
 
MMCTIR
;

854 
__IO
 
ušt32_t
 
MMCRIMR
;

855 
__IO
 
ušt32_t
 
MMCTIMR
;

856 
ušt32_t
 
RESERVED3
[14];

857 
__IO
 
ušt32_t
 
MMCTGFSCCR
;

858 
__IO
 
ušt32_t
 
MMCTGFMSCCR
;

859 
ušt32_t
 
RESERVED4
[5];

860 
__IO
 
ušt32_t
 
MMCTGFCR
;

861 
ušt32_t
 
RESERVED5
[10];

862 
__IO
 
ušt32_t
 
MMCRFCECR
;

863 
__IO
 
ušt32_t
 
MMCRFAECR
;

864 
ušt32_t
 
RESERVED6
[10];

865 
__IO
 
ušt32_t
 
MMCRGUFCR
;

866 
ušt32_t
 
RESERVED7
[334];

867 
__IO
 
ušt32_t
 
PTPTSCR
;

868 
__IO
 
ušt32_t
 
PTPSSIR
;

869 
__IO
 
ušt32_t
 
PTPTSHR
;

870 
__IO
 
ušt32_t
 
PTPTSLR
;

871 
__IO
 
ušt32_t
 
PTPTSHUR
;

872 
__IO
 
ušt32_t
 
PTPTSLUR
;

873 
__IO
 
ušt32_t
 
PTPTSAR
;

874 
__IO
 
ušt32_t
 
PTPTTHR
;

875 
__IO
 
ušt32_t
 
PTPTTLR
;

876 
ušt32_t
 
RESERVED8
[567];

877 
__IO
 
ušt32_t
 
DMABMR
;

878 
__IO
 
ušt32_t
 
DMATPDR
;

879 
__IO
 
ušt32_t
 
DMARPDR
;

880 
__IO
 
ušt32_t
 
DMARDLAR
;

881 
__IO
 
ušt32_t
 
DMATDLAR
;

882 
__IO
 
ušt32_t
 
DMASR
;

883 
__IO
 
ušt32_t
 
DMAOMR
;

884 
__IO
 
ušt32_t
 
DMAIER
;

885 
__IO
 
ušt32_t
 
DMAMFBOCR
;

886 
ušt32_t
 
RESERVED9
[9];

887 
__IO
 
ušt32_t
 
DMACHTDR
;

888 
__IO
 
ušt32_t
 
DMACHRDR
;

889 
__IO
 
ušt32_t
 
DMACHTBAR
;

890 
__IO
 
ušt32_t
 
DMACHRBAR
;

891 } 
	tETH_Ty³Def
;

899 
__IO
 
ušt32_t
 
IMR
;

900 
__IO
 
ušt32_t
 
EMR
;

901 
__IO
 
ušt32_t
 
RTSR
;

902 
__IO
 
ušt32_t
 
FTSR
;

903 
__IO
 
ušt32_t
 
SWIER
;

904 
__IO
 
ušt32_t
 
PR
;

905 } 
	tEXTI_Ty³Def
;

913 
__IO
 
ušt32_t
 
ACR
;

914 
__IO
 
ušt32_t
 
KEYR
;

915 
__IO
 
ušt32_t
 
OPTKEYR
;

916 
__IO
 
ušt32_t
 
SR
;

917 
__IO
 
ušt32_t
 
CR
;

918 
__IO
 
ušt32_t
 
AR
;

919 
__IO
 
ušt32_t
 
RESERVED
;

920 
__IO
 
ušt32_t
 
OBR
;

921 
__IO
 
ušt32_t
 
WRPR
;

922 #ifdeà
STM32F10X_XL


923 
ušt32_t
 
RESERVED1
[8];

924 
__IO
 
ušt32_t
 
KEYR2
;

925 
ušt32_t
 
RESERVED2
;

926 
__IO
 
ušt32_t
 
SR2
;

927 
__IO
 
ušt32_t
 
CR2
;

928 
__IO
 
ušt32_t
 
AR2
;

930 } 
	tFLASH_Ty³Def
;

938 
__IO
 
ušt16_t
 
RDP
;

939 
__IO
 
ušt16_t
 
USER
;

940 
__IO
 
ušt16_t
 
D©a0
;

941 
__IO
 
ušt16_t
 
D©a1
;

942 
__IO
 
ušt16_t
 
WRP0
;

943 
__IO
 
ušt16_t
 
WRP1
;

944 
__IO
 
ušt16_t
 
WRP2
;

945 
__IO
 
ušt16_t
 
WRP3
;

946 } 
	tOB_Ty³Def
;

954 
__IO
 
ušt32_t
 
BTCR
[8];

955 } 
	tFSMC_Bªk1_Ty³Def
;

963 
__IO
 
ušt32_t
 
BWTR
[7];

964 } 
	tFSMC_Bªk1E_Ty³Def
;

972 
__IO
 
ušt32_t
 
PCR2
;

973 
__IO
 
ušt32_t
 
SR2
;

974 
__IO
 
ušt32_t
 
PMEM2
;

975 
__IO
 
ušt32_t
 
PATT2
;

976 
ušt32_t
 
RESERVED0
;

977 
__IO
 
ušt32_t
 
ECCR2
;

978 } 
	tFSMC_Bªk2_Ty³Def
;

986 
__IO
 
ušt32_t
 
PCR3
;

987 
__IO
 
ušt32_t
 
SR3
;

988 
__IO
 
ušt32_t
 
PMEM3
;

989 
__IO
 
ušt32_t
 
PATT3
;

990 
ušt32_t
 
RESERVED0
;

991 
__IO
 
ušt32_t
 
ECCR3
;

992 } 
	tFSMC_Bªk3_Ty³Def
;

1000 
__IO
 
ušt32_t
 
PCR4
;

1001 
__IO
 
ušt32_t
 
SR4
;

1002 
__IO
 
ušt32_t
 
PMEM4
;

1003 
__IO
 
ušt32_t
 
PATT4
;

1004 
__IO
 
ušt32_t
 
PIO4
;

1005 } 
	tFSMC_Bªk4_Ty³Def
;

1013 
__IO
 
ušt32_t
 
CRL
;

1014 
__IO
 
ušt32_t
 
CRH
;

1015 
__IO
 
ušt32_t
 
IDR
;

1016 
__IO
 
ušt32_t
 
ODR
;

1017 
__IO
 
ušt32_t
 
BSRR
;

1018 
__IO
 
ušt32_t
 
BRR
;

1019 
__IO
 
ušt32_t
 
LCKR
;

1020 } 
	tGPIO_Ty³Def
;

1028 
__IO
 
ušt32_t
 
EVCR
;

1029 
__IO
 
ušt32_t
 
MAPR
;

1030 
__IO
 
ušt32_t
 
EXTICR
[4];

1031 
ušt32_t
 
RESERVED0
;

1032 
__IO
 
ušt32_t
 
MAPR2
;

1033 } 
	tAFIO_Ty³Def
;

1040 
__IO
 
ušt16_t
 
CR1
;

1041 
ušt16_t
 
RESERVED0
;

1042 
__IO
 
ušt16_t
 
CR2
;

1043 
ušt16_t
 
RESERVED1
;

1044 
__IO
 
ušt16_t
 
OAR1
;

1045 
ušt16_t
 
RESERVED2
;

1046 
__IO
 
ušt16_t
 
OAR2
;

1047 
ušt16_t
 
RESERVED3
;

1048 
__IO
 
ušt16_t
 
DR
;

1049 
ušt16_t
 
RESERVED4
;

1050 
__IO
 
ušt16_t
 
SR1
;

1051 
ušt16_t
 
RESERVED5
;

1052 
__IO
 
ušt16_t
 
SR2
;

1053 
ušt16_t
 
RESERVED6
;

1054 
__IO
 
ušt16_t
 
CCR
;

1055 
ušt16_t
 
RESERVED7
;

1056 
__IO
 
ušt16_t
 
TRISE
;

1057 
ušt16_t
 
RESERVED8
;

1058 } 
	tI2C_Ty³Def
;

1066 
__IO
 
ušt32_t
 
KR
;

1067 
__IO
 
ušt32_t
 
PR
;

1068 
__IO
 
ušt32_t
 
RLR
;

1069 
__IO
 
ušt32_t
 
SR
;

1070 } 
	tIWDG_Ty³Def
;

1078 
__IO
 
ušt32_t
 
CR
;

1079 
__IO
 
ušt32_t
 
CSR
;

1080 } 
	tPWR_Ty³Def
;

1088 
__IO
 
ušt32_t
 
CR
;

1089 
__IO
 
ušt32_t
 
CFGR
;

1090 
__IO
 
ušt32_t
 
CIR
;

1091 
__IO
 
ušt32_t
 
APB2RSTR
;

1092 
__IO
 
ušt32_t
 
APB1RSTR
;

1093 
__IO
 
ušt32_t
 
AHBENR
;

1094 
__IO
 
ušt32_t
 
APB2ENR
;

1095 
__IO
 
ušt32_t
 
APB1ENR
;

1096 
__IO
 
ušt32_t
 
BDCR
;

1097 
__IO
 
ušt32_t
 
CSR
;

1099 #ifdeà
STM32F10X_CL


1100 
__IO
 
ušt32_t
 
AHBRSTR
;

1101 
__IO
 
ušt32_t
 
CFGR2
;

1104 #ià
defšed
 (
STM32F10X_LD_VL
è|| defšed (
STM32F10X_MD_VL
è|| defšed (
STM32F10X_HD_VL
)

1105 
ušt32_t
 
RESERVED0
;

1106 
__IO
 
ušt32_t
 
CFGR2
;

1108 } 
	tRCC_Ty³Def
;

1116 
__IO
 
ušt16_t
 
CRH
;

1117 
ušt16_t
 
RESERVED0
;

1118 
__IO
 
ušt16_t
 
CRL
;

1119 
ušt16_t
 
RESERVED1
;

1120 
__IO
 
ušt16_t
 
PRLH
;

1121 
ušt16_t
 
RESERVED2
;

1122 
__IO
 
ušt16_t
 
PRLL
;

1123 
ušt16_t
 
RESERVED3
;

1124 
__IO
 
ušt16_t
 
DIVH
;

1125 
ušt16_t
 
RESERVED4
;

1126 
__IO
 
ušt16_t
 
DIVL
;

1127 
ušt16_t
 
RESERVED5
;

1128 
__IO
 
ušt16_t
 
CNTH
;

1129 
ušt16_t
 
RESERVED6
;

1130 
__IO
 
ušt16_t
 
CNTL
;

1131 
ušt16_t
 
RESERVED7
;

1132 
__IO
 
ušt16_t
 
ALRH
;

1133 
ušt16_t
 
RESERVED8
;

1134 
__IO
 
ušt16_t
 
ALRL
;

1135 
ušt16_t
 
RESERVED9
;

1136 } 
	tRTC_Ty³Def
;

1144 
__IO
 
ušt32_t
 
POWER
;

1145 
__IO
 
ušt32_t
 
CLKCR
;

1146 
__IO
 
ušt32_t
 
ARG
;

1147 
__IO
 
ušt32_t
 
CMD
;

1148 
__I
 
ušt32_t
 
RESPCMD
;

1149 
__I
 
ušt32_t
 
RESP1
;

1150 
__I
 
ušt32_t
 
RESP2
;

1151 
__I
 
ušt32_t
 
RESP3
;

1152 
__I
 
ušt32_t
 
RESP4
;

1153 
__IO
 
ušt32_t
 
DTIMER
;

1154 
__IO
 
ušt32_t
 
DLEN
;

1155 
__IO
 
ušt32_t
 
DCTRL
;

1156 
__I
 
ušt32_t
 
DCOUNT
;

1157 
__I
 
ušt32_t
 
STA
;

1158 
__IO
 
ušt32_t
 
ICR
;

1159 
__IO
 
ušt32_t
 
MASK
;

1160 
ušt32_t
 
RESERVED0
[2];

1161 
__I
 
ušt32_t
 
FIFOCNT
;

1162 
ušt32_t
 
RESERVED1
[13];

1163 
__IO
 
ušt32_t
 
FIFO
;

1164 } 
	tSDIO_Ty³Def
;

1172 
__IO
 
ušt16_t
 
CR1
;

1173 
ušt16_t
 
RESERVED0
;

1174 
__IO
 
ušt16_t
 
CR2
;

1175 
ušt16_t
 
RESERVED1
;

1176 
__IO
 
ušt16_t
 
SR
;

1177 
ušt16_t
 
RESERVED2
;

1178 
__IO
 
ušt16_t
 
DR
;

1179 
ušt16_t
 
RESERVED3
;

1180 
__IO
 
ušt16_t
 
CRCPR
;

1181 
ušt16_t
 
RESERVED4
;

1182 
__IO
 
ušt16_t
 
RXCRCR
;

1183 
ušt16_t
 
RESERVED5
;

1184 
__IO
 
ušt16_t
 
TXCRCR
;

1185 
ušt16_t
 
RESERVED6
;

1186 
__IO
 
ušt16_t
 
I2SCFGR
;

1187 
ušt16_t
 
RESERVED7
;

1188 
__IO
 
ušt16_t
 
I2SPR
;

1189 
ušt16_t
 
RESERVED8
;

1190 } 
	tSPI_Ty³Def
;

1198 
__IO
 
ušt16_t
 
CR1
;

1199 
ušt16_t
 
RESERVED0
;

1200 
__IO
 
ušt16_t
 
CR2
;

1201 
ušt16_t
 
RESERVED1
;

1202 
__IO
 
ušt16_t
 
SMCR
;

1203 
ušt16_t
 
RESERVED2
;

1204 
__IO
 
ušt16_t
 
DIER
;

1205 
ušt16_t
 
RESERVED3
;

1206 
__IO
 
ušt16_t
 
SR
;

1207 
ušt16_t
 
RESERVED4
;

1208 
__IO
 
ušt16_t
 
EGR
;

1209 
ušt16_t
 
RESERVED5
;

1210 
__IO
 
ušt16_t
 
CCMR1
;

1211 
ušt16_t
 
RESERVED6
;

1212 
__IO
 
ušt16_t
 
CCMR2
;

1213 
ušt16_t
 
RESERVED7
;

1214 
__IO
 
ušt16_t
 
CCER
;

1215 
ušt16_t
 
RESERVED8
;

1216 
__IO
 
ušt16_t
 
CNT
;

1217 
ušt16_t
 
RESERVED9
;

1218 
__IO
 
ušt16_t
 
PSC
;

1219 
ušt16_t
 
RESERVED10
;

1220 
__IO
 
ušt16_t
 
ARR
;

1221 
ušt16_t
 
RESERVED11
;

1222 
__IO
 
ušt16_t
 
RCR
;

1223 
ušt16_t
 
RESERVED12
;

1224 
__IO
 
ušt16_t
 
CCR1
;

1225 
ušt16_t
 
RESERVED13
;

1226 
__IO
 
ušt16_t
 
CCR2
;

1227 
ušt16_t
 
RESERVED14
;

1228 
__IO
 
ušt16_t
 
CCR3
;

1229 
ušt16_t
 
RESERVED15
;

1230 
__IO
 
ušt16_t
 
CCR4
;

1231 
ušt16_t
 
RESERVED16
;

1232 
__IO
 
ušt16_t
 
BDTR
;

1233 
ušt16_t
 
RESERVED17
;

1234 
__IO
 
ušt16_t
 
DCR
;

1235 
ušt16_t
 
RESERVED18
;

1236 
__IO
 
ušt16_t
 
DMAR
;

1237 
ušt16_t
 
RESERVED19
;

1238 } 
	tTIM_Ty³Def
;

1246 
__IO
 
ušt16_t
 
SR
;

1247 
ušt16_t
 
RESERVED0
;

1248 
__IO
 
ušt16_t
 
DR
;

1249 
ušt16_t
 
RESERVED1
;

1250 
__IO
 
ušt16_t
 
BRR
;

1251 
ušt16_t
 
RESERVED2
;

1252 
__IO
 
ušt16_t
 
CR1
;

1253 
ušt16_t
 
RESERVED3
;

1254 
__IO
 
ušt16_t
 
CR2
;

1255 
ušt16_t
 
RESERVED4
;

1256 
__IO
 
ušt16_t
 
CR3
;

1257 
ušt16_t
 
RESERVED5
;

1258 
__IO
 
ušt16_t
 
GTPR
;

1259 
ušt16_t
 
RESERVED6
;

1260 } 
	tUSART_Ty³Def
;

1268 
__IO
 
ušt32_t
 
CR
;

1269 
__IO
 
ušt32_t
 
CFR
;

1270 
__IO
 
ušt32_t
 
SR
;

1271 } 
	tWWDG_Ty³Def
;

1282 

	#FLASH_BASE
 ((
ušt32_t
)0x08000000è

	)

1283 

	#SRAM_BASE
 ((
ušt32_t
)0x20000000è

	)

1284 

	#PERIPH_BASE
 ((
ušt32_t
)0x40000000è

	)

1286 

	#SRAM_BB_BASE
 ((
ušt32_t
)0x22000000è

	)

1287 

	#PERIPH_BB_BASE
 ((
ušt32_t
)0x42000000è

	)

1289 

	#FSMC_R_BASE
 ((
ušt32_t
)0xA0000000è

	)

1292 

	#APB1PERIPH_BASE
 
PERIPH_BASE


	)

1293 

	#APB2PERIPH_BASE
 (
PERIPH_BASE
 + 0x10000)

	)

1294 

	#AHBPERIPH_BASE
 (
PERIPH_BASE
 + 0x20000)

	)

1296 

	#TIM2_BASE
 (
APB1PERIPH_BASE
 + 0x0000)

	)

1297 

	#TIM3_BASE
 (
APB1PERIPH_BASE
 + 0x0400)

	)

1298 

	#TIM4_BASE
 (
APB1PERIPH_BASE
 + 0x0800)

	)

1299 

	#TIM5_BASE
 (
APB1PERIPH_BASE
 + 0x0C00)

	)

1300 

	#TIM6_BASE
 (
APB1PERIPH_BASE
 + 0x1000)

	)

1301 

	#TIM7_BASE
 (
APB1PERIPH_BASE
 + 0x1400)

	)

1302 

	#TIM12_BASE
 (
APB1PERIPH_BASE
 + 0x1800)

	)

1303 

	#TIM13_BASE
 (
APB1PERIPH_BASE
 + 0x1C00)

	)

1304 

	#TIM14_BASE
 (
APB1PERIPH_BASE
 + 0x2000)

	)

1305 

	#RTC_BASE
 (
APB1PERIPH_BASE
 + 0x2800)

	)

1306 

	#WWDG_BASE
 (
APB1PERIPH_BASE
 + 0x2C00)

	)

1307 

	#IWDG_BASE
 (
APB1PERIPH_BASE
 + 0x3000)

	)

1308 

	#SPI2_BASE
 (
APB1PERIPH_BASE
 + 0x3800)

	)

1309 

	#SPI3_BASE
 (
APB1PERIPH_BASE
 + 0x3C00)

	)

1310 

	#USART2_BASE
 (
APB1PERIPH_BASE
 + 0x4400)

	)

1311 

	#USART3_BASE
 (
APB1PERIPH_BASE
 + 0x4800)

	)

1312 

	#UART4_BASE
 (
APB1PERIPH_BASE
 + 0x4C00)

	)

1313 

	#UART5_BASE
 (
APB1PERIPH_BASE
 + 0x5000)

	)

1314 

	#I2C1_BASE
 (
APB1PERIPH_BASE
 + 0x5400)

	)

1315 

	#I2C2_BASE
 (
APB1PERIPH_BASE
 + 0x5800)

	)

1316 

	#CAN1_BASE
 (
APB1PERIPH_BASE
 + 0x6400)

	)

1317 

	#CAN2_BASE
 (
APB1PERIPH_BASE
 + 0x6800)

	)

1318 

	#BKP_BASE
 (
APB1PERIPH_BASE
 + 0x6C00)

	)

1319 

	#PWR_BASE
 (
APB1PERIPH_BASE
 + 0x7000)

	)

1320 

	#DAC_BASE
 (
APB1PERIPH_BASE
 + 0x7400)

	)

1321 

	#CEC_BASE
 (
APB1PERIPH_BASE
 + 0x7800)

	)

1323 

	#AFIO_BASE
 (
APB2PERIPH_BASE
 + 0x0000)

	)

1324 

	#EXTI_BASE
 (
APB2PERIPH_BASE
 + 0x0400)

	)

1325 

	#GPIOA_BASE
 (
APB2PERIPH_BASE
 + 0x0800)

	)

1326 

	#GPIOB_BASE
 (
APB2PERIPH_BASE
 + 0x0C00)

	)

1327 

	#GPIOC_BASE
 (
APB2PERIPH_BASE
 + 0x1000)

	)

1328 

	#GPIOD_BASE
 (
APB2PERIPH_BASE
 + 0x1400)

	)

1329 

	#GPIOE_BASE
 (
APB2PERIPH_BASE
 + 0x1800)

	)

1330 

	#GPIOF_BASE
 (
APB2PERIPH_BASE
 + 0x1C00)

	)

1331 

	#GPIOG_BASE
 (
APB2PERIPH_BASE
 + 0x2000)

	)

1332 

	#ADC1_BASE
 (
APB2PERIPH_BASE
 + 0x2400)

	)

1333 

	#ADC2_BASE
 (
APB2PERIPH_BASE
 + 0x2800)

	)

1334 

	#TIM1_BASE
 (
APB2PERIPH_BASE
 + 0x2C00)

	)

1335 

	#SPI1_BASE
 (
APB2PERIPH_BASE
 + 0x3000)

	)

1336 

	#TIM8_BASE
 (
APB2PERIPH_BASE
 + 0x3400)

	)

1337 

	#USART1_BASE
 (
APB2PERIPH_BASE
 + 0x3800)

	)

1338 

	#ADC3_BASE
 (
APB2PERIPH_BASE
 + 0x3C00)

	)

1339 

	#TIM15_BASE
 (
APB2PERIPH_BASE
 + 0x4000)

	)

1340 

	#TIM16_BASE
 (
APB2PERIPH_BASE
 + 0x4400)

	)

1341 

	#TIM17_BASE
 (
APB2PERIPH_BASE
 + 0x4800)

	)

1342 

	#TIM9_BASE
 (
APB2PERIPH_BASE
 + 0x4C00)

	)

1343 

	#TIM10_BASE
 (
APB2PERIPH_BASE
 + 0x5000)

	)

1344 

	#TIM11_BASE
 (
APB2PERIPH_BASE
 + 0x5400)

	)

1346 

	#SDIO_BASE
 (
PERIPH_BASE
 + 0x18000)

	)

1348 

	#DMA1_BASE
 (
AHBPERIPH_BASE
 + 0x0000)

	)

1349 

	#DMA1_ChªÃl1_BASE
 (
AHBPERIPH_BASE
 + 0x0008)

	)

1350 

	#DMA1_ChªÃl2_BASE
 (
AHBPERIPH_BASE
 + 0x001C)

	)

1351 

	#DMA1_ChªÃl3_BASE
 (
AHBPERIPH_BASE
 + 0x0030)

	)

1352 

	#DMA1_ChªÃl4_BASE
 (
AHBPERIPH_BASE
 + 0x0044)

	)

1353 

	#DMA1_ChªÃl5_BASE
 (
AHBPERIPH_BASE
 + 0x0058)

	)

1354 

	#DMA1_ChªÃl6_BASE
 (
AHBPERIPH_BASE
 + 0x006C)

	)

1355 

	#DMA1_ChªÃl7_BASE
 (
AHBPERIPH_BASE
 + 0x0080)

	)

1356 

	#DMA2_BASE
 (
AHBPERIPH_BASE
 + 0x0400)

	)

1357 

	#DMA2_ChªÃl1_BASE
 (
AHBPERIPH_BASE
 + 0x0408)

	)

1358 

	#DMA2_ChªÃl2_BASE
 (
AHBPERIPH_BASE
 + 0x041C)

	)

1359 

	#DMA2_ChªÃl3_BASE
 (
AHBPERIPH_BASE
 + 0x0430)

	)

1360 

	#DMA2_ChªÃl4_BASE
 (
AHBPERIPH_BASE
 + 0x0444)

	)

1361 

	#DMA2_ChªÃl5_BASE
 (
AHBPERIPH_BASE
 + 0x0458)

	)

1362 

	#RCC_BASE
 (
AHBPERIPH_BASE
 + 0x1000)

	)

1363 

	#CRC_BASE
 (
AHBPERIPH_BASE
 + 0x3000)

	)

1365 

	#FLASH_R_BASE
 (
AHBPERIPH_BASE
 + 0x2000è

	)

1366 

	#OB_BASE
 ((
ušt32_t
)0x1FFFF800è

	)

1368 

	#ETH_BASE
 (
AHBPERIPH_BASE
 + 0x8000)

	)

1369 

	#ETH_MAC_BASE
 (
ETH_BASE
)

	)

1370 

	#ETH_MMC_BASE
 (
ETH_BASE
 + 0x0100)

	)

1371 

	#ETH_PTP_BASE
 (
ETH_BASE
 + 0x0700)

	)

1372 

	#ETH_DMA_BASE
 (
ETH_BASE
 + 0x1000)

	)

1374 

	#FSMC_Bªk1_R_BASE
 (
FSMC_R_BASE
 + 0x0000è

	)

1375 

	#FSMC_Bªk1E_R_BASE
 (
FSMC_R_BASE
 + 0x0104è

	)

1376 

	#FSMC_Bªk2_R_BASE
 (
FSMC_R_BASE
 + 0x0060è

	)

1377 

	#FSMC_Bªk3_R_BASE
 (
FSMC_R_BASE
 + 0x0080è

	)

1378 

	#FSMC_Bªk4_R_BASE
 (
FSMC_R_BASE
 + 0x00A0è

	)

1380 

	#DBGMCU_BASE
 ((
ušt32_t
)0xE0042000è

	)

1390 

	#TIM2
 ((
TIM_Ty³Def
 *è
TIM2_BASE
)

	)

1391 

	#TIM3
 ((
TIM_Ty³Def
 *è
TIM3_BASE
)

	)

1392 

	#TIM4
 ((
TIM_Ty³Def
 *è
TIM4_BASE
)

	)

1393 

	#TIM5
 ((
TIM_Ty³Def
 *è
TIM5_BASE
)

	)

1394 

	#TIM6
 ((
TIM_Ty³Def
 *è
TIM6_BASE
)

	)

1395 

	#TIM7
 ((
TIM_Ty³Def
 *è
TIM7_BASE
)

	)

1396 

	#TIM12
 ((
TIM_Ty³Def
 *è
TIM12_BASE
)

	)

1397 

	#TIM13
 ((
TIM_Ty³Def
 *è
TIM13_BASE
)

	)

1398 

	#TIM14
 ((
TIM_Ty³Def
 *è
TIM14_BASE
)

	)

1399 

	#RTC
 ((
RTC_Ty³Def
 *è
RTC_BASE
)

	)

1400 

	#WWDG
 ((
WWDG_Ty³Def
 *è
WWDG_BASE
)

	)

1401 

	#IWDG
 ((
IWDG_Ty³Def
 *è
IWDG_BASE
)

	)

1402 

	#SPI2
 ((
SPI_Ty³Def
 *è
SPI2_BASE
)

	)

1403 

	#SPI3
 ((
SPI_Ty³Def
 *è
SPI3_BASE
)

	)

1404 

	#USART2
 ((
USART_Ty³Def
 *è
USART2_BASE
)

	)

1405 

	#USART3
 ((
USART_Ty³Def
 *è
USART3_BASE
)

	)

1406 

	#UART4
 ((
USART_Ty³Def
 *è
UART4_BASE
)

	)

1407 

	#UART5
 ((
USART_Ty³Def
 *è
UART5_BASE
)

	)

1408 

	#I2C1
 ((
I2C_Ty³Def
 *è
I2C1_BASE
)

	)

1409 

	#I2C2
 ((
I2C_Ty³Def
 *è
I2C2_BASE
)

	)

1410 

	#CAN1
 ((
CAN_Ty³Def
 *è
CAN1_BASE
)

	)

1411 

	#CAN2
 ((
CAN_Ty³Def
 *è
CAN2_BASE
)

	)

1412 

	#BKP
 ((
BKP_Ty³Def
 *è
BKP_BASE
)

	)

1413 

	#PWR
 ((
PWR_Ty³Def
 *è
PWR_BASE
)

	)

1414 

	#DAC
 ((
DAC_Ty³Def
 *è
DAC_BASE
)

	)

1415 

	#CEC
 ((
CEC_Ty³Def
 *è
CEC_BASE
)

	)

1416 

	#AFIO
 ((
AFIO_Ty³Def
 *è
AFIO_BASE
)

	)

1417 

	#EXTI
 ((
EXTI_Ty³Def
 *è
EXTI_BASE
)

	)

1418 

	#GPIOA
 ((
GPIO_Ty³Def
 *è
GPIOA_BASE
)

	)

1419 

	#GPIOB
 ((
GPIO_Ty³Def
 *è
GPIOB_BASE
)

	)

1420 

	#GPIOC
 ((
GPIO_Ty³Def
 *è
GPIOC_BASE
)

	)

1421 

	#GPIOD
 ((
GPIO_Ty³Def
 *è
GPIOD_BASE
)

	)

1422 

	#GPIOE
 ((
GPIO_Ty³Def
 *è
GPIOE_BASE
)

	)

1423 

	#GPIOF
 ((
GPIO_Ty³Def
 *è
GPIOF_BASE
)

	)

1424 

	#GPIOG
 ((
GPIO_Ty³Def
 *è
GPIOG_BASE
)

	)

1425 

	#ADC1
 ((
ADC_Ty³Def
 *è
ADC1_BASE
)

	)

1426 

	#ADC2
 ((
ADC_Ty³Def
 *è
ADC2_BASE
)

	)

1427 

	#TIM1
 ((
TIM_Ty³Def
 *è
TIM1_BASE
)

	)

1428 

	#SPI1
 ((
SPI_Ty³Def
 *è
SPI1_BASE
)

	)

1429 

	#TIM8
 ((
TIM_Ty³Def
 *è
TIM8_BASE
)

	)

1430 

	#USART1
 ((
USART_Ty³Def
 *è
USART1_BASE
)

	)

1431 

	#ADC3
 ((
ADC_Ty³Def
 *è
ADC3_BASE
)

	)

1432 

	#TIM15
 ((
TIM_Ty³Def
 *è
TIM15_BASE
)

	)

1433 

	#TIM16
 ((
TIM_Ty³Def
 *è
TIM16_BASE
)

	)

1434 

	#TIM17
 ((
TIM_Ty³Def
 *è
TIM17_BASE
)

	)

1435 

	#TIM9
 ((
TIM_Ty³Def
 *è
TIM9_BASE
)

	)

1436 

	#TIM10
 ((
TIM_Ty³Def
 *è
TIM10_BASE
)

	)

1437 

	#TIM11
 ((
TIM_Ty³Def
 *è
TIM11_BASE
)

	)

1438 

	#SDIO
 ((
SDIO_Ty³Def
 *è
SDIO_BASE
)

	)

1439 

	#DMA1
 ((
DMA_Ty³Def
 *è
DMA1_BASE
)

	)

1440 

	#DMA2
 ((
DMA_Ty³Def
 *è
DMA2_BASE
)

	)

1441 

	#DMA1_ChªÃl1
 ((
DMA_ChªÃl_Ty³Def
 *è
DMA1_ChªÃl1_BASE
)

	)

1442 

	#DMA1_ChªÃl2
 ((
DMA_ChªÃl_Ty³Def
 *è
DMA1_ChªÃl2_BASE
)

	)

1443 

	#DMA1_ChªÃl3
 ((
DMA_ChªÃl_Ty³Def
 *è
DMA1_ChªÃl3_BASE
)

	)

1444 

	#DMA1_ChªÃl4
 ((
DMA_ChªÃl_Ty³Def
 *è
DMA1_ChªÃl4_BASE
)

	)

1445 

	#DMA1_ChªÃl5
 ((
DMA_ChªÃl_Ty³Def
 *è
DMA1_ChªÃl5_BASE
)

	)

1446 

	#DMA1_ChªÃl6
 ((
DMA_ChªÃl_Ty³Def
 *è
DMA1_ChªÃl6_BASE
)

	)

1447 

	#DMA1_ChªÃl7
 ((
DMA_ChªÃl_Ty³Def
 *è
DMA1_ChªÃl7_BASE
)

	)

1448 

	#DMA2_ChªÃl1
 ((
DMA_ChªÃl_Ty³Def
 *è
DMA2_ChªÃl1_BASE
)

	)

1449 

	#DMA2_ChªÃl2
 ((
DMA_ChªÃl_Ty³Def
 *è
DMA2_ChªÃl2_BASE
)

	)

1450 

	#DMA2_ChªÃl3
 ((
DMA_ChªÃl_Ty³Def
 *è
DMA2_ChªÃl3_BASE
)

	)

1451 

	#DMA2_ChªÃl4
 ((
DMA_ChªÃl_Ty³Def
 *è
DMA2_ChªÃl4_BASE
)

	)

1452 

	#DMA2_ChªÃl5
 ((
DMA_ChªÃl_Ty³Def
 *è
DMA2_ChªÃl5_BASE
)

	)

1453 

	#RCC
 ((
RCC_Ty³Def
 *è
RCC_BASE
)

	)

1454 

	#CRC
 ((
CRC_Ty³Def
 *è
CRC_BASE
)

	)

1455 

	#FLASH
 ((
FLASH_Ty³Def
 *è
FLASH_R_BASE
)

	)

1456 

	#OB
 ((
OB_Ty³Def
 *è
OB_BASE
)

	)

1457 

	#ETH
 ((
ETH_Ty³Def
 *è
ETH_BASE
)

	)

1458 

	#FSMC_Bªk1
 ((
FSMC_Bªk1_Ty³Def
 *è
FSMC_Bªk1_R_BASE
)

	)

1459 

	#FSMC_Bªk1E
 ((
FSMC_Bªk1E_Ty³Def
 *è
FSMC_Bªk1E_R_BASE
)

	)

1460 

	#FSMC_Bªk2
 ((
FSMC_Bªk2_Ty³Def
 *è
FSMC_Bªk2_R_BASE
)

	)

1461 

	#FSMC_Bªk3
 ((
FSMC_Bªk3_Ty³Def
 *è
FSMC_Bªk3_R_BASE
)

	)

1462 

	#FSMC_Bªk4
 ((
FSMC_Bªk4_Ty³Def
 *è
FSMC_Bªk4_R_BASE
)

	)

1463 

	#DBGMCU
 ((
DBGMCU_Ty³Def
 *è
DBGMCU_BASE
)

	)

1488 

	#CRC_DR_DR
 ((
ušt32_t
)0xFFFFFFFFè

	)

1492 

	#CRC_IDR_IDR
 ((
ušt8_t
)0xFFè

	)

1496 

	#CRC_CR_RESET
 ((
ušt8_t
)0x01è

	)

1505 

	#PWR_CR_LPDS
 ((
ušt16_t
)0x0001è

	)

1506 

	#PWR_CR_PDDS
 ((
ušt16_t
)0x0002è

	)

1507 

	#PWR_CR_CWUF
 ((
ušt16_t
)0x0004è

	)

1508 

	#PWR_CR_CSBF
 ((
ušt16_t
)0x0008è

	)

1509 

	#PWR_CR_PVDE
 ((
ušt16_t
)0x0010è

	)

1511 

	#PWR_CR_PLS
 ((
ušt16_t
)0x00E0è

	)

1512 

	#PWR_CR_PLS_0
 ((
ušt16_t
)0x0020è

	)

1513 

	#PWR_CR_PLS_1
 ((
ušt16_t
)0x0040è

	)

1514 

	#PWR_CR_PLS_2
 ((
ušt16_t
)0x0080è

	)

1517 

	#PWR_CR_PLS_2V2
 ((
ušt16_t
)0x0000è

	)

1518 

	#PWR_CR_PLS_2V3
 ((
ušt16_t
)0x0020è

	)

1519 

	#PWR_CR_PLS_2V4
 ((
ušt16_t
)0x0040è

	)

1520 

	#PWR_CR_PLS_2V5
 ((
ušt16_t
)0x0060è

	)

1521 

	#PWR_CR_PLS_2V6
 ((
ušt16_t
)0x0080è

	)

1522 

	#PWR_CR_PLS_2V7
 ((
ušt16_t
)0x00A0è

	)

1523 

	#PWR_CR_PLS_2V8
 ((
ušt16_t
)0x00C0è

	)

1524 

	#PWR_CR_PLS_2V9
 ((
ušt16_t
)0x00E0è

	)

1526 

	#PWR_CR_DBP
 ((
ušt16_t
)0x0100è

	)

1530 

	#PWR_CSR_WUF
 ((
ušt16_t
)0x0001è

	)

1531 

	#PWR_CSR_SBF
 ((
ušt16_t
)0x0002è

	)

1532 

	#PWR_CSR_PVDO
 ((
ušt16_t
)0x0004è

	)

1533 

	#PWR_CSR_EWUP
 ((
ušt16_t
)0x0100è

	)

1542 

	#BKP_DR1_D
 ((
ušt16_t
)0xFFFFè

	)

1545 

	#BKP_DR2_D
 ((
ušt16_t
)0xFFFFè

	)

1548 

	#BKP_DR3_D
 ((
ušt16_t
)0xFFFFè

	)

1551 

	#BKP_DR4_D
 ((
ušt16_t
)0xFFFFè

	)

1554 

	#BKP_DR5_D
 ((
ušt16_t
)0xFFFFè

	)

1557 

	#BKP_DR6_D
 ((
ušt16_t
)0xFFFFè

	)

1560 

	#BKP_DR7_D
 ((
ušt16_t
)0xFFFFè

	)

1563 

	#BKP_DR8_D
 ((
ušt16_t
)0xFFFFè

	)

1566 

	#BKP_DR9_D
 ((
ušt16_t
)0xFFFFè

	)

1569 

	#BKP_DR10_D
 ((
ušt16_t
)0xFFFFè

	)

1572 

	#BKP_DR11_D
 ((
ušt16_t
)0xFFFFè

	)

1575 

	#BKP_DR12_D
 ((
ušt16_t
)0xFFFFè

	)

1578 

	#BKP_DR13_D
 ((
ušt16_t
)0xFFFFè

	)

1581 

	#BKP_DR14_D
 ((
ušt16_t
)0xFFFFè

	)

1584 

	#BKP_DR15_D
 ((
ušt16_t
)0xFFFFè

	)

1587 

	#BKP_DR16_D
 ((
ušt16_t
)0xFFFFè

	)

1590 

	#BKP_DR17_D
 ((
ušt16_t
)0xFFFFè

	)

1593 

	#BKP_DR18_D
 ((
ušt16_t
)0xFFFFè

	)

1596 

	#BKP_DR19_D
 ((
ušt16_t
)0xFFFFè

	)

1599 

	#BKP_DR20_D
 ((
ušt16_t
)0xFFFFè

	)

1602 

	#BKP_DR21_D
 ((
ušt16_t
)0xFFFFè

	)

1605 

	#BKP_DR22_D
 ((
ušt16_t
)0xFFFFè

	)

1608 

	#BKP_DR23_D
 ((
ušt16_t
)0xFFFFè

	)

1611 

	#BKP_DR24_D
 ((
ušt16_t
)0xFFFFè

	)

1614 

	#BKP_DR25_D
 ((
ušt16_t
)0xFFFFè

	)

1617 

	#BKP_DR26_D
 ((
ušt16_t
)0xFFFFè

	)

1620 

	#BKP_DR27_D
 ((
ušt16_t
)0xFFFFè

	)

1623 

	#BKP_DR28_D
 ((
ušt16_t
)0xFFFFè

	)

1626 

	#BKP_DR29_D
 ((
ušt16_t
)0xFFFFè

	)

1629 

	#BKP_DR30_D
 ((
ušt16_t
)0xFFFFè

	)

1632 

	#BKP_DR31_D
 ((
ušt16_t
)0xFFFFè

	)

1635 

	#BKP_DR32_D
 ((
ušt16_t
)0xFFFFè

	)

1638 

	#BKP_DR33_D
 ((
ušt16_t
)0xFFFFè

	)

1641 

	#BKP_DR34_D
 ((
ušt16_t
)0xFFFFè

	)

1644 

	#BKP_DR35_D
 ((
ušt16_t
)0xFFFFè

	)

1647 

	#BKP_DR36_D
 ((
ušt16_t
)0xFFFFè

	)

1650 

	#BKP_DR37_D
 ((
ušt16_t
)0xFFFFè

	)

1653 

	#BKP_DR38_D
 ((
ušt16_t
)0xFFFFè

	)

1656 

	#BKP_DR39_D
 ((
ušt16_t
)0xFFFFè

	)

1659 

	#BKP_DR40_D
 ((
ušt16_t
)0xFFFFè

	)

1662 

	#BKP_DR41_D
 ((
ušt16_t
)0xFFFFè

	)

1665 

	#BKP_DR42_D
 ((
ušt16_t
)0xFFFFè

	)

1668 

	#BKP_RTCCR_CAL
 ((
ušt16_t
)0x007Fè

	)

1669 

	#BKP_RTCCR_CCO
 ((
ušt16_t
)0x0080è

	)

1670 

	#BKP_RTCCR_ASOE
 ((
ušt16_t
)0x0100è

	)

1671 

	#BKP_RTCCR_ASOS
 ((
ušt16_t
)0x0200è

	)

1674 

	#BKP_CR_TPE
 ((
ušt8_t
)0x01è

	)

1675 

	#BKP_CR_TPAL
 ((
ušt8_t
)0x02è

	)

1678 

	#BKP_CSR_CTE
 ((
ušt16_t
)0x0001è

	)

1679 

	#BKP_CSR_CTI
 ((
ušt16_t
)0x0002è

	)

1680 

	#BKP_CSR_TPIE
 ((
ušt16_t
)0x0004è

	)

1681 

	#BKP_CSR_TEF
 ((
ušt16_t
)0x0100è

	)

1682 

	#BKP_CSR_TIF
 ((
ušt16_t
)0x0200è

	)

1691 

	#RCC_CR_HSION
 ((
ušt32_t
)0x00000001è

	)

1692 

	#RCC_CR_HSIRDY
 ((
ušt32_t
)0x00000002è

	)

1693 

	#RCC_CR_HSITRIM
 ((
ušt32_t
)0x000000F8è

	)

1694 

	#RCC_CR_HSICAL
 ((
ušt32_t
)0x0000FF00è

	)

1695 

	#RCC_CR_HSEON
 ((
ušt32_t
)0x00010000è

	)

1696 

	#RCC_CR_HSERDY
 ((
ušt32_t
)0x00020000è

	)

1697 

	#RCC_CR_HSEBYP
 ((
ušt32_t
)0x00040000è

	)

1698 

	#RCC_CR_CSSON
 ((
ušt32_t
)0x00080000è

	)

1699 

	#RCC_CR_PLLON
 ((
ušt32_t
)0x01000000è

	)

1700 

	#RCC_CR_PLLRDY
 ((
ušt32_t
)0x02000000è

	)

1702 #ifdeà
STM32F10X_CL


1703 

	#RCC_CR_PLL2ON
 ((
ušt32_t
)0x04000000è

	)

1704 

	#RCC_CR_PLL2RDY
 ((
ušt32_t
)0x08000000è

	)

1705 

	#RCC_CR_PLL3ON
 ((
ušt32_t
)0x10000000è

	)

1706 

	#RCC_CR_PLL3RDY
 ((
ušt32_t
)0x20000000è

	)

1711 

	#RCC_CFGR_SW
 ((
ušt32_t
)0x00000003è

	)

1712 

	#RCC_CFGR_SW_0
 ((
ušt32_t
)0x00000001è

	)

1713 

	#RCC_CFGR_SW_1
 ((
ušt32_t
)0x00000002è

	)

1715 

	#RCC_CFGR_SW_HSI
 ((
ušt32_t
)0x00000000è

	)

1716 

	#RCC_CFGR_SW_HSE
 ((
ušt32_t
)0x00000001è

	)

1717 

	#RCC_CFGR_SW_PLL
 ((
ušt32_t
)0x00000002è

	)

1720 

	#RCC_CFGR_SWS
 ((
ušt32_t
)0x0000000Cè

	)

1721 

	#RCC_CFGR_SWS_0
 ((
ušt32_t
)0x00000004è

	)

1722 

	#RCC_CFGR_SWS_1
 ((
ušt32_t
)0x00000008è

	)

1724 

	#RCC_CFGR_SWS_HSI
 ((
ušt32_t
)0x00000000è

	)

1725 

	#RCC_CFGR_SWS_HSE
 ((
ušt32_t
)0x00000004è

	)

1726 

	#RCC_CFGR_SWS_PLL
 ((
ušt32_t
)0x00000008è

	)

1729 

	#RCC_CFGR_HPRE
 ((
ušt32_t
)0x000000F0è

	)

1730 

	#RCC_CFGR_HPRE_0
 ((
ušt32_t
)0x00000010è

	)

1731 

	#RCC_CFGR_HPRE_1
 ((
ušt32_t
)0x00000020è

	)

1732 

	#RCC_CFGR_HPRE_2
 ((
ušt32_t
)0x00000040è

	)

1733 

	#RCC_CFGR_HPRE_3
 ((
ušt32_t
)0x00000080è

	)

1735 

	#RCC_CFGR_HPRE_DIV1
 ((
ušt32_t
)0x00000000è

	)

1736 

	#RCC_CFGR_HPRE_DIV2
 ((
ušt32_t
)0x00000080è

	)

1737 

	#RCC_CFGR_HPRE_DIV4
 ((
ušt32_t
)0x00000090è

	)

1738 

	#RCC_CFGR_HPRE_DIV8
 ((
ušt32_t
)0x000000A0è

	)

1739 

	#RCC_CFGR_HPRE_DIV16
 ((
ušt32_t
)0x000000B0è

	)

1740 

	#RCC_CFGR_HPRE_DIV64
 ((
ušt32_t
)0x000000C0è

	)

1741 

	#RCC_CFGR_HPRE_DIV128
 ((
ušt32_t
)0x000000D0è

	)

1742 

	#RCC_CFGR_HPRE_DIV256
 ((
ušt32_t
)0x000000E0è

	)

1743 

	#RCC_CFGR_HPRE_DIV512
 ((
ušt32_t
)0x000000F0è

	)

1746 

	#RCC_CFGR_PPRE1
 ((
ušt32_t
)0x00000700è

	)

1747 

	#RCC_CFGR_PPRE1_0
 ((
ušt32_t
)0x00000100è

	)

1748 

	#RCC_CFGR_PPRE1_1
 ((
ušt32_t
)0x00000200è

	)

1749 

	#RCC_CFGR_PPRE1_2
 ((
ušt32_t
)0x00000400è

	)

1751 

	#RCC_CFGR_PPRE1_DIV1
 ((
ušt32_t
)0x00000000è

	)

1752 

	#RCC_CFGR_PPRE1_DIV2
 ((
ušt32_t
)0x00000400è

	)

1753 

	#RCC_CFGR_PPRE1_DIV4
 ((
ušt32_t
)0x00000500è

	)

1754 

	#RCC_CFGR_PPRE1_DIV8
 ((
ušt32_t
)0x00000600è

	)

1755 

	#RCC_CFGR_PPRE1_DIV16
 ((
ušt32_t
)0x00000700è

	)

1758 

	#RCC_CFGR_PPRE2
 ((
ušt32_t
)0x00003800è

	)

1759 

	#RCC_CFGR_PPRE2_0
 ((
ušt32_t
)0x00000800è

	)

1760 

	#RCC_CFGR_PPRE2_1
 ((
ušt32_t
)0x00001000è

	)

1761 

	#RCC_CFGR_PPRE2_2
 ((
ušt32_t
)0x00002000è

	)

1763 

	#RCC_CFGR_PPRE2_DIV1
 ((
ušt32_t
)0x00000000è

	)

1764 

	#RCC_CFGR_PPRE2_DIV2
 ((
ušt32_t
)0x00002000è

	)

1765 

	#RCC_CFGR_PPRE2_DIV4
 ((
ušt32_t
)0x00002800è

	)

1766 

	#RCC_CFGR_PPRE2_DIV8
 ((
ušt32_t
)0x00003000è

	)

1767 

	#RCC_CFGR_PPRE2_DIV16
 ((
ušt32_t
)0x00003800è

	)

1770 

	#RCC_CFGR_ADCPRE
 ((
ušt32_t
)0x0000C000è

	)

1771 

	#RCC_CFGR_ADCPRE_0
 ((
ušt32_t
)0x00004000è

	)

1772 

	#RCC_CFGR_ADCPRE_1
 ((
ušt32_t
)0x00008000è

	)

1774 

	#RCC_CFGR_ADCPRE_DIV2
 ((
ušt32_t
)0x00000000è

	)

1775 

	#RCC_CFGR_ADCPRE_DIV4
 ((
ušt32_t
)0x00004000è

	)

1776 

	#RCC_CFGR_ADCPRE_DIV6
 ((
ušt32_t
)0x00008000è

	)

1777 

	#RCC_CFGR_ADCPRE_DIV8
 ((
ušt32_t
)0x0000C000è

	)

1779 

	#RCC_CFGR_PLLSRC
 ((
ušt32_t
)0x00010000è

	)

1781 

	#RCC_CFGR_PLLXTPRE
 ((
ušt32_t
)0x00020000è

	)

1784 

	#RCC_CFGR_PLLMULL
 ((
ušt32_t
)0x003C0000è

	)

1785 

	#RCC_CFGR_PLLMULL_0
 ((
ušt32_t
)0x00040000è

	)

1786 

	#RCC_CFGR_PLLMULL_1
 ((
ušt32_t
)0x00080000è

	)

1787 

	#RCC_CFGR_PLLMULL_2
 ((
ušt32_t
)0x00100000è

	)

1788 

	#RCC_CFGR_PLLMULL_3
 ((
ušt32_t
)0x00200000è

	)

1790 #ifdeà
STM32F10X_CL


1791 

	#RCC_CFGR_PLLSRC_HSI_Div2
 ((
ušt32_t
)0x00000000è

	)

1792 

	#RCC_CFGR_PLLSRC_PREDIV1
 ((
ušt32_t
)0x00010000è

	)

1794 

	#RCC_CFGR_PLLXTPRE_PREDIV1
 ((
ušt32_t
)0x00000000è

	)

1795 

	#RCC_CFGR_PLLXTPRE_PREDIV1_Div2
 ((
ušt32_t
)0x00020000è

	)

1797 

	#RCC_CFGR_PLLMULL4
 ((
ušt32_t
)0x00080000è

	)

1798 

	#RCC_CFGR_PLLMULL5
 ((
ušt32_t
)0x000C0000è

	)

1799 

	#RCC_CFGR_PLLMULL6
 ((
ušt32_t
)0x00100000è

	)

1800 

	#RCC_CFGR_PLLMULL7
 ((
ušt32_t
)0x00140000è

	)

1801 

	#RCC_CFGR_PLLMULL8
 ((
ušt32_t
)0x00180000è

	)

1802 

	#RCC_CFGR_PLLMULL9
 ((
ušt32_t
)0x001C0000è

	)

1803 

	#RCC_CFGR_PLLMULL6_5
 ((
ušt32_t
)0x00340000è

	)

1805 

	#RCC_CFGR_OTGFSPRE
 ((
ušt32_t
)0x00400000è

	)

1808 

	#RCC_CFGR_MCO
 ((
ušt32_t
)0x0F000000è

	)

1809 

	#RCC_CFGR_MCO_0
 ((
ušt32_t
)0x01000000è

	)

1810 

	#RCC_CFGR_MCO_1
 ((
ušt32_t
)0x02000000è

	)

1811 

	#RCC_CFGR_MCO_2
 ((
ušt32_t
)0x04000000è

	)

1812 

	#RCC_CFGR_MCO_3
 ((
ušt32_t
)0x08000000è

	)

1814 

	#RCC_CFGR_MCO_NOCLOCK
 ((
ušt32_t
)0x00000000è

	)

1815 

	#RCC_CFGR_MCO_SYSCLK
 ((
ušt32_t
)0x04000000è

	)

1816 

	#RCC_CFGR_MCO_HSI
 ((
ušt32_t
)0x05000000è

	)

1817 

	#RCC_CFGR_MCO_HSE
 ((
ušt32_t
)0x06000000è

	)

1818 

	#RCC_CFGR_MCO_PLLCLK_Div2
 ((
ušt32_t
)0x07000000è

	)

1819 

	#RCC_CFGR_MCO_PLL2CLK
 ((
ušt32_t
)0x08000000è

	)

1820 

	#RCC_CFGR_MCO_PLL3CLK_Div2
 ((
ušt32_t
)0x09000000è

	)

1821 

	#RCC_CFGR_MCO_Ext_HSE
 ((
ušt32_t
)0x0A000000è

	)

1822 

	#RCC_CFGR_MCO_PLL3CLK
 ((
ušt32_t
)0x0B000000è

	)

1823 #–ià
defšed
 (
STM32F10X_LD_VL
è|| defšed (
STM32F10X_MD_VL
è|| defšed (
STM32F10X_HD_VL
)

1824 

	#RCC_CFGR_PLLSRC_HSI_Div2
 ((
ušt32_t
)0x00000000è

	)

1825 

	#RCC_CFGR_PLLSRC_PREDIV1
 ((
ušt32_t
)0x00010000è

	)

1827 

	#RCC_CFGR_PLLXTPRE_PREDIV1
 ((
ušt32_t
)0x00000000è

	)

1828 

	#RCC_CFGR_PLLXTPRE_PREDIV1_Div2
 ((
ušt32_t
)0x00020000è

	)

1830 

	#RCC_CFGR_PLLMULL2
 ((
ušt32_t
)0x00000000è

	)

1831 

	#RCC_CFGR_PLLMULL3
 ((
ušt32_t
)0x00040000è

	)

1832 

	#RCC_CFGR_PLLMULL4
 ((
ušt32_t
)0x00080000è

	)

1833 

	#RCC_CFGR_PLLMULL5
 ((
ušt32_t
)0x000C0000è

	)

1834 

	#RCC_CFGR_PLLMULL6
 ((
ušt32_t
)0x00100000è

	)

1835 

	#RCC_CFGR_PLLMULL7
 ((
ušt32_t
)0x00140000è

	)

1836 

	#RCC_CFGR_PLLMULL8
 ((
ušt32_t
)0x00180000è

	)

1837 

	#RCC_CFGR_PLLMULL9
 ((
ušt32_t
)0x001C0000è

	)

1838 

	#RCC_CFGR_PLLMULL10
 ((
ušt32_t
)0x00200000è

	)

1839 

	#RCC_CFGR_PLLMULL11
 ((
ušt32_t
)0x00240000è

	)

1840 

	#RCC_CFGR_PLLMULL12
 ((
ušt32_t
)0x00280000è

	)

1841 

	#RCC_CFGR_PLLMULL13
 ((
ušt32_t
)0x002C0000è

	)

1842 

	#RCC_CFGR_PLLMULL14
 ((
ušt32_t
)0x00300000è

	)

1843 

	#RCC_CFGR_PLLMULL15
 ((
ušt32_t
)0x00340000è

	)

1844 

	#RCC_CFGR_PLLMULL16
 ((
ušt32_t
)0x00380000è

	)

1847 

	#RCC_CFGR_MCO
 ((
ušt32_t
)0x07000000è

	)

1848 

	#RCC_CFGR_MCO_0
 ((
ušt32_t
)0x01000000è

	)

1849 

	#RCC_CFGR_MCO_1
 ((
ušt32_t
)0x02000000è

	)

1850 

	#RCC_CFGR_MCO_2
 ((
ušt32_t
)0x04000000è

	)

1852 

	#RCC_CFGR_MCO_NOCLOCK
 ((
ušt32_t
)0x00000000è

	)

1853 

	#RCC_CFGR_MCO_SYSCLK
 ((
ušt32_t
)0x04000000è

	)

1854 

	#RCC_CFGR_MCO_HSI
 ((
ušt32_t
)0x05000000è

	)

1855 

	#RCC_CFGR_MCO_HSE
 ((
ušt32_t
)0x06000000è

	)

1856 

	#RCC_CFGR_MCO_PLL
 ((
ušt32_t
)0x07000000è

	)

1858 

	#RCC_CFGR_PLLSRC_HSI_Div2
 ((
ušt32_t
)0x00000000è

	)

1859 

	#RCC_CFGR_PLLSRC_HSE
 ((
ušt32_t
)0x00010000è

	)

1861 

	#RCC_CFGR_PLLXTPRE_HSE
 ((
ušt32_t
)0x00000000è

	)

1862 

	#RCC_CFGR_PLLXTPRE_HSE_Div2
 ((
ušt32_t
)0x00020000è

	)

1864 

	#RCC_CFGR_PLLMULL2
 ((
ušt32_t
)0x00000000è

	)

1865 

	#RCC_CFGR_PLLMULL3
 ((
ušt32_t
)0x00040000è

	)

1866 

	#RCC_CFGR_PLLMULL4
 ((
ušt32_t
)0x00080000è

	)

1867 

	#RCC_CFGR_PLLMULL5
 ((
ušt32_t
)0x000C0000è

	)

1868 

	#RCC_CFGR_PLLMULL6
 ((
ušt32_t
)0x00100000è

	)

1869 

	#RCC_CFGR_PLLMULL7
 ((
ušt32_t
)0x00140000è

	)

1870 

	#RCC_CFGR_PLLMULL8
 ((
ušt32_t
)0x00180000è

	)

1871 

	#RCC_CFGR_PLLMULL9
 ((
ušt32_t
)0x001C0000è

	)

1872 

	#RCC_CFGR_PLLMULL10
 ((
ušt32_t
)0x00200000è

	)

1873 

	#RCC_CFGR_PLLMULL11
 ((
ušt32_t
)0x00240000è

	)

1874 

	#RCC_CFGR_PLLMULL12
 ((
ušt32_t
)0x00280000è

	)

1875 

	#RCC_CFGR_PLLMULL13
 ((
ušt32_t
)0x002C0000è

	)

1876 

	#RCC_CFGR_PLLMULL14
 ((
ušt32_t
)0x00300000è

	)

1877 

	#RCC_CFGR_PLLMULL15
 ((
ušt32_t
)0x00340000è

	)

1878 

	#RCC_CFGR_PLLMULL16
 ((
ušt32_t
)0x00380000è

	)

1879 

	#RCC_CFGR_USBPRE
 ((
ušt32_t
)0x00400000è

	)

1882 

	#RCC_CFGR_MCO
 ((
ušt32_t
)0x07000000è

	)

1883 

	#RCC_CFGR_MCO_0
 ((
ušt32_t
)0x01000000è

	)

1884 

	#RCC_CFGR_MCO_1
 ((
ušt32_t
)0x02000000è

	)

1885 

	#RCC_CFGR_MCO_2
 ((
ušt32_t
)0x04000000è

	)

1887 

	#RCC_CFGR_MCO_NOCLOCK
 ((
ušt32_t
)0x00000000è

	)

1888 

	#RCC_CFGR_MCO_SYSCLK
 ((
ušt32_t
)0x04000000è

	)

1889 

	#RCC_CFGR_MCO_HSI
 ((
ušt32_t
)0x05000000è

	)

1890 

	#RCC_CFGR_MCO_HSE
 ((
ušt32_t
)0x06000000è

	)

1891 

	#RCC_CFGR_MCO_PLL
 ((
ušt32_t
)0x07000000è

	)

1895 

	#RCC_CIR_LSIRDYF
 ((
ušt32_t
)0x00000001è

	)

1896 

	#RCC_CIR_LSERDYF
 ((
ušt32_t
)0x00000002è

	)

1897 

	#RCC_CIR_HSIRDYF
 ((
ušt32_t
)0x00000004è

	)

1898 

	#RCC_CIR_HSERDYF
 ((
ušt32_t
)0x00000008è

	)

1899 

	#RCC_CIR_PLLRDYF
 ((
ušt32_t
)0x00000010è

	)

1900 

	#RCC_CIR_CSSF
 ((
ušt32_t
)0x00000080è

	)

1901 

	#RCC_CIR_LSIRDYIE
 ((
ušt32_t
)0x00000100è

	)

1902 

	#RCC_CIR_LSERDYIE
 ((
ušt32_t
)0x00000200è

	)

1903 

	#RCC_CIR_HSIRDYIE
 ((
ušt32_t
)0x00000400è

	)

1904 

	#RCC_CIR_HSERDYIE
 ((
ušt32_t
)0x00000800è

	)

1905 

	#RCC_CIR_PLLRDYIE
 ((
ušt32_t
)0x00001000è

	)

1906 

	#RCC_CIR_LSIRDYC
 ((
ušt32_t
)0x00010000è

	)

1907 

	#RCC_CIR_LSERDYC
 ((
ušt32_t
)0x00020000è

	)

1908 

	#RCC_CIR_HSIRDYC
 ((
ušt32_t
)0x00040000è

	)

1909 

	#RCC_CIR_HSERDYC
 ((
ušt32_t
)0x00080000è

	)

1910 

	#RCC_CIR_PLLRDYC
 ((
ušt32_t
)0x00100000è

	)

1911 

	#RCC_CIR_CSSC
 ((
ušt32_t
)0x00800000è

	)

1913 #ifdeà
STM32F10X_CL


1914 

	#RCC_CIR_PLL2RDYF
 ((
ušt32_t
)0x00000020è

	)

1915 

	#RCC_CIR_PLL3RDYF
 ((
ušt32_t
)0x00000040è

	)

1916 

	#RCC_CIR_PLL2RDYIE
 ((
ušt32_t
)0x00002000è

	)

1917 

	#RCC_CIR_PLL3RDYIE
 ((
ušt32_t
)0x00004000è

	)

1918 

	#RCC_CIR_PLL2RDYC
 ((
ušt32_t
)0x00200000è

	)

1919 

	#RCC_CIR_PLL3RDYC
 ((
ušt32_t
)0x00400000è

	)

1923 

	#RCC_APB2RSTR_AFIORST
 ((
ušt32_t
)0x00000001è

	)

1924 

	#RCC_APB2RSTR_IOPARST
 ((
ušt32_t
)0x00000004è

	)

1925 

	#RCC_APB2RSTR_IOPBRST
 ((
ušt32_t
)0x00000008è

	)

1926 

	#RCC_APB2RSTR_IOPCRST
 ((
ušt32_t
)0x00000010è

	)

1927 

	#RCC_APB2RSTR_IOPDRST
 ((
ušt32_t
)0x00000020è

	)

1928 

	#RCC_APB2RSTR_ADC1RST
 ((
ušt32_t
)0x00000200è

	)

1930 #ià!
defšed
 (
STM32F10X_LD_VL
è&& !defšed (
STM32F10X_MD_VL
è&& !defšed (
STM32F10X_HD_VL
)

1931 

	#RCC_APB2RSTR_ADC2RST
 ((
ušt32_t
)0x00000400è

	)

1934 

	#RCC_APB2RSTR_TIM1RST
 ((
ušt32_t
)0x00000800è

	)

1935 

	#RCC_APB2RSTR_SPI1RST
 ((
ušt32_t
)0x00001000è

	)

1936 

	#RCC_APB2RSTR_USART1RST
 ((
ušt32_t
)0x00004000è

	)

1938 #ià
defšed
 (
STM32F10X_LD_VL
è|| defšed (
STM32F10X_MD_VL
è|| defšed (
STM32F10X_HD_VL
)

1939 

	#RCC_APB2RSTR_TIM15RST
 ((
ušt32_t
)0x00010000è

	)

1940 

	#RCC_APB2RSTR_TIM16RST
 ((
ušt32_t
)0x00020000è

	)

1941 

	#RCC_APB2RSTR_TIM17RST
 ((
ušt32_t
)0x00040000è

	)

1944 #ià!
defšed
 (
STM32F10X_LD
è&& !defšed (
STM32F10X_LD_VL
)

1945 

	#RCC_APB2RSTR_IOPERST
 ((
ušt32_t
)0x00000040è

	)

1948 #ià
defšed
 (
STM32F10X_HD
è|| defšed (
STM32F10X_XL
)

1949 

	#RCC_APB2RSTR_IOPFRST
 ((
ušt32_t
)0x00000080è

	)

1950 

	#RCC_APB2RSTR_IOPGRST
 ((
ušt32_t
)0x00000100è

	)

1951 

	#RCC_APB2RSTR_TIM8RST
 ((
ušt32_t
)0x00002000è

	)

1952 

	#RCC_APB2RSTR_ADC3RST
 ((
ušt32_t
)0x00008000è

	)

1955 #ià
defšed
 (
STM32F10X_HD_VL
)

1956 

	#RCC_APB2RSTR_IOPFRST
 ((
ušt32_t
)0x00000080è

	)

1957 

	#RCC_APB2RSTR_IOPGRST
 ((
ušt32_t
)0x00000100è

	)

1960 #ifdeà
STM32F10X_XL


1961 

	#RCC_APB2RSTR_TIM9RST
 ((
ušt32_t
)0x00080000è

	)

1962 

	#RCC_APB2RSTR_TIM10RST
 ((
ušt32_t
)0x00100000è

	)

1963 

	#RCC_APB2RSTR_TIM11RST
 ((
ušt32_t
)0x00200000è

	)

1967 

	#RCC_APB1RSTR_TIM2RST
 ((
ušt32_t
)0x00000001è

	)

1968 

	#RCC_APB1RSTR_TIM3RST
 ((
ušt32_t
)0x00000002è

	)

1969 

	#RCC_APB1RSTR_WWDGRST
 ((
ušt32_t
)0x00000800è

	)

1970 

	#RCC_APB1RSTR_USART2RST
 ((
ušt32_t
)0x00020000è

	)

1971 

	#RCC_APB1RSTR_I2C1RST
 ((
ušt32_t
)0x00200000è

	)

1973 #ià!
defšed
 (
STM32F10X_LD_VL
è&& !defšed (
STM32F10X_MD_VL
è&& !defšed (
STM32F10X_HD_VL
)

1974 

	#RCC_APB1RSTR_CAN1RST
 ((
ušt32_t
)0x02000000è

	)

1977 

	#RCC_APB1RSTR_BKPRST
 ((
ušt32_t
)0x08000000è

	)

1978 

	#RCC_APB1RSTR_PWRRST
 ((
ušt32_t
)0x10000000è

	)

1980 #ià!
defšed
 (
STM32F10X_LD
è&& !defšed (
STM32F10X_LD_VL
)

1981 

	#RCC_APB1RSTR_TIM4RST
 ((
ušt32_t
)0x00000004è

	)

1982 

	#RCC_APB1RSTR_SPI2RST
 ((
ušt32_t
)0x00004000è

	)

1983 

	#RCC_APB1RSTR_USART3RST
 ((
ušt32_t
)0x00040000è

	)

1984 

	#RCC_APB1RSTR_I2C2RST
 ((
ušt32_t
)0x00400000è

	)

1987 #ià
defšed
 (
STM32F10X_HD
è|| defšed (
STM32F10X_MD
è|| defšed (
STM32F10X_LD
è|| defšed (
STM32F10X_XL
)

1988 

	#RCC_APB1RSTR_USBRST
 ((
ušt32_t
)0x00800000è

	)

1991 #ià
defšed
 (
STM32F10X_HD
è|| defšed (
STM32F10X_CL
è|| defšed (
STM32F10X_XL
)

1992 

	#RCC_APB1RSTR_TIM5RST
 ((
ušt32_t
)0x00000008è

	)

1993 

	#RCC_APB1RSTR_TIM6RST
 ((
ušt32_t
)0x00000010è

	)

1994 

	#RCC_APB1RSTR_TIM7RST
 ((
ušt32_t
)0x00000020è

	)

1995 

	#RCC_APB1RSTR_SPI3RST
 ((
ušt32_t
)0x00008000è

	)

1996 

	#RCC_APB1RSTR_UART4RST
 ((
ušt32_t
)0x00080000è

	)

1997 

	#RCC_APB1RSTR_UART5RST
 ((
ušt32_t
)0x00100000è

	)

1998 

	#RCC_APB1RSTR_DACRST
 ((
ušt32_t
)0x20000000è

	)

2001 #ià
defšed
 (
STM32F10X_LD_VL
è|| defšed (
STM32F10X_MD_VL
è|| defšed (
STM32F10X_HD_VL
)

2002 

	#RCC_APB1RSTR_TIM6RST
 ((
ušt32_t
)0x00000010è

	)

2003 

	#RCC_APB1RSTR_TIM7RST
 ((
ušt32_t
)0x00000020è

	)

2004 

	#RCC_APB1RSTR_DACRST
 ((
ušt32_t
)0x20000000è

	)

2005 

	#RCC_APB1RSTR_CECRST
 ((
ušt32_t
)0x40000000è

	)

2008 #ià
defšed
 (
STM32F10X_HD_VL
)

2009 

	#RCC_APB1RSTR_TIM5RST
 ((
ušt32_t
)0x00000008è

	)

2010 

	#RCC_APB1RSTR_TIM12RST
 ((
ušt32_t
)0x00000040è

	)

2011 

	#RCC_APB1RSTR_TIM13RST
 ((
ušt32_t
)0x00000080è

	)

2012 

	#RCC_APB1RSTR_TIM14RST
 ((
ušt32_t
)0x00000100è

	)

2013 

	#RCC_APB1RSTR_SPI3RST
 ((
ušt32_t
)0x00008000è

	)

2014 

	#RCC_APB1RSTR_UART4RST
 ((
ušt32_t
)0x00080000è

	)

2015 

	#RCC_APB1RSTR_UART5RST
 ((
ušt32_t
)0x00100000è

	)

2018 #ifdeà
STM32F10X_CL


2019 

	#RCC_APB1RSTR_CAN2RST
 ((
ušt32_t
)0x04000000è

	)

2022 #ifdeà
STM32F10X_XL


2023 

	#RCC_APB1RSTR_TIM12RST
 ((
ušt32_t
)0x00000040è

	)

2024 

	#RCC_APB1RSTR_TIM13RST
 ((
ušt32_t
)0x00000080è

	)

2025 

	#RCC_APB1RSTR_TIM14RST
 ((
ušt32_t
)0x00000100è

	)

2029 

	#RCC_AHBENR_DMA1EN
 ((
ušt16_t
)0x0001è

	)

2030 

	#RCC_AHBENR_SRAMEN
 ((
ušt16_t
)0x0004è

	)

2031 

	#RCC_AHBENR_FLITFEN
 ((
ušt16_t
)0x0010è

	)

2032 

	#RCC_AHBENR_CRCEN
 ((
ušt16_t
)0x0040è

	)

2034 #ià
defšed
 (
STM32F10X_HD
è|| defšed (
STM32F10X_XL
è|| defšed (
STM32F10X_CL
è|| defšed (
STM32F10X_HD_VL
)

2035 

	#RCC_AHBENR_DMA2EN
 ((
ušt16_t
)0x0002è

	)

2038 #ià
defšed
 (
STM32F10X_HD
è|| defšed (
STM32F10X_XL
)

2039 

	#RCC_AHBENR_FSMCEN
 ((
ušt16_t
)0x0100è

	)

2040 

	#RCC_AHBENR_SDIOEN
 ((
ušt16_t
)0x0400è

	)

2043 #ià
defšed
 (
STM32F10X_HD_VL
)

2044 

	#RCC_AHBENR_FSMCEN
 ((
ušt16_t
)0x0100è

	)

2047 #ifdeà
STM32F10X_CL


2048 

	#RCC_AHBENR_OTGFSEN
 ((
ušt32_t
)0x00001000è

	)

2049 

	#RCC_AHBENR_ETHMACEN
 ((
ušt32_t
)0x00004000è

	)

2050 

	#RCC_AHBENR_ETHMACTXEN
 ((
ušt32_t
)0x00008000è

	)

2051 

	#RCC_AHBENR_ETHMACRXEN
 ((
ušt32_t
)0x00010000è

	)

2055 

	#RCC_APB2ENR_AFIOEN
 ((
ušt32_t
)0x00000001è

	)

2056 

	#RCC_APB2ENR_IOPAEN
 ((
ušt32_t
)0x00000004è

	)

2057 

	#RCC_APB2ENR_IOPBEN
 ((
ušt32_t
)0x00000008è

	)

2058 

	#RCC_APB2ENR_IOPCEN
 ((
ušt32_t
)0x00000010è

	)

2059 

	#RCC_APB2ENR_IOPDEN
 ((
ušt32_t
)0x00000020è

	)

2060 

	#RCC_APB2ENR_ADC1EN
 ((
ušt32_t
)0x00000200è

	)

2062 #ià!
defšed
 (
STM32F10X_LD_VL
è&& !defšed (
STM32F10X_MD_VL
è&& !defšed (
STM32F10X_HD_VL
)

2063 

	#RCC_APB2ENR_ADC2EN
 ((
ušt32_t
)0x00000400è

	)

2066 

	#RCC_APB2ENR_TIM1EN
 ((
ušt32_t
)0x00000800è

	)

2067 

	#RCC_APB2ENR_SPI1EN
 ((
ušt32_t
)0x00001000è

	)

2068 

	#RCC_APB2ENR_USART1EN
 ((
ušt32_t
)0x00004000è

	)

2070 #ià
defšed
 (
STM32F10X_LD_VL
è|| defšed (
STM32F10X_MD_VL
è|| defšed (
STM32F10X_HD_VL
)

2071 

	#RCC_APB2ENR_TIM15EN
 ((
ušt32_t
)0x00010000è

	)

2072 

	#RCC_APB2ENR_TIM16EN
 ((
ušt32_t
)0x00020000è

	)

2073 

	#RCC_APB2ENR_TIM17EN
 ((
ušt32_t
)0x00040000è

	)

2076 #ià!
defšed
 (
STM32F10X_LD
è&& !defšed (
STM32F10X_LD_VL
)

2077 

	#RCC_APB2ENR_IOPEEN
 ((
ušt32_t
)0x00000040è

	)

2080 #ià
defšed
 (
STM32F10X_HD
è|| defšed (
STM32F10X_XL
)

2081 

	#RCC_APB2ENR_IOPFEN
 ((
ušt32_t
)0x00000080è

	)

2082 

	#RCC_APB2ENR_IOPGEN
 ((
ušt32_t
)0x00000100è

	)

2083 

	#RCC_APB2ENR_TIM8EN
 ((
ušt32_t
)0x00002000è

	)

2084 

	#RCC_APB2ENR_ADC3EN
 ((
ušt32_t
)0x00008000è

	)

2087 #ià
defšed
 (
STM32F10X_HD_VL
)

2088 

	#RCC_APB2ENR_IOPFEN
 ((
ušt32_t
)0x00000080è

	)

2089 

	#RCC_APB2ENR_IOPGEN
 ((
ušt32_t
)0x00000100è

	)

2092 #ifdeà
STM32F10X_XL


2093 

	#RCC_APB2ENR_TIM9EN
 ((
ušt32_t
)0x00080000è

	)

2094 

	#RCC_APB2ENR_TIM10EN
 ((
ušt32_t
)0x00100000è

	)

2095 

	#RCC_APB2ENR_TIM11EN
 ((
ušt32_t
)0x00200000è

	)

2099 

	#RCC_APB1ENR_TIM2EN
 ((
ušt32_t
)0x00000001è

	)

2100 

	#RCC_APB1ENR_TIM3EN
 ((
ušt32_t
)0x00000002è

	)

2101 

	#RCC_APB1ENR_WWDGEN
 ((
ušt32_t
)0x00000800è

	)

2102 

	#RCC_APB1ENR_USART2EN
 ((
ušt32_t
)0x00020000è

	)

2103 

	#RCC_APB1ENR_I2C1EN
 ((
ušt32_t
)0x00200000è

	)

2105 #ià!
defšed
 (
STM32F10X_LD_VL
è&& !defšed (
STM32F10X_MD_VL
è&& !defšed (
STM32F10X_HD_VL
)

2106 

	#RCC_APB1ENR_CAN1EN
 ((
ušt32_t
)0x02000000è

	)

2109 

	#RCC_APB1ENR_BKPEN
 ((
ušt32_t
)0x08000000è

	)

2110 

	#RCC_APB1ENR_PWREN
 ((
ušt32_t
)0x10000000è

	)

2112 #ià!
defšed
 (
STM32F10X_LD
è&& !defšed (
STM32F10X_LD_VL
)

2113 

	#RCC_APB1ENR_TIM4EN
 ((
ušt32_t
)0x00000004è

	)

2114 

	#RCC_APB1ENR_SPI2EN
 ((
ušt32_t
)0x00004000è

	)

2115 

	#RCC_APB1ENR_USART3EN
 ((
ušt32_t
)0x00040000è

	)

2116 

	#RCC_APB1ENR_I2C2EN
 ((
ušt32_t
)0x00400000è

	)

2119 #ià
defšed
 (
STM32F10X_HD
è|| defšed (
STM32F10X_MD
è|| defšed (
STM32F10X_LD
)

2120 

	#RCC_APB1ENR_USBEN
 ((
ušt32_t
)0x00800000è

	)

2123 #ià
defšed
 (
STM32F10X_HD
è|| defšed (
STM32F10X_CL
)

2124 

	#RCC_APB1ENR_TIM5EN
 ((
ušt32_t
)0x00000008è

	)

2125 

	#RCC_APB1ENR_TIM6EN
 ((
ušt32_t
)0x00000010è

	)

2126 

	#RCC_APB1ENR_TIM7EN
 ((
ušt32_t
)0x00000020è

	)

2127 

	#RCC_APB1ENR_SPI3EN
 ((
ušt32_t
)0x00008000è

	)

2128 

	#RCC_APB1ENR_UART4EN
 ((
ušt32_t
)0x00080000è

	)

2129 

	#RCC_APB1ENR_UART5EN
 ((
ušt32_t
)0x00100000è

	)

2130 

	#RCC_APB1ENR_DACEN
 ((
ušt32_t
)0x20000000è

	)

2133 #ià
defšed
 (
STM32F10X_LD_VL
è|| defšed (
STM32F10X_MD_VL
è|| defšed (
STM32F10X_HD_VL
)

2134 

	#RCC_APB1ENR_TIM6EN
 ((
ušt32_t
)0x00000010è

	)

2135 

	#RCC_APB1ENR_TIM7EN
 ((
ušt32_t
)0x00000020è

	)

2136 

	#RCC_APB1ENR_DACEN
 ((
ušt32_t
)0x20000000è

	)

2137 

	#RCC_APB1ENR_CECEN
 ((
ušt32_t
)0x40000000è

	)

2140 #ifdeà
STM32F10X_HD_VL


2141 

	#RCC_APB1ENR_TIM5EN
 ((
ušt32_t
)0x00000008è

	)

2142 

	#RCC_APB1ENR_TIM12EN
 ((
ušt32_t
)0x00000040è

	)

2143 

	#RCC_APB1ENR_TIM13EN
 ((
ušt32_t
)0x00000080è

	)

2144 

	#RCC_APB1ENR_TIM14EN
 ((
ušt32_t
)0x00000100è

	)

2145 

	#RCC_APB1ENR_SPI3EN
 ((
ušt32_t
)0x00008000è

	)

2146 

	#RCC_APB1ENR_UART4EN
 ((
ušt32_t
)0x00080000è

	)

2147 

	#RCC_APB1ENR_UART5EN
 ((
ušt32_t
)0x00100000è

	)

2150 #ifdeà
STM32F10X_CL


2151 

	#RCC_APB1ENR_CAN2EN
 ((
ušt32_t
)0x04000000è

	)

2154 #ifdeà
STM32F10X_XL


2155 

	#RCC_APB1ENR_TIM12EN
 ((
ušt32_t
)0x00000040è

	)

2156 

	#RCC_APB1ENR_TIM13EN
 ((
ušt32_t
)0x00000080è

	)

2157 

	#RCC_APB1ENR_TIM14EN
 ((
ušt32_t
)0x00000100è

	)

2161 

	#RCC_BDCR_LSEON
 ((
ušt32_t
)0x00000001è

	)

2162 

	#RCC_BDCR_LSERDY
 ((
ušt32_t
)0x00000002è

	)

2163 

	#RCC_BDCR_LSEBYP
 ((
ušt32_t
)0x00000004è

	)

2165 

	#RCC_BDCR_RTCSEL
 ((
ušt32_t
)0x00000300è

	)

2166 

	#RCC_BDCR_RTCSEL_0
 ((
ušt32_t
)0x00000100è

	)

2167 

	#RCC_BDCR_RTCSEL_1
 ((
ušt32_t
)0x00000200è

	)

2170 

	#RCC_BDCR_RTCSEL_NOCLOCK
 ((
ušt32_t
)0x00000000è

	)

2171 

	#RCC_BDCR_RTCSEL_LSE
 ((
ušt32_t
)0x00000100è

	)

2172 

	#RCC_BDCR_RTCSEL_LSI
 ((
ušt32_t
)0x00000200è

	)

2173 

	#RCC_BDCR_RTCSEL_HSE
 ((
ušt32_t
)0x00000300è

	)

2175 

	#RCC_BDCR_RTCEN
 ((
ušt32_t
)0x00008000è

	)

2176 

	#RCC_BDCR_BDRST
 ((
ušt32_t
)0x00010000è

	)

2179 

	#RCC_CSR_LSION
 ((
ušt32_t
)0x00000001è

	)

2180 

	#RCC_CSR_LSIRDY
 ((
ušt32_t
)0x00000002è

	)

2181 

	#RCC_CSR_RMVF
 ((
ušt32_t
)0x01000000è

	)

2182 

	#RCC_CSR_PINRSTF
 ((
ušt32_t
)0x04000000è

	)

2183 

	#RCC_CSR_PORRSTF
 ((
ušt32_t
)0x08000000è

	)

2184 

	#RCC_CSR_SFTRSTF
 ((
ušt32_t
)0x10000000è

	)

2185 

	#RCC_CSR_IWDGRSTF
 ((
ušt32_t
)0x20000000è

	)

2186 

	#RCC_CSR_WWDGRSTF
 ((
ušt32_t
)0x40000000è

	)

2187 

	#RCC_CSR_LPWRRSTF
 ((
ušt32_t
)0x80000000è

	)

2189 #ifdeà
STM32F10X_CL


2191 

	#RCC_AHBRSTR_OTGFSRST
 ((
ušt32_t
)0x00001000è

	)

2192 

	#RCC_AHBRSTR_ETHMACRST
 ((
ušt32_t
)0x00004000è

	)

2196 

	#RCC_CFGR2_PREDIV1
 ((
ušt32_t
)0x0000000Fè

	)

2197 

	#RCC_CFGR2_PREDIV1_0
 ((
ušt32_t
)0x00000001è

	)

2198 

	#RCC_CFGR2_PREDIV1_1
 ((
ušt32_t
)0x00000002è

	)

2199 

	#RCC_CFGR2_PREDIV1_2
 ((
ušt32_t
)0x00000004è

	)

2200 

	#RCC_CFGR2_PREDIV1_3
 ((
ušt32_t
)0x00000008è

	)

2202 

	#RCC_CFGR2_PREDIV1_DIV1
 ((
ušt32_t
)0x00000000è

	)

2203 

	#RCC_CFGR2_PREDIV1_DIV2
 ((
ušt32_t
)0x00000001è

	)

2204 

	#RCC_CFGR2_PREDIV1_DIV3
 ((
ušt32_t
)0x00000002è

	)

2205 

	#RCC_CFGR2_PREDIV1_DIV4
 ((
ušt32_t
)0x00000003è

	)

2206 

	#RCC_CFGR2_PREDIV1_DIV5
 ((
ušt32_t
)0x00000004è

	)

2207 

	#RCC_CFGR2_PREDIV1_DIV6
 ((
ušt32_t
)0x00000005è

	)

2208 

	#RCC_CFGR2_PREDIV1_DIV7
 ((
ušt32_t
)0x00000006è

	)

2209 

	#RCC_CFGR2_PREDIV1_DIV8
 ((
ušt32_t
)0x00000007è

	)

2210 

	#RCC_CFGR2_PREDIV1_DIV9
 ((
ušt32_t
)0x00000008è

	)

2211 

	#RCC_CFGR2_PREDIV1_DIV10
 ((
ušt32_t
)0x00000009è

	)

2212 

	#RCC_CFGR2_PREDIV1_DIV11
 ((
ušt32_t
)0x0000000Aè

	)

2213 

	#RCC_CFGR2_PREDIV1_DIV12
 ((
ušt32_t
)0x0000000Bè

	)

2214 

	#RCC_CFGR2_PREDIV1_DIV13
 ((
ušt32_t
)0x0000000Cè

	)

2215 

	#RCC_CFGR2_PREDIV1_DIV14
 ((
ušt32_t
)0x0000000Dè

	)

2216 

	#RCC_CFGR2_PREDIV1_DIV15
 ((
ušt32_t
)0x0000000Eè

	)

2217 

	#RCC_CFGR2_PREDIV1_DIV16
 ((
ušt32_t
)0x0000000Fè

	)

2220 

	#RCC_CFGR2_PREDIV2
 ((
ušt32_t
)0x000000F0è

	)

2221 

	#RCC_CFGR2_PREDIV2_0
 ((
ušt32_t
)0x00000010è

	)

2222 

	#RCC_CFGR2_PREDIV2_1
 ((
ušt32_t
)0x00000020è

	)

2223 

	#RCC_CFGR2_PREDIV2_2
 ((
ušt32_t
)0x00000040è

	)

2224 

	#RCC_CFGR2_PREDIV2_3
 ((
ušt32_t
)0x00000080è

	)

2226 

	#RCC_CFGR2_PREDIV2_DIV1
 ((
ušt32_t
)0x00000000è

	)

2227 

	#RCC_CFGR2_PREDIV2_DIV2
 ((
ušt32_t
)0x00000010è

	)

2228 

	#RCC_CFGR2_PREDIV2_DIV3
 ((
ušt32_t
)0x00000020è

	)

2229 

	#RCC_CFGR2_PREDIV2_DIV4
 ((
ušt32_t
)0x00000030è

	)

2230 

	#RCC_CFGR2_PREDIV2_DIV5
 ((
ušt32_t
)0x00000040è

	)

2231 

	#RCC_CFGR2_PREDIV2_DIV6
 ((
ušt32_t
)0x00000050è

	)

2232 

	#RCC_CFGR2_PREDIV2_DIV7
 ((
ušt32_t
)0x00000060è

	)

2233 

	#RCC_CFGR2_PREDIV2_DIV8
 ((
ušt32_t
)0x00000070è

	)

2234 

	#RCC_CFGR2_PREDIV2_DIV9
 ((
ušt32_t
)0x00000080è

	)

2235 

	#RCC_CFGR2_PREDIV2_DIV10
 ((
ušt32_t
)0x00000090è

	)

2236 

	#RCC_CFGR2_PREDIV2_DIV11
 ((
ušt32_t
)0x000000A0è

	)

2237 

	#RCC_CFGR2_PREDIV2_DIV12
 ((
ušt32_t
)0x000000B0è

	)

2238 

	#RCC_CFGR2_PREDIV2_DIV13
 ((
ušt32_t
)0x000000C0è

	)

2239 

	#RCC_CFGR2_PREDIV2_DIV14
 ((
ušt32_t
)0x000000D0è

	)

2240 

	#RCC_CFGR2_PREDIV2_DIV15
 ((
ušt32_t
)0x000000E0è

	)

2241 

	#RCC_CFGR2_PREDIV2_DIV16
 ((
ušt32_t
)0x000000F0è

	)

2244 

	#RCC_CFGR2_PLL2MUL
 ((
ušt32_t
)0x00000F00è

	)

2245 

	#RCC_CFGR2_PLL2MUL_0
 ((
ušt32_t
)0x00000100è

	)

2246 

	#RCC_CFGR2_PLL2MUL_1
 ((
ušt32_t
)0x00000200è

	)

2247 

	#RCC_CFGR2_PLL2MUL_2
 ((
ušt32_t
)0x00000400è

	)

2248 

	#RCC_CFGR2_PLL2MUL_3
 ((
ušt32_t
)0x00000800è

	)

2250 

	#RCC_CFGR2_PLL2MUL8
 ((
ušt32_t
)0x00000600è

	)

2251 

	#RCC_CFGR2_PLL2MUL9
 ((
ušt32_t
)0x00000700è

	)

2252 

	#RCC_CFGR2_PLL2MUL10
 ((
ušt32_t
)0x00000800è

	)

2253 

	#RCC_CFGR2_PLL2MUL11
 ((
ušt32_t
)0x00000900è

	)

2254 

	#RCC_CFGR2_PLL2MUL12
 ((
ušt32_t
)0x00000A00è

	)

2255 

	#RCC_CFGR2_PLL2MUL13
 ((
ušt32_t
)0x00000B00è

	)

2256 

	#RCC_CFGR2_PLL2MUL14
 ((
ušt32_t
)0x00000C00è

	)

2257 

	#RCC_CFGR2_PLL2MUL16
 ((
ušt32_t
)0x00000E00è

	)

2258 

	#RCC_CFGR2_PLL2MUL20
 ((
ušt32_t
)0x00000F00è

	)

2261 

	#RCC_CFGR2_PLL3MUL
 ((
ušt32_t
)0x0000F000è

	)

2262 

	#RCC_CFGR2_PLL3MUL_0
 ((
ušt32_t
)0x00001000è

	)

2263 

	#RCC_CFGR2_PLL3MUL_1
 ((
ušt32_t
)0x00002000è

	)

2264 

	#RCC_CFGR2_PLL3MUL_2
 ((
ušt32_t
)0x00004000è

	)

2265 

	#RCC_CFGR2_PLL3MUL_3
 ((
ušt32_t
)0x00008000è

	)

2267 

	#RCC_CFGR2_PLL3MUL8
 ((
ušt32_t
)0x00006000è

	)

2268 

	#RCC_CFGR2_PLL3MUL9
 ((
ušt32_t
)0x00007000è

	)

2269 

	#RCC_CFGR2_PLL3MUL10
 ((
ušt32_t
)0x00008000è

	)

2270 

	#RCC_CFGR2_PLL3MUL11
 ((
ušt32_t
)0x00009000è

	)

2271 

	#RCC_CFGR2_PLL3MUL12
 ((
ušt32_t
)0x0000A000è

	)

2272 

	#RCC_CFGR2_PLL3MUL13
 ((
ušt32_t
)0x0000B000è

	)

2273 

	#RCC_CFGR2_PLL3MUL14
 ((
ušt32_t
)0x0000C000è

	)

2274 

	#RCC_CFGR2_PLL3MUL16
 ((
ušt32_t
)0x0000E000è

	)

2275 

	#RCC_CFGR2_PLL3MUL20
 ((
ušt32_t
)0x0000F000è

	)

2277 

	#RCC_CFGR2_PREDIV1SRC
 ((
ušt32_t
)0x00010000è

	)

2278 

	#RCC_CFGR2_PREDIV1SRC_PLL2
 ((
ušt32_t
)0x00010000è

	)

2279 

	#RCC_CFGR2_PREDIV1SRC_HSE
 ((
ušt32_t
)0x00000000è

	)

2280 

	#RCC_CFGR2_I2S2SRC
 ((
ušt32_t
)0x00020000è

	)

2281 

	#RCC_CFGR2_I2S3SRC
 ((
ušt32_t
)0x00040000è

	)

2284 #ià
defšed
 (
STM32F10X_LD_VL
è|| defšed (
STM32F10X_MD_VL
è|| defšed (
STM32F10X_HD_VL
)

2287 

	#RCC_CFGR2_PREDIV1
 ((
ušt32_t
)0x0000000Fè

	)

2288 

	#RCC_CFGR2_PREDIV1_0
 ((
ušt32_t
)0x00000001è

	)

2289 

	#RCC_CFGR2_PREDIV1_1
 ((
ušt32_t
)0x00000002è

	)

2290 

	#RCC_CFGR2_PREDIV1_2
 ((
ušt32_t
)0x00000004è

	)

2291 

	#RCC_CFGR2_PREDIV1_3
 ((
ušt32_t
)0x00000008è

	)

2293 

	#RCC_CFGR2_PREDIV1_DIV1
 ((
ušt32_t
)0x00000000è

	)

2294 

	#RCC_CFGR2_PREDIV1_DIV2
 ((
ušt32_t
)0x00000001è

	)

2295 

	#RCC_CFGR2_PREDIV1_DIV3
 ((
ušt32_t
)0x00000002è

	)

2296 

	#RCC_CFGR2_PREDIV1_DIV4
 ((
ušt32_t
)0x00000003è

	)

2297 

	#RCC_CFGR2_PREDIV1_DIV5
 ((
ušt32_t
)0x00000004è

	)

2298 

	#RCC_CFGR2_PREDIV1_DIV6
 ((
ušt32_t
)0x00000005è

	)

2299 

	#RCC_CFGR2_PREDIV1_DIV7
 ((
ušt32_t
)0x00000006è

	)

2300 

	#RCC_CFGR2_PREDIV1_DIV8
 ((
ušt32_t
)0x00000007è

	)

2301 

	#RCC_CFGR2_PREDIV1_DIV9
 ((
ušt32_t
)0x00000008è

	)

2302 

	#RCC_CFGR2_PREDIV1_DIV10
 ((
ušt32_t
)0x00000009è

	)

2303 

	#RCC_CFGR2_PREDIV1_DIV11
 ((
ušt32_t
)0x0000000Aè

	)

2304 

	#RCC_CFGR2_PREDIV1_DIV12
 ((
ušt32_t
)0x0000000Bè

	)

2305 

	#RCC_CFGR2_PREDIV1_DIV13
 ((
ušt32_t
)0x0000000Cè

	)

2306 

	#RCC_CFGR2_PREDIV1_DIV14
 ((
ušt32_t
)0x0000000Dè

	)

2307 

	#RCC_CFGR2_PREDIV1_DIV15
 ((
ušt32_t
)0x0000000Eè

	)

2308 

	#RCC_CFGR2_PREDIV1_DIV16
 ((
ušt32_t
)0x0000000Fè

	)

2318 

	#GPIO_CRL_MODE
 ((
ušt32_t
)0x33333333è

	)

2320 

	#GPIO_CRL_MODE0
 ((
ušt32_t
)0x00000003è

	)

2321 

	#GPIO_CRL_MODE0_0
 ((
ušt32_t
)0x00000001è

	)

2322 

	#GPIO_CRL_MODE0_1
 ((
ušt32_t
)0x00000002è

	)

2324 

	#GPIO_CRL_MODE1
 ((
ušt32_t
)0x00000030è

	)

2325 

	#GPIO_CRL_MODE1_0
 ((
ušt32_t
)0x00000010è

	)

2326 

	#GPIO_CRL_MODE1_1
 ((
ušt32_t
)0x00000020è

	)

2328 

	#GPIO_CRL_MODE2
 ((
ušt32_t
)0x00000300è

	)

2329 

	#GPIO_CRL_MODE2_0
 ((
ušt32_t
)0x00000100è

	)

2330 

	#GPIO_CRL_MODE2_1
 ((
ušt32_t
)0x00000200è

	)

2332 

	#GPIO_CRL_MODE3
 ((
ušt32_t
)0x00003000è

	)

2333 

	#GPIO_CRL_MODE3_0
 ((
ušt32_t
)0x00001000è

	)

2334 

	#GPIO_CRL_MODE3_1
 ((
ušt32_t
)0x00002000è

	)

2336 

	#GPIO_CRL_MODE4
 ((
ušt32_t
)0x00030000è

	)

2337 

	#GPIO_CRL_MODE4_0
 ((
ušt32_t
)0x00010000è

	)

2338 

	#GPIO_CRL_MODE4_1
 ((
ušt32_t
)0x00020000è

	)

2340 

	#GPIO_CRL_MODE5
 ((
ušt32_t
)0x00300000è

	)

2341 

	#GPIO_CRL_MODE5_0
 ((
ušt32_t
)0x00100000è

	)

2342 

	#GPIO_CRL_MODE5_1
 ((
ušt32_t
)0x00200000è

	)

2344 

	#GPIO_CRL_MODE6
 ((
ušt32_t
)0x03000000è

	)

2345 

	#GPIO_CRL_MODE6_0
 ((
ušt32_t
)0x01000000è

	)

2346 

	#GPIO_CRL_MODE6_1
 ((
ušt32_t
)0x02000000è

	)

2348 

	#GPIO_CRL_MODE7
 ((
ušt32_t
)0x30000000è

	)

2349 

	#GPIO_CRL_MODE7_0
 ((
ušt32_t
)0x10000000è

	)

2350 

	#GPIO_CRL_MODE7_1
 ((
ušt32_t
)0x20000000è

	)

2352 

	#GPIO_CRL_CNF
 ((
ušt32_t
)0xCCCCCCCCè

	)

2354 

	#GPIO_CRL_CNF0
 ((
ušt32_t
)0x0000000Cè

	)

2355 

	#GPIO_CRL_CNF0_0
 ((
ušt32_t
)0x00000004è

	)

2356 

	#GPIO_CRL_CNF0_1
 ((
ušt32_t
)0x00000008è

	)

2358 

	#GPIO_CRL_CNF1
 ((
ušt32_t
)0x000000C0è

	)

2359 

	#GPIO_CRL_CNF1_0
 ((
ušt32_t
)0x00000040è

	)

2360 

	#GPIO_CRL_CNF1_1
 ((
ušt32_t
)0x00000080è

	)

2362 

	#GPIO_CRL_CNF2
 ((
ušt32_t
)0x00000C00è

	)

2363 

	#GPIO_CRL_CNF2_0
 ((
ušt32_t
)0x00000400è

	)

2364 

	#GPIO_CRL_CNF2_1
 ((
ušt32_t
)0x00000800è

	)

2366 

	#GPIO_CRL_CNF3
 ((
ušt32_t
)0x0000C000è

	)

2367 

	#GPIO_CRL_CNF3_0
 ((
ušt32_t
)0x00004000è

	)

2368 

	#GPIO_CRL_CNF3_1
 ((
ušt32_t
)0x00008000è

	)

2370 

	#GPIO_CRL_CNF4
 ((
ušt32_t
)0x000C0000è

	)

2371 

	#GPIO_CRL_CNF4_0
 ((
ušt32_t
)0x00040000è

	)

2372 

	#GPIO_CRL_CNF4_1
 ((
ušt32_t
)0x00080000è

	)

2374 

	#GPIO_CRL_CNF5
 ((
ušt32_t
)0x00C00000è

	)

2375 

	#GPIO_CRL_CNF5_0
 ((
ušt32_t
)0x00400000è

	)

2376 

	#GPIO_CRL_CNF5_1
 ((
ušt32_t
)0x00800000è

	)

2378 

	#GPIO_CRL_CNF6
 ((
ušt32_t
)0x0C000000è

	)

2379 

	#GPIO_CRL_CNF6_0
 ((
ušt32_t
)0x04000000è

	)

2380 

	#GPIO_CRL_CNF6_1
 ((
ušt32_t
)0x08000000è

	)

2382 

	#GPIO_CRL_CNF7
 ((
ušt32_t
)0xC0000000è

	)

2383 

	#GPIO_CRL_CNF7_0
 ((
ušt32_t
)0x40000000è

	)

2384 

	#GPIO_CRL_CNF7_1
 ((
ušt32_t
)0x80000000è

	)

2387 

	#GPIO_CRH_MODE
 ((
ušt32_t
)0x33333333è

	)

2389 

	#GPIO_CRH_MODE8
 ((
ušt32_t
)0x00000003è

	)

2390 

	#GPIO_CRH_MODE8_0
 ((
ušt32_t
)0x00000001è

	)

2391 

	#GPIO_CRH_MODE8_1
 ((
ušt32_t
)0x00000002è

	)

2393 

	#GPIO_CRH_MODE9
 ((
ušt32_t
)0x00000030è

	)

2394 

	#GPIO_CRH_MODE9_0
 ((
ušt32_t
)0x00000010è

	)

2395 

	#GPIO_CRH_MODE9_1
 ((
ušt32_t
)0x00000020è

	)

2397 

	#GPIO_CRH_MODE10
 ((
ušt32_t
)0x00000300è

	)

2398 

	#GPIO_CRH_MODE10_0
 ((
ušt32_t
)0x00000100è

	)

2399 

	#GPIO_CRH_MODE10_1
 ((
ušt32_t
)0x00000200è

	)

2401 

	#GPIO_CRH_MODE11
 ((
ušt32_t
)0x00003000è

	)

2402 

	#GPIO_CRH_MODE11_0
 ((
ušt32_t
)0x00001000è

	)

2403 

	#GPIO_CRH_MODE11_1
 ((
ušt32_t
)0x00002000è

	)

2405 

	#GPIO_CRH_MODE12
 ((
ušt32_t
)0x00030000è

	)

2406 

	#GPIO_CRH_MODE12_0
 ((
ušt32_t
)0x00010000è

	)

2407 

	#GPIO_CRH_MODE12_1
 ((
ušt32_t
)0x00020000è

	)

2409 

	#GPIO_CRH_MODE13
 ((
ušt32_t
)0x00300000è

	)

2410 

	#GPIO_CRH_MODE13_0
 ((
ušt32_t
)0x00100000è

	)

2411 

	#GPIO_CRH_MODE13_1
 ((
ušt32_t
)0x00200000è

	)

2413 

	#GPIO_CRH_MODE14
 ((
ušt32_t
)0x03000000è

	)

2414 

	#GPIO_CRH_MODE14_0
 ((
ušt32_t
)0x01000000è

	)

2415 

	#GPIO_CRH_MODE14_1
 ((
ušt32_t
)0x02000000è

	)

2417 

	#GPIO_CRH_MODE15
 ((
ušt32_t
)0x30000000è

	)

2418 

	#GPIO_CRH_MODE15_0
 ((
ušt32_t
)0x10000000è

	)

2419 

	#GPIO_CRH_MODE15_1
 ((
ušt32_t
)0x20000000è

	)

2421 

	#GPIO_CRH_CNF
 ((
ušt32_t
)0xCCCCCCCCè

	)

2423 

	#GPIO_CRH_CNF8
 ((
ušt32_t
)0x0000000Cè

	)

2424 

	#GPIO_CRH_CNF8_0
 ((
ušt32_t
)0x00000004è

	)

2425 

	#GPIO_CRH_CNF8_1
 ((
ušt32_t
)0x00000008è

	)

2427 

	#GPIO_CRH_CNF9
 ((
ušt32_t
)0x000000C0è

	)

2428 

	#GPIO_CRH_CNF9_0
 ((
ušt32_t
)0x00000040è

	)

2429 

	#GPIO_CRH_CNF9_1
 ((
ušt32_t
)0x00000080è

	)

2431 

	#GPIO_CRH_CNF10
 ((
ušt32_t
)0x00000C00è

	)

2432 

	#GPIO_CRH_CNF10_0
 ((
ušt32_t
)0x00000400è

	)

2433 

	#GPIO_CRH_CNF10_1
 ((
ušt32_t
)0x00000800è

	)

2435 

	#GPIO_CRH_CNF11
 ((
ušt32_t
)0x0000C000è

	)

2436 

	#GPIO_CRH_CNF11_0
 ((
ušt32_t
)0x00004000è

	)

2437 

	#GPIO_CRH_CNF11_1
 ((
ušt32_t
)0x00008000è

	)

2439 

	#GPIO_CRH_CNF12
 ((
ušt32_t
)0x000C0000è

	)

2440 

	#GPIO_CRH_CNF12_0
 ((
ušt32_t
)0x00040000è

	)

2441 

	#GPIO_CRH_CNF12_1
 ((
ušt32_t
)0x00080000è

	)

2443 

	#GPIO_CRH_CNF13
 ((
ušt32_t
)0x00C00000è

	)

2444 

	#GPIO_CRH_CNF13_0
 ((
ušt32_t
)0x00400000è

	)

2445 

	#GPIO_CRH_CNF13_1
 ((
ušt32_t
)0x00800000è

	)

2447 

	#GPIO_CRH_CNF14
 ((
ušt32_t
)0x0C000000è

	)

2448 

	#GPIO_CRH_CNF14_0
 ((
ušt32_t
)0x04000000è

	)

2449 

	#GPIO_CRH_CNF14_1
 ((
ušt32_t
)0x08000000è

	)

2451 

	#GPIO_CRH_CNF15
 ((
ušt32_t
)0xC0000000è

	)

2452 

	#GPIO_CRH_CNF15_0
 ((
ušt32_t
)0x40000000è

	)

2453 

	#GPIO_CRH_CNF15_1
 ((
ušt32_t
)0x80000000è

	)

2456 

	#GPIO_IDR_IDR0
 ((
ušt16_t
)0x0001è

	)

2457 

	#GPIO_IDR_IDR1
 ((
ušt16_t
)0x0002è

	)

2458 

	#GPIO_IDR_IDR2
 ((
ušt16_t
)0x0004è

	)

2459 

	#GPIO_IDR_IDR3
 ((
ušt16_t
)0x0008è

	)

2460 

	#GPIO_IDR_IDR4
 ((
ušt16_t
)0x0010è

	)

2461 

	#GPIO_IDR_IDR5
 ((
ušt16_t
)0x0020è

	)

2462 

	#GPIO_IDR_IDR6
 ((
ušt16_t
)0x0040è

	)

2463 

	#GPIO_IDR_IDR7
 ((
ušt16_t
)0x0080è

	)

2464 

	#GPIO_IDR_IDR8
 ((
ušt16_t
)0x0100è

	)

2465 

	#GPIO_IDR_IDR9
 ((
ušt16_t
)0x0200è

	)

2466 

	#GPIO_IDR_IDR10
 ((
ušt16_t
)0x0400è

	)

2467 

	#GPIO_IDR_IDR11
 ((
ušt16_t
)0x0800è

	)

2468 

	#GPIO_IDR_IDR12
 ((
ušt16_t
)0x1000è

	)

2469 

	#GPIO_IDR_IDR13
 ((
ušt16_t
)0x2000è

	)

2470 

	#GPIO_IDR_IDR14
 ((
ušt16_t
)0x4000è

	)

2471 

	#GPIO_IDR_IDR15
 ((
ušt16_t
)0x8000è

	)

2474 

	#GPIO_ODR_ODR0
 ((
ušt16_t
)0x0001è

	)

2475 

	#GPIO_ODR_ODR1
 ((
ušt16_t
)0x0002è

	)

2476 

	#GPIO_ODR_ODR2
 ((
ušt16_t
)0x0004è

	)

2477 

	#GPIO_ODR_ODR3
 ((
ušt16_t
)0x0008è

	)

2478 

	#GPIO_ODR_ODR4
 ((
ušt16_t
)0x0010è

	)

2479 

	#GPIO_ODR_ODR5
 ((
ušt16_t
)0x0020è

	)

2480 

	#GPIO_ODR_ODR6
 ((
ušt16_t
)0x0040è

	)

2481 

	#GPIO_ODR_ODR7
 ((
ušt16_t
)0x0080è

	)

2482 

	#GPIO_ODR_ODR8
 ((
ušt16_t
)0x0100è

	)

2483 

	#GPIO_ODR_ODR9
 ((
ušt16_t
)0x0200è

	)

2484 

	#GPIO_ODR_ODR10
 ((
ušt16_t
)0x0400è

	)

2485 

	#GPIO_ODR_ODR11
 ((
ušt16_t
)0x0800è

	)

2486 

	#GPIO_ODR_ODR12
 ((
ušt16_t
)0x1000è

	)

2487 

	#GPIO_ODR_ODR13
 ((
ušt16_t
)0x2000è

	)

2488 

	#GPIO_ODR_ODR14
 ((
ušt16_t
)0x4000è

	)

2489 

	#GPIO_ODR_ODR15
 ((
ušt16_t
)0x8000è

	)

2492 

	#GPIO_BSRR_BS0
 ((
ušt32_t
)0x00000001è

	)

2493 

	#GPIO_BSRR_BS1
 ((
ušt32_t
)0x00000002è

	)

2494 

	#GPIO_BSRR_BS2
 ((
ušt32_t
)0x00000004è

	)

2495 

	#GPIO_BSRR_BS3
 ((
ušt32_t
)0x00000008è

	)

2496 

	#GPIO_BSRR_BS4
 ((
ušt32_t
)0x00000010è

	)

2497 

	#GPIO_BSRR_BS5
 ((
ušt32_t
)0x00000020è

	)

2498 

	#GPIO_BSRR_BS6
 ((
ušt32_t
)0x00000040è

	)

2499 

	#GPIO_BSRR_BS7
 ((
ušt32_t
)0x00000080è

	)

2500 

	#GPIO_BSRR_BS8
 ((
ušt32_t
)0x00000100è

	)

2501 

	#GPIO_BSRR_BS9
 ((
ušt32_t
)0x00000200è

	)

2502 

	#GPIO_BSRR_BS10
 ((
ušt32_t
)0x00000400è

	)

2503 

	#GPIO_BSRR_BS11
 ((
ušt32_t
)0x00000800è

	)

2504 

	#GPIO_BSRR_BS12
 ((
ušt32_t
)0x00001000è

	)

2505 

	#GPIO_BSRR_BS13
 ((
ušt32_t
)0x00002000è

	)

2506 

	#GPIO_BSRR_BS14
 ((
ušt32_t
)0x00004000è

	)

2507 

	#GPIO_BSRR_BS15
 ((
ušt32_t
)0x00008000è

	)

2509 

	#GPIO_BSRR_BR0
 ((
ušt32_t
)0x00010000è

	)

2510 

	#GPIO_BSRR_BR1
 ((
ušt32_t
)0x00020000è

	)

2511 

	#GPIO_BSRR_BR2
 ((
ušt32_t
)0x00040000è

	)

2512 

	#GPIO_BSRR_BR3
 ((
ušt32_t
)0x00080000è

	)

2513 

	#GPIO_BSRR_BR4
 ((
ušt32_t
)0x00100000è

	)

2514 

	#GPIO_BSRR_BR5
 ((
ušt32_t
)0x00200000è

	)

2515 

	#GPIO_BSRR_BR6
 ((
ušt32_t
)0x00400000è

	)

2516 

	#GPIO_BSRR_BR7
 ((
ušt32_t
)0x00800000è

	)

2517 

	#GPIO_BSRR_BR8
 ((
ušt32_t
)0x01000000è

	)

2518 

	#GPIO_BSRR_BR9
 ((
ušt32_t
)0x02000000è

	)

2519 

	#GPIO_BSRR_BR10
 ((
ušt32_t
)0x04000000è

	)

2520 

	#GPIO_BSRR_BR11
 ((
ušt32_t
)0x08000000è

	)

2521 

	#GPIO_BSRR_BR12
 ((
ušt32_t
)0x10000000è

	)

2522 

	#GPIO_BSRR_BR13
 ((
ušt32_t
)0x20000000è

	)

2523 

	#GPIO_BSRR_BR14
 ((
ušt32_t
)0x40000000è

	)

2524 

	#GPIO_BSRR_BR15
 ((
ušt32_t
)0x80000000è

	)

2527 

	#GPIO_BRR_BR0
 ((
ušt16_t
)0x0001è

	)

2528 

	#GPIO_BRR_BR1
 ((
ušt16_t
)0x0002è

	)

2529 

	#GPIO_BRR_BR2
 ((
ušt16_t
)0x0004è

	)

2530 

	#GPIO_BRR_BR3
 ((
ušt16_t
)0x0008è

	)

2531 

	#GPIO_BRR_BR4
 ((
ušt16_t
)0x0010è

	)

2532 

	#GPIO_BRR_BR5
 ((
ušt16_t
)0x0020è

	)

2533 

	#GPIO_BRR_BR6
 ((
ušt16_t
)0x0040è

	)

2534 

	#GPIO_BRR_BR7
 ((
ušt16_t
)0x0080è

	)

2535 

	#GPIO_BRR_BR8
 ((
ušt16_t
)0x0100è

	)

2536 

	#GPIO_BRR_BR9
 ((
ušt16_t
)0x0200è

	)

2537 

	#GPIO_BRR_BR10
 ((
ušt16_t
)0x0400è

	)

2538 

	#GPIO_BRR_BR11
 ((
ušt16_t
)0x0800è

	)

2539 

	#GPIO_BRR_BR12
 ((
ušt16_t
)0x1000è

	)

2540 

	#GPIO_BRR_BR13
 ((
ušt16_t
)0x2000è

	)

2541 

	#GPIO_BRR_BR14
 ((
ušt16_t
)0x4000è

	)

2542 

	#GPIO_BRR_BR15
 ((
ušt16_t
)0x8000è

	)

2545 

	#GPIO_LCKR_LCK0
 ((
ušt32_t
)0x00000001è

	)

2546 

	#GPIO_LCKR_LCK1
 ((
ušt32_t
)0x00000002è

	)

2547 

	#GPIO_LCKR_LCK2
 ((
ušt32_t
)0x00000004è

	)

2548 

	#GPIO_LCKR_LCK3
 ((
ušt32_t
)0x00000008è

	)

2549 

	#GPIO_LCKR_LCK4
 ((
ušt32_t
)0x00000010è

	)

2550 

	#GPIO_LCKR_LCK5
 ((
ušt32_t
)0x00000020è

	)

2551 

	#GPIO_LCKR_LCK6
 ((
ušt32_t
)0x00000040è

	)

2552 

	#GPIO_LCKR_LCK7
 ((
ušt32_t
)0x00000080è

	)

2553 

	#GPIO_LCKR_LCK8
 ((
ušt32_t
)0x00000100è

	)

2554 

	#GPIO_LCKR_LCK9
 ((
ušt32_t
)0x00000200è

	)

2555 

	#GPIO_LCKR_LCK10
 ((
ušt32_t
)0x00000400è

	)

2556 

	#GPIO_LCKR_LCK11
 ((
ušt32_t
)0x00000800è

	)

2557 

	#GPIO_LCKR_LCK12
 ((
ušt32_t
)0x00001000è

	)

2558 

	#GPIO_LCKR_LCK13
 ((
ušt32_t
)0x00002000è

	)

2559 

	#GPIO_LCKR_LCK14
 ((
ušt32_t
)0x00004000è

	)

2560 

	#GPIO_LCKR_LCK15
 ((
ušt32_t
)0x00008000è

	)

2561 

	#GPIO_LCKR_LCKK
 ((
ušt32_t
)0x00010000è

	)

2566 

	#AFIO_EVCR_PIN
 ((
ušt8_t
)0x0Fè

	)

2567 

	#AFIO_EVCR_PIN_0
 ((
ušt8_t
)0x01è

	)

2568 

	#AFIO_EVCR_PIN_1
 ((
ušt8_t
)0x02è

	)

2569 

	#AFIO_EVCR_PIN_2
 ((
ušt8_t
)0x04è

	)

2570 

	#AFIO_EVCR_PIN_3
 ((
ušt8_t
)0x08è

	)

2573 

	#AFIO_EVCR_PIN_PX0
 ((
ušt8_t
)0x00è

	)

2574 

	#AFIO_EVCR_PIN_PX1
 ((
ušt8_t
)0x01è

	)

2575 

	#AFIO_EVCR_PIN_PX2
 ((
ušt8_t
)0x02è

	)

2576 

	#AFIO_EVCR_PIN_PX3
 ((
ušt8_t
)0x03è

	)

2577 

	#AFIO_EVCR_PIN_PX4
 ((
ušt8_t
)0x04è

	)

2578 

	#AFIO_EVCR_PIN_PX5
 ((
ušt8_t
)0x05è

	)

2579 

	#AFIO_EVCR_PIN_PX6
 ((
ušt8_t
)0x06è

	)

2580 

	#AFIO_EVCR_PIN_PX7
 ((
ušt8_t
)0x07è

	)

2581 

	#AFIO_EVCR_PIN_PX8
 ((
ušt8_t
)0x08è

	)

2582 

	#AFIO_EVCR_PIN_PX9
 ((
ušt8_t
)0x09è

	)

2583 

	#AFIO_EVCR_PIN_PX10
 ((
ušt8_t
)0x0Aè

	)

2584 

	#AFIO_EVCR_PIN_PX11
 ((
ušt8_t
)0x0Bè

	)

2585 

	#AFIO_EVCR_PIN_PX12
 ((
ušt8_t
)0x0Cè

	)

2586 

	#AFIO_EVCR_PIN_PX13
 ((
ušt8_t
)0x0Dè

	)

2587 

	#AFIO_EVCR_PIN_PX14
 ((
ušt8_t
)0x0Eè

	)

2588 

	#AFIO_EVCR_PIN_PX15
 ((
ušt8_t
)0x0Fè

	)

2590 

	#AFIO_EVCR_PORT
 ((
ušt8_t
)0x70è

	)

2591 

	#AFIO_EVCR_PORT_0
 ((
ušt8_t
)0x10è

	)

2592 

	#AFIO_EVCR_PORT_1
 ((
ušt8_t
)0x20è

	)

2593 

	#AFIO_EVCR_PORT_2
 ((
ušt8_t
)0x40è

	)

2596 

	#AFIO_EVCR_PORT_PA
 ((
ušt8_t
)0x00è

	)

2597 

	#AFIO_EVCR_PORT_PB
 ((
ušt8_t
)0x10è

	)

2598 

	#AFIO_EVCR_PORT_PC
 ((
ušt8_t
)0x20è

	)

2599 

	#AFIO_EVCR_PORT_PD
 ((
ušt8_t
)0x30è

	)

2600 

	#AFIO_EVCR_PORT_PE
 ((
ušt8_t
)0x40è

	)

2602 

	#AFIO_EVCR_EVOE
 ((
ušt8_t
)0x80è

	)

2605 

	#AFIO_MAPR_SPI1_REMAP
 ((
ušt32_t
)0x00000001è

	)

2606 

	#AFIO_MAPR_I2C1_REMAP
 ((
ušt32_t
)0x00000002è

	)

2607 

	#AFIO_MAPR_USART1_REMAP
 ((
ušt32_t
)0x00000004è

	)

2608 

	#AFIO_MAPR_USART2_REMAP
 ((
ušt32_t
)0x00000008è

	)

2610 

	#AFIO_MAPR_USART3_REMAP
 ((
ušt32_t
)0x00000030è

	)

2611 

	#AFIO_MAPR_USART3_REMAP_0
 ((
ušt32_t
)0x00000010è

	)

2612 

	#AFIO_MAPR_USART3_REMAP_1
 ((
ušt32_t
)0x00000020è

	)

2615 

	#AFIO_MAPR_USART3_REMAP_NOREMAP
 ((
ušt32_t
)0x00000000è

	)

2616 

	#AFIO_MAPR_USART3_REMAP_PARTIALREMAP
 ((
ušt32_t
)0x00000010è

	)

2617 

	#AFIO_MAPR_USART3_REMAP_FULLREMAP
 ((
ušt32_t
)0x00000030è

	)

2619 

	#AFIO_MAPR_TIM1_REMAP
 ((
ušt32_t
)0x000000C0è

	)

2620 

	#AFIO_MAPR_TIM1_REMAP_0
 ((
ušt32_t
)0x00000040è

	)

2621 

	#AFIO_MAPR_TIM1_REMAP_1
 ((
ušt32_t
)0x00000080è

	)

2624 

	#AFIO_MAPR_TIM1_REMAP_NOREMAP
 ((
ušt32_t
)0x00000000è

	)

2625 

	#AFIO_MAPR_TIM1_REMAP_PARTIALREMAP
 ((
ušt32_t
)0x00000040è

	)

2626 

	#AFIO_MAPR_TIM1_REMAP_FULLREMAP
 ((
ušt32_t
)0x000000C0è

	)

2628 

	#AFIO_MAPR_TIM2_REMAP
 ((
ušt32_t
)0x00000300è

	)

2629 

	#AFIO_MAPR_TIM2_REMAP_0
 ((
ušt32_t
)0x00000100è

	)

2630 

	#AFIO_MAPR_TIM2_REMAP_1
 ((
ušt32_t
)0x00000200è

	)

2633 

	#AFIO_MAPR_TIM2_REMAP_NOREMAP
 ((
ušt32_t
)0x00000000è

	)

2634 

	#AFIO_MAPR_TIM2_REMAP_PARTIALREMAP1
 ((
ušt32_t
)0x00000100è

	)

2635 

	#AFIO_MAPR_TIM2_REMAP_PARTIALREMAP2
 ((
ušt32_t
)0x00000200è

	)

2636 

	#AFIO_MAPR_TIM2_REMAP_FULLREMAP
 ((
ušt32_t
)0x00000300è

	)

2638 

	#AFIO_MAPR_TIM3_REMAP
 ((
ušt32_t
)0x00000C00è

	)

2639 

	#AFIO_MAPR_TIM3_REMAP_0
 ((
ušt32_t
)0x00000400è

	)

2640 

	#AFIO_MAPR_TIM3_REMAP_1
 ((
ušt32_t
)0x00000800è

	)

2643 

	#AFIO_MAPR_TIM3_REMAP_NOREMAP
 ((
ušt32_t
)0x00000000è

	)

2644 

	#AFIO_MAPR_TIM3_REMAP_PARTIALREMAP
 ((
ušt32_t
)0x00000800è

	)

2645 

	#AFIO_MAPR_TIM3_REMAP_FULLREMAP
 ((
ušt32_t
)0x00000C00è

	)

2647 

	#AFIO_MAPR_TIM4_REMAP
 ((
ušt32_t
)0x00001000è

	)

2649 

	#AFIO_MAPR_CAN_REMAP
 ((
ušt32_t
)0x00006000è

	)

2650 

	#AFIO_MAPR_CAN_REMAP_0
 ((
ušt32_t
)0x00002000è

	)

2651 

	#AFIO_MAPR_CAN_REMAP_1
 ((
ušt32_t
)0x00004000è

	)

2654 

	#AFIO_MAPR_CAN_REMAP_REMAP1
 ((
ušt32_t
)0x00000000è

	)

2655 

	#AFIO_MAPR_CAN_REMAP_REMAP2
 ((
ušt32_t
)0x00004000è

	)

2656 

	#AFIO_MAPR_CAN_REMAP_REMAP3
 ((
ušt32_t
)0x00006000è

	)

2658 

	#AFIO_MAPR_PD01_REMAP
 ((
ušt32_t
)0x00008000è

	)

2659 

	#AFIO_MAPR_TIM5CH4_IREMAP
 ((
ušt32_t
)0x00010000è

	)

2660 

	#AFIO_MAPR_ADC1_ETRGINJ_REMAP
 ((
ušt32_t
)0x00020000è

	)

2661 

	#AFIO_MAPR_ADC1_ETRGREG_REMAP
 ((
ušt32_t
)0x00040000è

	)

2662 

	#AFIO_MAPR_ADC2_ETRGINJ_REMAP
 ((
ušt32_t
)0x00080000è

	)

2663 

	#AFIO_MAPR_ADC2_ETRGREG_REMAP
 ((
ušt32_t
)0x00100000è

	)

2666 

	#AFIO_MAPR_SWJ_CFG
 ((
ušt32_t
)0x07000000è

	)

2667 

	#AFIO_MAPR_SWJ_CFG_0
 ((
ušt32_t
)0x01000000è

	)

2668 

	#AFIO_MAPR_SWJ_CFG_1
 ((
ušt32_t
)0x02000000è

	)

2669 

	#AFIO_MAPR_SWJ_CFG_2
 ((
ušt32_t
)0x04000000è

	)

2671 

	#AFIO_MAPR_SWJ_CFG_RESET
 ((
ušt32_t
)0x00000000è

	)

2672 

	#AFIO_MAPR_SWJ_CFG_NOJNTRST
 ((
ušt32_t
)0x01000000è

	)

2673 

	#AFIO_MAPR_SWJ_CFG_JTAGDISABLE
 ((
ušt32_t
)0x02000000è

	)

2674 

	#AFIO_MAPR_SWJ_CFG_DISABLE
 ((
ušt32_t
)0x04000000è

	)

2676 #ifdeà
STM32F10X_CL


2678 

	#AFIO_MAPR_ETH_REMAP
 ((
ušt32_t
)0x00200000è

	)

2681 

	#AFIO_MAPR_CAN2_REMAP
 ((
ušt32_t
)0x00400000è

	)

2684 

	#AFIO_MAPR_MII_RMII_SEL
 ((
ušt32_t
)0x00800000è

	)

2687 

	#AFIO_MAPR_SPI3_REMAP
 ((
ušt32_t
)0x10000000è

	)

2690 

	#AFIO_MAPR_TIM2ITR1_IREMAP
 ((
ušt32_t
)0x20000000è

	)

2693 

	#AFIO_MAPR_PTP_PPS_REMAP
 ((
ušt32_t
)0x40000000è

	)

2697 

	#AFIO_EXTICR1_EXTI0
 ((
ušt16_t
)0x000Fè

	)

2698 

	#AFIO_EXTICR1_EXTI1
 ((
ušt16_t
)0x00F0è

	)

2699 

	#AFIO_EXTICR1_EXTI2
 ((
ušt16_t
)0x0F00è

	)

2700 

	#AFIO_EXTICR1_EXTI3
 ((
ušt16_t
)0xF000è

	)

2703 

	#AFIO_EXTICR1_EXTI0_PA
 ((
ušt16_t
)0x0000è

	)

2704 

	#AFIO_EXTICR1_EXTI0_PB
 ((
ušt16_t
)0x0001è

	)

2705 

	#AFIO_EXTICR1_EXTI0_PC
 ((
ušt16_t
)0x0002è

	)

2706 

	#AFIO_EXTICR1_EXTI0_PD
 ((
ušt16_t
)0x0003è

	)

2707 

	#AFIO_EXTICR1_EXTI0_PE
 ((
ušt16_t
)0x0004è

	)

2708 

	#AFIO_EXTICR1_EXTI0_PF
 ((
ušt16_t
)0x0005è

	)

2709 

	#AFIO_EXTICR1_EXTI0_PG
 ((
ušt16_t
)0x0006è

	)

2712 

	#AFIO_EXTICR1_EXTI1_PA
 ((
ušt16_t
)0x0000è

	)

2713 

	#AFIO_EXTICR1_EXTI1_PB
 ((
ušt16_t
)0x0010è

	)

2714 

	#AFIO_EXTICR1_EXTI1_PC
 ((
ušt16_t
)0x0020è

	)

2715 

	#AFIO_EXTICR1_EXTI1_PD
 ((
ušt16_t
)0x0030è

	)

2716 

	#AFIO_EXTICR1_EXTI1_PE
 ((
ušt16_t
)0x0040è

	)

2717 

	#AFIO_EXTICR1_EXTI1_PF
 ((
ušt16_t
)0x0050è

	)

2718 

	#AFIO_EXTICR1_EXTI1_PG
 ((
ušt16_t
)0x0060è

	)

2721 

	#AFIO_EXTICR1_EXTI2_PA
 ((
ušt16_t
)0x0000è

	)

2722 

	#AFIO_EXTICR1_EXTI2_PB
 ((
ušt16_t
)0x0100è

	)

2723 

	#AFIO_EXTICR1_EXTI2_PC
 ((
ušt16_t
)0x0200è

	)

2724 

	#AFIO_EXTICR1_EXTI2_PD
 ((
ušt16_t
)0x0300è

	)

2725 

	#AFIO_EXTICR1_EXTI2_PE
 ((
ušt16_t
)0x0400è

	)

2726 

	#AFIO_EXTICR1_EXTI2_PF
 ((
ušt16_t
)0x0500è

	)

2727 

	#AFIO_EXTICR1_EXTI2_PG
 ((
ušt16_t
)0x0600è

	)

2730 

	#AFIO_EXTICR1_EXTI3_PA
 ((
ušt16_t
)0x0000è

	)

2731 

	#AFIO_EXTICR1_EXTI3_PB
 ((
ušt16_t
)0x1000è

	)

2732 

	#AFIO_EXTICR1_EXTI3_PC
 ((
ušt16_t
)0x2000è

	)

2733 

	#AFIO_EXTICR1_EXTI3_PD
 ((
ušt16_t
)0x3000è

	)

2734 

	#AFIO_EXTICR1_EXTI3_PE
 ((
ušt16_t
)0x4000è

	)

2735 

	#AFIO_EXTICR1_EXTI3_PF
 ((
ušt16_t
)0x5000è

	)

2736 

	#AFIO_EXTICR1_EXTI3_PG
 ((
ušt16_t
)0x6000è

	)

2739 

	#AFIO_EXTICR2_EXTI4
 ((
ušt16_t
)0x000Fè

	)

2740 

	#AFIO_EXTICR2_EXTI5
 ((
ušt16_t
)0x00F0è

	)

2741 

	#AFIO_EXTICR2_EXTI6
 ((
ušt16_t
)0x0F00è

	)

2742 

	#AFIO_EXTICR2_EXTI7
 ((
ušt16_t
)0xF000è

	)

2745 

	#AFIO_EXTICR2_EXTI4_PA
 ((
ušt16_t
)0x0000è

	)

2746 

	#AFIO_EXTICR2_EXTI4_PB
 ((
ušt16_t
)0x0001è

	)

2747 

	#AFIO_EXTICR2_EXTI4_PC
 ((
ušt16_t
)0x0002è

	)

2748 

	#AFIO_EXTICR2_EXTI4_PD
 ((
ušt16_t
)0x0003è

	)

2749 

	#AFIO_EXTICR2_EXTI4_PE
 ((
ušt16_t
)0x0004è

	)

2750 

	#AFIO_EXTICR2_EXTI4_PF
 ((
ušt16_t
)0x0005è

	)

2751 

	#AFIO_EXTICR2_EXTI4_PG
 ((
ušt16_t
)0x0006è

	)

2754 

	#AFIO_EXTICR2_EXTI5_PA
 ((
ušt16_t
)0x0000è

	)

2755 

	#AFIO_EXTICR2_EXTI5_PB
 ((
ušt16_t
)0x0010è

	)

2756 

	#AFIO_EXTICR2_EXTI5_PC
 ((
ušt16_t
)0x0020è

	)

2757 

	#AFIO_EXTICR2_EXTI5_PD
 ((
ušt16_t
)0x0030è

	)

2758 

	#AFIO_EXTICR2_EXTI5_PE
 ((
ušt16_t
)0x0040è

	)

2759 

	#AFIO_EXTICR2_EXTI5_PF
 ((
ušt16_t
)0x0050è

	)

2760 

	#AFIO_EXTICR2_EXTI5_PG
 ((
ušt16_t
)0x0060è

	)

2763 

	#AFIO_EXTICR2_EXTI6_PA
 ((
ušt16_t
)0x0000è

	)

2764 

	#AFIO_EXTICR2_EXTI6_PB
 ((
ušt16_t
)0x0100è

	)

2765 

	#AFIO_EXTICR2_EXTI6_PC
 ((
ušt16_t
)0x0200è

	)

2766 

	#AFIO_EXTICR2_EXTI6_PD
 ((
ušt16_t
)0x0300è

	)

2767 

	#AFIO_EXTICR2_EXTI6_PE
 ((
ušt16_t
)0x0400è

	)

2768 

	#AFIO_EXTICR2_EXTI6_PF
 ((
ušt16_t
)0x0500è

	)

2769 

	#AFIO_EXTICR2_EXTI6_PG
 ((
ušt16_t
)0x0600è

	)

2772 

	#AFIO_EXTICR2_EXTI7_PA
 ((
ušt16_t
)0x0000è

	)

2773 

	#AFIO_EXTICR2_EXTI7_PB
 ((
ušt16_t
)0x1000è

	)

2774 

	#AFIO_EXTICR2_EXTI7_PC
 ((
ušt16_t
)0x2000è

	)

2775 

	#AFIO_EXTICR2_EXTI7_PD
 ((
ušt16_t
)0x3000è

	)

2776 

	#AFIO_EXTICR2_EXTI7_PE
 ((
ušt16_t
)0x4000è

	)

2777 

	#AFIO_EXTICR2_EXTI7_PF
 ((
ušt16_t
)0x5000è

	)

2778 

	#AFIO_EXTICR2_EXTI7_PG
 ((
ušt16_t
)0x6000è

	)

2781 

	#AFIO_EXTICR3_EXTI8
 ((
ušt16_t
)0x000Fè

	)

2782 

	#AFIO_EXTICR3_EXTI9
 ((
ušt16_t
)0x00F0è

	)

2783 

	#AFIO_EXTICR3_EXTI10
 ((
ušt16_t
)0x0F00è

	)

2784 

	#AFIO_EXTICR3_EXTI11
 ((
ušt16_t
)0xF000è

	)

2787 

	#AFIO_EXTICR3_EXTI8_PA
 ((
ušt16_t
)0x0000è

	)

2788 

	#AFIO_EXTICR3_EXTI8_PB
 ((
ušt16_t
)0x0001è

	)

2789 

	#AFIO_EXTICR3_EXTI8_PC
 ((
ušt16_t
)0x0002è

	)

2790 

	#AFIO_EXTICR3_EXTI8_PD
 ((
ušt16_t
)0x0003è

	)

2791 

	#AFIO_EXTICR3_EXTI8_PE
 ((
ušt16_t
)0x0004è

	)

2792 

	#AFIO_EXTICR3_EXTI8_PF
 ((
ušt16_t
)0x0005è

	)

2793 

	#AFIO_EXTICR3_EXTI8_PG
 ((
ušt16_t
)0x0006è

	)

2796 

	#AFIO_EXTICR3_EXTI9_PA
 ((
ušt16_t
)0x0000è

	)

2797 

	#AFIO_EXTICR3_EXTI9_PB
 ((
ušt16_t
)0x0010è

	)

2798 

	#AFIO_EXTICR3_EXTI9_PC
 ((
ušt16_t
)0x0020è

	)

2799 

	#AFIO_EXTICR3_EXTI9_PD
 ((
ušt16_t
)0x0030è

	)

2800 

	#AFIO_EXTICR3_EXTI9_PE
 ((
ušt16_t
)0x0040è

	)

2801 

	#AFIO_EXTICR3_EXTI9_PF
 ((
ušt16_t
)0x0050è

	)

2802 

	#AFIO_EXTICR3_EXTI9_PG
 ((
ušt16_t
)0x0060è

	)

2805 

	#AFIO_EXTICR3_EXTI10_PA
 ((
ušt16_t
)0x0000è

	)

2806 

	#AFIO_EXTICR3_EXTI10_PB
 ((
ušt16_t
)0x0100è

	)

2807 

	#AFIO_EXTICR3_EXTI10_PC
 ((
ušt16_t
)0x0200è

	)

2808 

	#AFIO_EXTICR3_EXTI10_PD
 ((
ušt16_t
)0x0300è

	)

2809 

	#AFIO_EXTICR3_EXTI10_PE
 ((
ušt16_t
)0x0400è

	)

2810 

	#AFIO_EXTICR3_EXTI10_PF
 ((
ušt16_t
)0x0500è

	)

2811 

	#AFIO_EXTICR3_EXTI10_PG
 ((
ušt16_t
)0x0600è

	)

2814 

	#AFIO_EXTICR3_EXTI11_PA
 ((
ušt16_t
)0x0000è

	)

2815 

	#AFIO_EXTICR3_EXTI11_PB
 ((
ušt16_t
)0x1000è

	)

2816 

	#AFIO_EXTICR3_EXTI11_PC
 ((
ušt16_t
)0x2000è

	)

2817 

	#AFIO_EXTICR3_EXTI11_PD
 ((
ušt16_t
)0x3000è

	)

2818 

	#AFIO_EXTICR3_EXTI11_PE
 ((
ušt16_t
)0x4000è

	)

2819 

	#AFIO_EXTICR3_EXTI11_PF
 ((
ušt16_t
)0x5000è

	)

2820 

	#AFIO_EXTICR3_EXTI11_PG
 ((
ušt16_t
)0x6000è

	)

2823 

	#AFIO_EXTICR4_EXTI12
 ((
ušt16_t
)0x000Fè

	)

2824 

	#AFIO_EXTICR4_EXTI13
 ((
ušt16_t
)0x00F0è

	)

2825 

	#AFIO_EXTICR4_EXTI14
 ((
ušt16_t
)0x0F00è

	)

2826 

	#AFIO_EXTICR4_EXTI15
 ((
ušt16_t
)0xF000è

	)

2829 

	#AFIO_EXTICR4_EXTI12_PA
 ((
ušt16_t
)0x0000è

	)

2830 

	#AFIO_EXTICR4_EXTI12_PB
 ((
ušt16_t
)0x0001è

	)

2831 

	#AFIO_EXTICR4_EXTI12_PC
 ((
ušt16_t
)0x0002è

	)

2832 

	#AFIO_EXTICR4_EXTI12_PD
 ((
ušt16_t
)0x0003è

	)

2833 

	#AFIO_EXTICR4_EXTI12_PE
 ((
ušt16_t
)0x0004è

	)

2834 

	#AFIO_EXTICR4_EXTI12_PF
 ((
ušt16_t
)0x0005è

	)

2835 

	#AFIO_EXTICR4_EXTI12_PG
 ((
ušt16_t
)0x0006è

	)

2838 

	#AFIO_EXTICR4_EXTI13_PA
 ((
ušt16_t
)0x0000è

	)

2839 

	#AFIO_EXTICR4_EXTI13_PB
 ((
ušt16_t
)0x0010è

	)

2840 

	#AFIO_EXTICR4_EXTI13_PC
 ((
ušt16_t
)0x0020è

	)

2841 

	#AFIO_EXTICR4_EXTI13_PD
 ((
ušt16_t
)0x0030è

	)

2842 

	#AFIO_EXTICR4_EXTI13_PE
 ((
ušt16_t
)0x0040è

	)

2843 

	#AFIO_EXTICR4_EXTI13_PF
 ((
ušt16_t
)0x0050è

	)

2844 

	#AFIO_EXTICR4_EXTI13_PG
 ((
ušt16_t
)0x0060è

	)

2847 

	#AFIO_EXTICR4_EXTI14_PA
 ((
ušt16_t
)0x0000è

	)

2848 

	#AFIO_EXTICR4_EXTI14_PB
 ((
ušt16_t
)0x0100è

	)

2849 

	#AFIO_EXTICR4_EXTI14_PC
 ((
ušt16_t
)0x0200è

	)

2850 

	#AFIO_EXTICR4_EXTI14_PD
 ((
ušt16_t
)0x0300è

	)

2851 

	#AFIO_EXTICR4_EXTI14_PE
 ((
ušt16_t
)0x0400è

	)

2852 

	#AFIO_EXTICR4_EXTI14_PF
 ((
ušt16_t
)0x0500è

	)

2853 

	#AFIO_EXTICR4_EXTI14_PG
 ((
ušt16_t
)0x0600è

	)

2856 

	#AFIO_EXTICR4_EXTI15_PA
 ((
ušt16_t
)0x0000è

	)

2857 

	#AFIO_EXTICR4_EXTI15_PB
 ((
ušt16_t
)0x1000è

	)

2858 

	#AFIO_EXTICR4_EXTI15_PC
 ((
ušt16_t
)0x2000è

	)

2859 

	#AFIO_EXTICR4_EXTI15_PD
 ((
ušt16_t
)0x3000è

	)

2860 

	#AFIO_EXTICR4_EXTI15_PE
 ((
ušt16_t
)0x4000è

	)

2861 

	#AFIO_EXTICR4_EXTI15_PF
 ((
ušt16_t
)0x5000è

	)

2862 

	#AFIO_EXTICR4_EXTI15_PG
 ((
ušt16_t
)0x6000è

	)

2864 #ià
defšed
 (
STM32F10X_LD_VL
è|| defšed (
STM32F10X_MD_VL
è|| defšed (
STM32F10X_HD_VL
)

2866 

	#AFIO_MAPR2_TIM15_REMAP
 ((
ušt32_t
)0x00000001è

	)

2867 

	#AFIO_MAPR2_TIM16_REMAP
 ((
ušt32_t
)0x00000002è

	)

2868 

	#AFIO_MAPR2_TIM17_REMAP
 ((
ušt32_t
)0x00000004è

	)

2869 

	#AFIO_MAPR2_CEC_REMAP
 ((
ušt32_t
)0x00000008è

	)

2870 

	#AFIO_MAPR2_TIM1_DMA_REMAP
 ((
ušt32_t
)0x00000010è

	)

2873 #ifdeà
STM32F10X_HD_VL


2874 

	#AFIO_MAPR2_TIM13_REMAP
 ((
ušt32_t
)0x00000100è

	)

2875 

	#AFIO_MAPR2_TIM14_REMAP
 ((
ušt32_t
)0x00000200è

	)

2876 

	#AFIO_MAPR2_FSMC_NADV_REMAP
 ((
ušt32_t
)0x00000400è

	)

2877 

	#AFIO_MAPR2_TIM67_DAC_DMA_REMAP
 ((
ušt32_t
)0x00000800è

	)

2878 

	#AFIO_MAPR2_TIM12_REMAP
 ((
ušt32_t
)0x00001000è

	)

2879 

	#AFIO_MAPR2_MISC_REMAP
 ((
ušt32_t
)0x00002000è

	)

2882 #ifdeà
STM32F10X_XL


2884 

	#AFIO_MAPR2_TIM9_REMAP
 ((
ušt32_t
)0x00000020è

	)

2885 

	#AFIO_MAPR2_TIM10_REMAP
 ((
ušt32_t
)0x00000040è

	)

2886 

	#AFIO_MAPR2_TIM11_REMAP
 ((
ušt32_t
)0x00000080è

	)

2887 

	#AFIO_MAPR2_TIM13_REMAP
 ((
ušt32_t
)0x00000100è

	)

2888 

	#AFIO_MAPR2_TIM14_REMAP
 ((
ušt32_t
)0x00000200è

	)

2889 

	#AFIO_MAPR2_FSMC_NADV_REMAP
 ((
ušt32_t
)0x00000400è

	)

2899 

	#SysTick_CTRL_ENABLE
 ((
ušt32_t
)0x00000001è

	)

2900 

	#SysTick_CTRL_TICKINT
 ((
ušt32_t
)0x00000002è

	)

2901 

	#SysTick_CTRL_CLKSOURCE
 ((
ušt32_t
)0x00000004è

	)

2902 

	#SysTick_CTRL_COUNTFLAG
 ((
ušt32_t
)0x00010000è

	)

2905 

	#SysTick_LOAD_RELOAD
 ((
ušt32_t
)0x00FFFFFFè

	)

2908 

	#SysTick_VAL_CURRENT
 ((
ušt32_t
)0x00FFFFFFè

	)

2911 

	#SysTick_CALIB_TENMS
 ((
ušt32_t
)0x00FFFFFFè

	)

2912 

	#SysTick_CALIB_SKEW
 ((
ušt32_t
)0x40000000è

	)

2913 

	#SysTick_CALIB_NOREF
 ((
ušt32_t
)0x80000000è

	)

2922 

	#NVIC_ISER_SETENA
 ((
ušt32_t
)0xFFFFFFFFè

	)

2923 

	#NVIC_ISER_SETENA_0
 ((
ušt32_t
)0x00000001è

	)

2924 

	#NVIC_ISER_SETENA_1
 ((
ušt32_t
)0x00000002è

	)

2925 

	#NVIC_ISER_SETENA_2
 ((
ušt32_t
)0x00000004è

	)

2926 

	#NVIC_ISER_SETENA_3
 ((
ušt32_t
)0x00000008è

	)

2927 

	#NVIC_ISER_SETENA_4
 ((
ušt32_t
)0x00000010è

	)

2928 

	#NVIC_ISER_SETENA_5
 ((
ušt32_t
)0x00000020è

	)

2929 

	#NVIC_ISER_SETENA_6
 ((
ušt32_t
)0x00000040è

	)

2930 

	#NVIC_ISER_SETENA_7
 ((
ušt32_t
)0x00000080è

	)

2931 

	#NVIC_ISER_SETENA_8
 ((
ušt32_t
)0x00000100è

	)

2932 

	#NVIC_ISER_SETENA_9
 ((
ušt32_t
)0x00000200è

	)

2933 

	#NVIC_ISER_SETENA_10
 ((
ušt32_t
)0x00000400è

	)

2934 

	#NVIC_ISER_SETENA_11
 ((
ušt32_t
)0x00000800è

	)

2935 

	#NVIC_ISER_SETENA_12
 ((
ušt32_t
)0x00001000è

	)

2936 

	#NVIC_ISER_SETENA_13
 ((
ušt32_t
)0x00002000è

	)

2937 

	#NVIC_ISER_SETENA_14
 ((
ušt32_t
)0x00004000è

	)

2938 

	#NVIC_ISER_SETENA_15
 ((
ušt32_t
)0x00008000è

	)

2939 

	#NVIC_ISER_SETENA_16
 ((
ušt32_t
)0x00010000è

	)

2940 

	#NVIC_ISER_SETENA_17
 ((
ušt32_t
)0x00020000è

	)

2941 

	#NVIC_ISER_SETENA_18
 ((
ušt32_t
)0x00040000è

	)

2942 

	#NVIC_ISER_SETENA_19
 ((
ušt32_t
)0x00080000è

	)

2943 

	#NVIC_ISER_SETENA_20
 ((
ušt32_t
)0x00100000è

	)

2944 

	#NVIC_ISER_SETENA_21
 ((
ušt32_t
)0x00200000è

	)

2945 

	#NVIC_ISER_SETENA_22
 ((
ušt32_t
)0x00400000è

	)

2946 

	#NVIC_ISER_SETENA_23
 ((
ušt32_t
)0x00800000è

	)

2947 

	#NVIC_ISER_SETENA_24
 ((
ušt32_t
)0x01000000è

	)

2948 

	#NVIC_ISER_SETENA_25
 ((
ušt32_t
)0x02000000è

	)

2949 

	#NVIC_ISER_SETENA_26
 ((
ušt32_t
)0x04000000è

	)

2950 

	#NVIC_ISER_SETENA_27
 ((
ušt32_t
)0x08000000è

	)

2951 

	#NVIC_ISER_SETENA_28
 ((
ušt32_t
)0x10000000è

	)

2952 

	#NVIC_ISER_SETENA_29
 ((
ušt32_t
)0x20000000è

	)

2953 

	#NVIC_ISER_SETENA_30
 ((
ušt32_t
)0x40000000è

	)

2954 

	#NVIC_ISER_SETENA_31
 ((
ušt32_t
)0x80000000è

	)

2957 

	#NVIC_ICER_CLRENA
 ((
ušt32_t
)0xFFFFFFFFè

	)

2958 

	#NVIC_ICER_CLRENA_0
 ((
ušt32_t
)0x00000001è

	)

2959 

	#NVIC_ICER_CLRENA_1
 ((
ušt32_t
)0x00000002è

	)

2960 

	#NVIC_ICER_CLRENA_2
 ((
ušt32_t
)0x00000004è

	)

2961 

	#NVIC_ICER_CLRENA_3
 ((
ušt32_t
)0x00000008è

	)

2962 

	#NVIC_ICER_CLRENA_4
 ((
ušt32_t
)0x00000010è

	)

2963 

	#NVIC_ICER_CLRENA_5
 ((
ušt32_t
)0x00000020è

	)

2964 

	#NVIC_ICER_CLRENA_6
 ((
ušt32_t
)0x00000040è

	)

2965 

	#NVIC_ICER_CLRENA_7
 ((
ušt32_t
)0x00000080è

	)

2966 

	#NVIC_ICER_CLRENA_8
 ((
ušt32_t
)0x00000100è

	)

2967 

	#NVIC_ICER_CLRENA_9
 ((
ušt32_t
)0x00000200è

	)

2968 

	#NVIC_ICER_CLRENA_10
 ((
ušt32_t
)0x00000400è

	)

2969 

	#NVIC_ICER_CLRENA_11
 ((
ušt32_t
)0x00000800è

	)

2970 

	#NVIC_ICER_CLRENA_12
 ((
ušt32_t
)0x00001000è

	)

2971 

	#NVIC_ICER_CLRENA_13
 ((
ušt32_t
)0x00002000è

	)

2972 

	#NVIC_ICER_CLRENA_14
 ((
ušt32_t
)0x00004000è

	)

2973 

	#NVIC_ICER_CLRENA_15
 ((
ušt32_t
)0x00008000è

	)

2974 

	#NVIC_ICER_CLRENA_16
 ((
ušt32_t
)0x00010000è

	)

2975 

	#NVIC_ICER_CLRENA_17
 ((
ušt32_t
)0x00020000è

	)

2976 

	#NVIC_ICER_CLRENA_18
 ((
ušt32_t
)0x00040000è

	)

2977 

	#NVIC_ICER_CLRENA_19
 ((
ušt32_t
)0x00080000è

	)

2978 

	#NVIC_ICER_CLRENA_20
 ((
ušt32_t
)0x00100000è

	)

2979 

	#NVIC_ICER_CLRENA_21
 ((
ušt32_t
)0x00200000è

	)

2980 

	#NVIC_ICER_CLRENA_22
 ((
ušt32_t
)0x00400000è

	)

2981 

	#NVIC_ICER_CLRENA_23
 ((
ušt32_t
)0x00800000è

	)

2982 

	#NVIC_ICER_CLRENA_24
 ((
ušt32_t
)0x01000000è

	)

2983 

	#NVIC_ICER_CLRENA_25
 ((
ušt32_t
)0x02000000è

	)

2984 

	#NVIC_ICER_CLRENA_26
 ((
ušt32_t
)0x04000000è

	)

2985 

	#NVIC_ICER_CLRENA_27
 ((
ušt32_t
)0x08000000è

	)

2986 

	#NVIC_ICER_CLRENA_28
 ((
ušt32_t
)0x10000000è

	)

2987 

	#NVIC_ICER_CLRENA_29
 ((
ušt32_t
)0x20000000è

	)

2988 

	#NVIC_ICER_CLRENA_30
 ((
ušt32_t
)0x40000000è

	)

2989 

	#NVIC_ICER_CLRENA_31
 ((
ušt32_t
)0x80000000è

	)

2992 

	#NVIC_ISPR_SETPEND
 ((
ušt32_t
)0xFFFFFFFFè

	)

2993 

	#NVIC_ISPR_SETPEND_0
 ((
ušt32_t
)0x00000001è

	)

2994 

	#NVIC_ISPR_SETPEND_1
 ((
ušt32_t
)0x00000002è

	)

2995 

	#NVIC_ISPR_SETPEND_2
 ((
ušt32_t
)0x00000004è

	)

2996 

	#NVIC_ISPR_SETPEND_3
 ((
ušt32_t
)0x00000008è

	)

2997 

	#NVIC_ISPR_SETPEND_4
 ((
ušt32_t
)0x00000010è

	)

2998 

	#NVIC_ISPR_SETPEND_5
 ((
ušt32_t
)0x00000020è

	)

2999 

	#NVIC_ISPR_SETPEND_6
 ((
ušt32_t
)0x00000040è

	)

3000 

	#NVIC_ISPR_SETPEND_7
 ((
ušt32_t
)0x00000080è

	)

3001 

	#NVIC_ISPR_SETPEND_8
 ((
ušt32_t
)0x00000100è

	)

3002 

	#NVIC_ISPR_SETPEND_9
 ((
ušt32_t
)0x00000200è

	)

3003 

	#NVIC_ISPR_SETPEND_10
 ((
ušt32_t
)0x00000400è

	)

3004 

	#NVIC_ISPR_SETPEND_11
 ((
ušt32_t
)0x00000800è

	)

3005 

	#NVIC_ISPR_SETPEND_12
 ((
ušt32_t
)0x00001000è

	)

3006 

	#NVIC_ISPR_SETPEND_13
 ((
ušt32_t
)0x00002000è

	)

3007 

	#NVIC_ISPR_SETPEND_14
 ((
ušt32_t
)0x00004000è

	)

3008 

	#NVIC_ISPR_SETPEND_15
 ((
ušt32_t
)0x00008000è

	)

3009 

	#NVIC_ISPR_SETPEND_16
 ((
ušt32_t
)0x00010000è

	)

3010 

	#NVIC_ISPR_SETPEND_17
 ((
ušt32_t
)0x00020000è

	)

3011 

	#NVIC_ISPR_SETPEND_18
 ((
ušt32_t
)0x00040000è

	)

3012 

	#NVIC_ISPR_SETPEND_19
 ((
ušt32_t
)0x00080000è

	)

3013 

	#NVIC_ISPR_SETPEND_20
 ((
ušt32_t
)0x00100000è

	)

3014 

	#NVIC_ISPR_SETPEND_21
 ((
ušt32_t
)0x00200000è

	)

3015 

	#NVIC_ISPR_SETPEND_22
 ((
ušt32_t
)0x00400000è

	)

3016 

	#NVIC_ISPR_SETPEND_23
 ((
ušt32_t
)0x00800000è

	)

3017 

	#NVIC_ISPR_SETPEND_24
 ((
ušt32_t
)0x01000000è

	)

3018 

	#NVIC_ISPR_SETPEND_25
 ((
ušt32_t
)0x02000000è

	)

3019 

	#NVIC_ISPR_SETPEND_26
 ((
ušt32_t
)0x04000000è

	)

3020 

	#NVIC_ISPR_SETPEND_27
 ((
ušt32_t
)0x08000000è

	)

3021 

	#NVIC_ISPR_SETPEND_28
 ((
ušt32_t
)0x10000000è

	)

3022 

	#NVIC_ISPR_SETPEND_29
 ((
ušt32_t
)0x20000000è

	)

3023 

	#NVIC_ISPR_SETPEND_30
 ((
ušt32_t
)0x40000000è

	)

3024 

	#NVIC_ISPR_SETPEND_31
 ((
ušt32_t
)0x80000000è

	)

3027 

	#NVIC_ICPR_CLRPEND
 ((
ušt32_t
)0xFFFFFFFFè

	)

3028 

	#NVIC_ICPR_CLRPEND_0
 ((
ušt32_t
)0x00000001è

	)

3029 

	#NVIC_ICPR_CLRPEND_1
 ((
ušt32_t
)0x00000002è

	)

3030 

	#NVIC_ICPR_CLRPEND_2
 ((
ušt32_t
)0x00000004è

	)

3031 

	#NVIC_ICPR_CLRPEND_3
 ((
ušt32_t
)0x00000008è

	)

3032 

	#NVIC_ICPR_CLRPEND_4
 ((
ušt32_t
)0x00000010è

	)

3033 

	#NVIC_ICPR_CLRPEND_5
 ((
ušt32_t
)0x00000020è

	)

3034 

	#NVIC_ICPR_CLRPEND_6
 ((
ušt32_t
)0x00000040è

	)

3035 

	#NVIC_ICPR_CLRPEND_7
 ((
ušt32_t
)0x00000080è

	)

3036 

	#NVIC_ICPR_CLRPEND_8
 ((
ušt32_t
)0x00000100è

	)

3037 

	#NVIC_ICPR_CLRPEND_9
 ((
ušt32_t
)0x00000200è

	)

3038 

	#NVIC_ICPR_CLRPEND_10
 ((
ušt32_t
)0x00000400è

	)

3039 

	#NVIC_ICPR_CLRPEND_11
 ((
ušt32_t
)0x00000800è

	)

3040 

	#NVIC_ICPR_CLRPEND_12
 ((
ušt32_t
)0x00001000è

	)

3041 

	#NVIC_ICPR_CLRPEND_13
 ((
ušt32_t
)0x00002000è

	)

3042 

	#NVIC_ICPR_CLRPEND_14
 ((
ušt32_t
)0x00004000è

	)

3043 

	#NVIC_ICPR_CLRPEND_15
 ((
ušt32_t
)0x00008000è

	)

3044 

	#NVIC_ICPR_CLRPEND_16
 ((
ušt32_t
)0x00010000è

	)

3045 

	#NVIC_ICPR_CLRPEND_17
 ((
ušt32_t
)0x00020000è

	)

3046 

	#NVIC_ICPR_CLRPEND_18
 ((
ušt32_t
)0x00040000è

	)

3047 

	#NVIC_ICPR_CLRPEND_19
 ((
ušt32_t
)0x00080000è

	)

3048 

	#NVIC_ICPR_CLRPEND_20
 ((
ušt32_t
)0x00100000è

	)

3049 

	#NVIC_ICPR_CLRPEND_21
 ((
ušt32_t
)0x00200000è

	)

3050 

	#NVIC_ICPR_CLRPEND_22
 ((
ušt32_t
)0x00400000è

	)

3051 

	#NVIC_ICPR_CLRPEND_23
 ((
ušt32_t
)0x00800000è

	)

3052 

	#NVIC_ICPR_CLRPEND_24
 ((
ušt32_t
)0x01000000è

	)

3053 

	#NVIC_ICPR_CLRPEND_25
 ((
ušt32_t
)0x02000000è

	)

3054 

	#NVIC_ICPR_CLRPEND_26
 ((
ušt32_t
)0x04000000è

	)

3055 

	#NVIC_ICPR_CLRPEND_27
 ((
ušt32_t
)0x08000000è

	)

3056 

	#NVIC_ICPR_CLRPEND_28
 ((
ušt32_t
)0x10000000è

	)

3057 

	#NVIC_ICPR_CLRPEND_29
 ((
ušt32_t
)0x20000000è

	)

3058 

	#NVIC_ICPR_CLRPEND_30
 ((
ušt32_t
)0x40000000è

	)

3059 

	#NVIC_ICPR_CLRPEND_31
 ((
ušt32_t
)0x80000000è

	)

3062 

	#NVIC_IABR_ACTIVE
 ((
ušt32_t
)0xFFFFFFFFè

	)

3063 

	#NVIC_IABR_ACTIVE_0
 ((
ušt32_t
)0x00000001è

	)

3064 

	#NVIC_IABR_ACTIVE_1
 ((
ušt32_t
)0x00000002è

	)

3065 

	#NVIC_IABR_ACTIVE_2
 ((
ušt32_t
)0x00000004è

	)

3066 

	#NVIC_IABR_ACTIVE_3
 ((
ušt32_t
)0x00000008è

	)

3067 

	#NVIC_IABR_ACTIVE_4
 ((
ušt32_t
)0x00000010è

	)

3068 

	#NVIC_IABR_ACTIVE_5
 ((
ušt32_t
)0x00000020è

	)

3069 

	#NVIC_IABR_ACTIVE_6
 ((
ušt32_t
)0x00000040è

	)

3070 

	#NVIC_IABR_ACTIVE_7
 ((
ušt32_t
)0x00000080è

	)

3071 

	#NVIC_IABR_ACTIVE_8
 ((
ušt32_t
)0x00000100è

	)

3072 

	#NVIC_IABR_ACTIVE_9
 ((
ušt32_t
)0x00000200è

	)

3073 

	#NVIC_IABR_ACTIVE_10
 ((
ušt32_t
)0x00000400è

	)

3074 

	#NVIC_IABR_ACTIVE_11
 ((
ušt32_t
)0x00000800è

	)

3075 

	#NVIC_IABR_ACTIVE_12
 ((
ušt32_t
)0x00001000è

	)

3076 

	#NVIC_IABR_ACTIVE_13
 ((
ušt32_t
)0x00002000è

	)

3077 

	#NVIC_IABR_ACTIVE_14
 ((
ušt32_t
)0x00004000è

	)

3078 

	#NVIC_IABR_ACTIVE_15
 ((
ušt32_t
)0x00008000è

	)

3079 

	#NVIC_IABR_ACTIVE_16
 ((
ušt32_t
)0x00010000è

	)

3080 

	#NVIC_IABR_ACTIVE_17
 ((
ušt32_t
)0x00020000è

	)

3081 

	#NVIC_IABR_ACTIVE_18
 ((
ušt32_t
)0x00040000è

	)

3082 

	#NVIC_IABR_ACTIVE_19
 ((
ušt32_t
)0x00080000è

	)

3083 

	#NVIC_IABR_ACTIVE_20
 ((
ušt32_t
)0x00100000è

	)

3084 

	#NVIC_IABR_ACTIVE_21
 ((
ušt32_t
)0x00200000è

	)

3085 

	#NVIC_IABR_ACTIVE_22
 ((
ušt32_t
)0x00400000è

	)

3086 

	#NVIC_IABR_ACTIVE_23
 ((
ušt32_t
)0x00800000è

	)

3087 

	#NVIC_IABR_ACTIVE_24
 ((
ušt32_t
)0x01000000è

	)

3088 

	#NVIC_IABR_ACTIVE_25
 ((
ušt32_t
)0x02000000è

	)

3089 

	#NVIC_IABR_ACTIVE_26
 ((
ušt32_t
)0x04000000è

	)

3090 

	#NVIC_IABR_ACTIVE_27
 ((
ušt32_t
)0x08000000è

	)

3091 

	#NVIC_IABR_ACTIVE_28
 ((
ušt32_t
)0x10000000è

	)

3092 

	#NVIC_IABR_ACTIVE_29
 ((
ušt32_t
)0x20000000è

	)

3093 

	#NVIC_IABR_ACTIVE_30
 ((
ušt32_t
)0x40000000è

	)

3094 

	#NVIC_IABR_ACTIVE_31
 ((
ušt32_t
)0x80000000è

	)

3097 

	#NVIC_IPR0_PRI_0
 ((
ušt32_t
)0x000000FFè

	)

3098 

	#NVIC_IPR0_PRI_1
 ((
ušt32_t
)0x0000FF00è

	)

3099 

	#NVIC_IPR0_PRI_2
 ((
ušt32_t
)0x00FF0000è

	)

3100 

	#NVIC_IPR0_PRI_3
 ((
ušt32_t
)0xFF000000è

	)

3103 

	#NVIC_IPR1_PRI_4
 ((
ušt32_t
)0x000000FFè

	)

3104 

	#NVIC_IPR1_PRI_5
 ((
ušt32_t
)0x0000FF00è

	)

3105 

	#NVIC_IPR1_PRI_6
 ((
ušt32_t
)0x00FF0000è

	)

3106 

	#NVIC_IPR1_PRI_7
 ((
ušt32_t
)0xFF000000è

	)

3109 

	#NVIC_IPR2_PRI_8
 ((
ušt32_t
)0x000000FFè

	)

3110 

	#NVIC_IPR2_PRI_9
 ((
ušt32_t
)0x0000FF00è

	)

3111 

	#NVIC_IPR2_PRI_10
 ((
ušt32_t
)0x00FF0000è

	)

3112 

	#NVIC_IPR2_PRI_11
 ((
ušt32_t
)0xFF000000è

	)

3115 

	#NVIC_IPR3_PRI_12
 ((
ušt32_t
)0x000000FFè

	)

3116 

	#NVIC_IPR3_PRI_13
 ((
ušt32_t
)0x0000FF00è

	)

3117 

	#NVIC_IPR3_PRI_14
 ((
ušt32_t
)0x00FF0000è

	)

3118 

	#NVIC_IPR3_PRI_15
 ((
ušt32_t
)0xFF000000è

	)

3121 

	#NVIC_IPR4_PRI_16
 ((
ušt32_t
)0x000000FFè

	)

3122 

	#NVIC_IPR4_PRI_17
 ((
ušt32_t
)0x0000FF00è

	)

3123 

	#NVIC_IPR4_PRI_18
 ((
ušt32_t
)0x00FF0000è

	)

3124 

	#NVIC_IPR4_PRI_19
 ((
ušt32_t
)0xFF000000è

	)

3127 

	#NVIC_IPR5_PRI_20
 ((
ušt32_t
)0x000000FFè

	)

3128 

	#NVIC_IPR5_PRI_21
 ((
ušt32_t
)0x0000FF00è

	)

3129 

	#NVIC_IPR5_PRI_22
 ((
ušt32_t
)0x00FF0000è

	)

3130 

	#NVIC_IPR5_PRI_23
 ((
ušt32_t
)0xFF000000è

	)

3133 

	#NVIC_IPR6_PRI_24
 ((
ušt32_t
)0x000000FFè

	)

3134 

	#NVIC_IPR6_PRI_25
 ((
ušt32_t
)0x0000FF00è

	)

3135 

	#NVIC_IPR6_PRI_26
 ((
ušt32_t
)0x00FF0000è

	)

3136 

	#NVIC_IPR6_PRI_27
 ((
ušt32_t
)0xFF000000è

	)

3139 

	#NVIC_IPR7_PRI_28
 ((
ušt32_t
)0x000000FFè

	)

3140 

	#NVIC_IPR7_PRI_29
 ((
ušt32_t
)0x0000FF00è

	)

3141 

	#NVIC_IPR7_PRI_30
 ((
ušt32_t
)0x00FF0000è

	)

3142 

	#NVIC_IPR7_PRI_31
 ((
ušt32_t
)0xFF000000è

	)

3145 

	#SCB_CPUID_REVISION
 ((
ušt32_t
)0x0000000Fè

	)

3146 

	#SCB_CPUID_PARTNO
 ((
ušt32_t
)0x0000FFF0è

	)

3147 

	#SCB_CPUID_CÚ¡ªt
 ((
ušt32_t
)0x000F0000è

	)

3148 

	#SCB_CPUID_VARIANT
 ((
ušt32_t
)0x00F00000è

	)

3149 

	#SCB_CPUID_IMPLEMENTER
 ((
ušt32_t
)0xFF000000è

	)

3152 

	#SCB_ICSR_VECTACTIVE
 ((
ušt32_t
)0x000001FFè

	)

3153 

	#SCB_ICSR_RETTOBASE
 ((
ušt32_t
)0x00000800è

	)

3154 

	#SCB_ICSR_VECTPENDING
 ((
ušt32_t
)0x003FF000è

	)

3155 

	#SCB_ICSR_ISRPENDING
 ((
ušt32_t
)0x00400000è

	)

3156 

	#SCB_ICSR_ISRPREEMPT
 ((
ušt32_t
)0x00800000è

	)

3157 

	#SCB_ICSR_PENDSTCLR
 ((
ušt32_t
)0x02000000è

	)

3158 

	#SCB_ICSR_PENDSTSET
 ((
ušt32_t
)0x04000000è

	)

3159 

	#SCB_ICSR_PENDSVCLR
 ((
ušt32_t
)0x08000000è

	)

3160 

	#SCB_ICSR_PENDSVSET
 ((
ušt32_t
)0x10000000è

	)

3161 

	#SCB_ICSR_NMIPENDSET
 ((
ušt32_t
)0x80000000è

	)

3164 

	#SCB_VTOR_TBLOFF
 ((
ušt32_t
)0x1FFFFF80è

	)

3165 

	#SCB_VTOR_TBLBASE
 ((
ušt32_t
)0x20000000è

	)

3168 

	#SCB_AIRCR_VECTRESET
 ((
ušt32_t
)0x00000001è

	)

3169 

	#SCB_AIRCR_VECTCLRACTIVE
 ((
ušt32_t
)0x00000002è

	)

3170 

	#SCB_AIRCR_SYSRESETREQ
 ((
ušt32_t
)0x00000004è

	)

3172 

	#SCB_AIRCR_PRIGROUP
 ((
ušt32_t
)0x00000700è

	)

3173 

	#SCB_AIRCR_PRIGROUP_0
 ((
ušt32_t
)0x00000100è

	)

3174 

	#SCB_AIRCR_PRIGROUP_1
 ((
ušt32_t
)0x00000200è

	)

3175 

	#SCB_AIRCR_PRIGROUP_2
 ((
ušt32_t
)0x00000400è

	)

3178 

	#SCB_AIRCR_PRIGROUP0
 ((
ušt32_t
)0x00000000è

	)

3179 

	#SCB_AIRCR_PRIGROUP1
 ((
ušt32_t
)0x00000100è

	)

3180 

	#SCB_AIRCR_PRIGROUP2
 ((
ušt32_t
)0x00000200è

	)

3181 

	#SCB_AIRCR_PRIGROUP3
 ((
ušt32_t
)0x00000300è

	)

3182 

	#SCB_AIRCR_PRIGROUP4
 ((
ušt32_t
)0x00000400è

	)

3183 

	#SCB_AIRCR_PRIGROUP5
 ((
ušt32_t
)0x00000500è

	)

3184 

	#SCB_AIRCR_PRIGROUP6
 ((
ušt32_t
)0x00000600è

	)

3185 

	#SCB_AIRCR_PRIGROUP7
 ((
ušt32_t
)0x00000700è

	)

3187 

	#SCB_AIRCR_ENDIANESS
 ((
ušt32_t
)0x00008000è

	)

3188 

	#SCB_AIRCR_VECTKEY
 ((
ušt32_t
)0xFFFF0000è

	)

3191 

	#SCB_SCR_SLEEPONEXIT
 ((
ušt8_t
)0x02è

	)

3192 

	#SCB_SCR_SLEEPDEEP
 ((
ušt8_t
)0x04è

	)

3193 

	#SCB_SCR_SEVONPEND
 ((
ušt8_t
)0x10è

	)

3196 

	#SCB_CCR_NONBASETHRDENA
 ((
ušt16_t
)0x0001è

	)

3197 

	#SCB_CCR_USERSETMPEND
 ((
ušt16_t
)0x0002è

	)

3198 

	#SCB_CCR_UNALIGN_TRP
 ((
ušt16_t
)0x0008è

	)

3199 

	#SCB_CCR_DIV_0_TRP
 ((
ušt16_t
)0x0010è

	)

3200 

	#SCB_CCR_BFHFNMIGN
 ((
ušt16_t
)0x0100è

	)

3201 

	#SCB_CCR_STKALIGN
 ((
ušt16_t
)0x0200è

	)

3204 

	#SCB_SHPR_PRI_N
 ((
ušt32_t
)0x000000FFè

	)

3205 

	#SCB_SHPR_PRI_N1
 ((
ušt32_t
)0x0000FF00è

	)

3206 

	#SCB_SHPR_PRI_N2
 ((
ušt32_t
)0x00FF0000è

	)

3207 

	#SCB_SHPR_PRI_N3
 ((
ušt32_t
)0xFF000000è

	)

3210 

	#SCB_SHCSR_MEMFAULTACT
 ((
ušt32_t
)0x00000001è

	)

3211 

	#SCB_SHCSR_BUSFAULTACT
 ((
ušt32_t
)0x00000002è

	)

3212 

	#SCB_SHCSR_USGFAULTACT
 ((
ušt32_t
)0x00000008è

	)

3213 

	#SCB_SHCSR_SVCALLACT
 ((
ušt32_t
)0x00000080è

	)

3214 

	#SCB_SHCSR_MONITORACT
 ((
ušt32_t
)0x00000100è

	)

3215 

	#SCB_SHCSR_PENDSVACT
 ((
ušt32_t
)0x00000400è

	)

3216 

	#SCB_SHCSR_SYSTICKACT
 ((
ušt32_t
)0x00000800è

	)

3217 

	#SCB_SHCSR_USGFAULTPENDED
 ((
ušt32_t
)0x00001000è

	)

3218 

	#SCB_SHCSR_MEMFAULTPENDED
 ((
ušt32_t
)0x00002000è

	)

3219 

	#SCB_SHCSR_BUSFAULTPENDED
 ((
ušt32_t
)0x00004000è

	)

3220 

	#SCB_SHCSR_SVCALLPENDED
 ((
ušt32_t
)0x00008000è

	)

3221 

	#SCB_SHCSR_MEMFAULTENA
 ((
ušt32_t
)0x00010000è

	)

3222 

	#SCB_SHCSR_BUSFAULTENA
 ((
ušt32_t
)0x00020000è

	)

3223 

	#SCB_SHCSR_USGFAULTENA
 ((
ušt32_t
)0x00040000è

	)

3227 

	#SCB_CFSR_IACCVIOL
 ((
ušt32_t
)0x00000001è

	)

3228 

	#SCB_CFSR_DACCVIOL
 ((
ušt32_t
)0x00000002è

	)

3229 

	#SCB_CFSR_MUNSTKERR
 ((
ušt32_t
)0x00000008è

	)

3230 

	#SCB_CFSR_MSTKERR
 ((
ušt32_t
)0x00000010è

	)

3231 

	#SCB_CFSR_MMARVALID
 ((
ušt32_t
)0x00000080è

	)

3233 

	#SCB_CFSR_IBUSERR
 ((
ušt32_t
)0x00000100è

	)

3234 

	#SCB_CFSR_PRECISERR
 ((
ušt32_t
)0x00000200è

	)

3235 

	#SCB_CFSR_IMPRECISERR
 ((
ušt32_t
)0x00000400è

	)

3236 

	#SCB_CFSR_UNSTKERR
 ((
ušt32_t
)0x00000800è

	)

3237 

	#SCB_CFSR_STKERR
 ((
ušt32_t
)0x00001000è

	)

3238 

	#SCB_CFSR_BFARVALID
 ((
ušt32_t
)0x00008000è

	)

3240 

	#SCB_CFSR_UNDEFINSTR
 ((
ušt32_t
)0x00010000è

	)

3241 

	#SCB_CFSR_INVSTATE
 ((
ušt32_t
)0x00020000è

	)

3242 

	#SCB_CFSR_INVPC
 ((
ušt32_t
)0x00040000è

	)

3243 

	#SCB_CFSR_NOCP
 ((
ušt32_t
)0x00080000è

	)

3244 

	#SCB_CFSR_UNALIGNED
 ((
ušt32_t
)0x01000000è

	)

3245 

	#SCB_CFSR_DIVBYZERO
 ((
ušt32_t
)0x02000000è

	)

3248 

	#SCB_HFSR_VECTTBL
 ((
ušt32_t
)0x00000002è

	)

3249 

	#SCB_HFSR_FORCED
 ((
ušt32_t
)0x40000000è

	)

3250 

	#SCB_HFSR_DEBUGEVT
 ((
ušt32_t
)0x80000000è

	)

3253 

	#SCB_DFSR_HALTED
 ((
ušt8_t
)0x01è

	)

3254 

	#SCB_DFSR_BKPT
 ((
ušt8_t
)0x02è

	)

3255 

	#SCB_DFSR_DWTTRAP
 ((
ušt8_t
)0x04è

	)

3256 

	#SCB_DFSR_VCATCH
 ((
ušt8_t
)0x08è

	)

3257 

	#SCB_DFSR_EXTERNAL
 ((
ušt8_t
)0x10è

	)

3260 

	#SCB_MMFAR_ADDRESS
 ((
ušt32_t
)0xFFFFFFFFè

	)

3263 

	#SCB_BFAR_ADDRESS
 ((
ušt32_t
)0xFFFFFFFFè

	)

3266 

	#SCB_AFSR_IMPDEF
 ((
ušt32_t
)0xFFFFFFFFè

	)

3275 

	#EXTI_IMR_MR0
 ((
ušt32_t
)0x00000001è

	)

3276 

	#EXTI_IMR_MR1
 ((
ušt32_t
)0x00000002è

	)

3277 

	#EXTI_IMR_MR2
 ((
ušt32_t
)0x00000004è

	)

3278 

	#EXTI_IMR_MR3
 ((
ušt32_t
)0x00000008è

	)

3279 

	#EXTI_IMR_MR4
 ((
ušt32_t
)0x00000010è

	)

3280 

	#EXTI_IMR_MR5
 ((
ušt32_t
)0x00000020è

	)

3281 

	#EXTI_IMR_MR6
 ((
ušt32_t
)0x00000040è

	)

3282 

	#EXTI_IMR_MR7
 ((
ušt32_t
)0x00000080è

	)

3283 

	#EXTI_IMR_MR8
 ((
ušt32_t
)0x00000100è

	)

3284 

	#EXTI_IMR_MR9
 ((
ušt32_t
)0x00000200è

	)

3285 

	#EXTI_IMR_MR10
 ((
ušt32_t
)0x00000400è

	)

3286 

	#EXTI_IMR_MR11
 ((
ušt32_t
)0x00000800è

	)

3287 

	#EXTI_IMR_MR12
 ((
ušt32_t
)0x00001000è

	)

3288 

	#EXTI_IMR_MR13
 ((
ušt32_t
)0x00002000è

	)

3289 

	#EXTI_IMR_MR14
 ((
ušt32_t
)0x00004000è

	)

3290 

	#EXTI_IMR_MR15
 ((
ušt32_t
)0x00008000è

	)

3291 

	#EXTI_IMR_MR16
 ((
ušt32_t
)0x00010000è

	)

3292 

	#EXTI_IMR_MR17
 ((
ušt32_t
)0x00020000è

	)

3293 

	#EXTI_IMR_MR18
 ((
ušt32_t
)0x00040000è

	)

3294 

	#EXTI_IMR_MR19
 ((
ušt32_t
)0x00080000è

	)

3297 

	#EXTI_EMR_MR0
 ((
ušt32_t
)0x00000001è

	)

3298 

	#EXTI_EMR_MR1
 ((
ušt32_t
)0x00000002è

	)

3299 

	#EXTI_EMR_MR2
 ((
ušt32_t
)0x00000004è

	)

3300 

	#EXTI_EMR_MR3
 ((
ušt32_t
)0x00000008è

	)

3301 

	#EXTI_EMR_MR4
 ((
ušt32_t
)0x00000010è

	)

3302 

	#EXTI_EMR_MR5
 ((
ušt32_t
)0x00000020è

	)

3303 

	#EXTI_EMR_MR6
 ((
ušt32_t
)0x00000040è

	)

3304 

	#EXTI_EMR_MR7
 ((
ušt32_t
)0x00000080è

	)

3305 

	#EXTI_EMR_MR8
 ((
ušt32_t
)0x00000100è

	)

3306 

	#EXTI_EMR_MR9
 ((
ušt32_t
)0x00000200è

	)

3307 

	#EXTI_EMR_MR10
 ((
ušt32_t
)0x00000400è

	)

3308 

	#EXTI_EMR_MR11
 ((
ušt32_t
)0x00000800è

	)

3309 

	#EXTI_EMR_MR12
 ((
ušt32_t
)0x00001000è

	)

3310 

	#EXTI_EMR_MR13
 ((
ušt32_t
)0x00002000è

	)

3311 

	#EXTI_EMR_MR14
 ((
ušt32_t
)0x00004000è

	)

3312 

	#EXTI_EMR_MR15
 ((
ušt32_t
)0x00008000è

	)

3313 

	#EXTI_EMR_MR16
 ((
ušt32_t
)0x00010000è

	)

3314 

	#EXTI_EMR_MR17
 ((
ušt32_t
)0x00020000è

	)

3315 

	#EXTI_EMR_MR18
 ((
ušt32_t
)0x00040000è

	)

3316 

	#EXTI_EMR_MR19
 ((
ušt32_t
)0x00080000è

	)

3319 

	#EXTI_RTSR_TR0
 ((
ušt32_t
)0x00000001è

	)

3320 

	#EXTI_RTSR_TR1
 ((
ušt32_t
)0x00000002è

	)

3321 

	#EXTI_RTSR_TR2
 ((
ušt32_t
)0x00000004è

	)

3322 

	#EXTI_RTSR_TR3
 ((
ušt32_t
)0x00000008è

	)

3323 

	#EXTI_RTSR_TR4
 ((
ušt32_t
)0x00000010è

	)

3324 

	#EXTI_RTSR_TR5
 ((
ušt32_t
)0x00000020è

	)

3325 

	#EXTI_RTSR_TR6
 ((
ušt32_t
)0x00000040è

	)

3326 

	#EXTI_RTSR_TR7
 ((
ušt32_t
)0x00000080è

	)

3327 

	#EXTI_RTSR_TR8
 ((
ušt32_t
)0x00000100è

	)

3328 

	#EXTI_RTSR_TR9
 ((
ušt32_t
)0x00000200è

	)

3329 

	#EXTI_RTSR_TR10
 ((
ušt32_t
)0x00000400è

	)

3330 

	#EXTI_RTSR_TR11
 ((
ušt32_t
)0x00000800è

	)

3331 

	#EXTI_RTSR_TR12
 ((
ušt32_t
)0x00001000è

	)

3332 

	#EXTI_RTSR_TR13
 ((
ušt32_t
)0x00002000è

	)

3333 

	#EXTI_RTSR_TR14
 ((
ušt32_t
)0x00004000è

	)

3334 

	#EXTI_RTSR_TR15
 ((
ušt32_t
)0x00008000è

	)

3335 

	#EXTI_RTSR_TR16
 ((
ušt32_t
)0x00010000è

	)

3336 

	#EXTI_RTSR_TR17
 ((
ušt32_t
)0x00020000è

	)

3337 

	#EXTI_RTSR_TR18
 ((
ušt32_t
)0x00040000è

	)

3338 

	#EXTI_RTSR_TR19
 ((
ušt32_t
)0x00080000è

	)

3341 

	#EXTI_FTSR_TR0
 ((
ušt32_t
)0x00000001è

	)

3342 

	#EXTI_FTSR_TR1
 ((
ušt32_t
)0x00000002è

	)

3343 

	#EXTI_FTSR_TR2
 ((
ušt32_t
)0x00000004è

	)

3344 

	#EXTI_FTSR_TR3
 ((
ušt32_t
)0x00000008è

	)

3345 

	#EXTI_FTSR_TR4
 ((
ušt32_t
)0x00000010è

	)

3346 

	#EXTI_FTSR_TR5
 ((
ušt32_t
)0x00000020è

	)

3347 

	#EXTI_FTSR_TR6
 ((
ušt32_t
)0x00000040è

	)

3348 

	#EXTI_FTSR_TR7
 ((
ušt32_t
)0x00000080è

	)

3349 

	#EXTI_FTSR_TR8
 ((
ušt32_t
)0x00000100è

	)

3350 

	#EXTI_FTSR_TR9
 ((
ušt32_t
)0x00000200è

	)

3351 

	#EXTI_FTSR_TR10
 ((
ušt32_t
)0x00000400è

	)

3352 

	#EXTI_FTSR_TR11
 ((
ušt32_t
)0x00000800è

	)

3353 

	#EXTI_FTSR_TR12
 ((
ušt32_t
)0x00001000è

	)

3354 

	#EXTI_FTSR_TR13
 ((
ušt32_t
)0x00002000è

	)

3355 

	#EXTI_FTSR_TR14
 ((
ušt32_t
)0x00004000è

	)

3356 

	#EXTI_FTSR_TR15
 ((
ušt32_t
)0x00008000è

	)

3357 

	#EXTI_FTSR_TR16
 ((
ušt32_t
)0x00010000è

	)

3358 

	#EXTI_FTSR_TR17
 ((
ušt32_t
)0x00020000è

	)

3359 

	#EXTI_FTSR_TR18
 ((
ušt32_t
)0x00040000è

	)

3360 

	#EXTI_FTSR_TR19
 ((
ušt32_t
)0x00080000è

	)

3363 

	#EXTI_SWIER_SWIER0
 ((
ušt32_t
)0x00000001è

	)

3364 

	#EXTI_SWIER_SWIER1
 ((
ušt32_t
)0x00000002è

	)

3365 

	#EXTI_SWIER_SWIER2
 ((
ušt32_t
)0x00000004è

	)

3366 

	#EXTI_SWIER_SWIER3
 ((
ušt32_t
)0x00000008è

	)

3367 

	#EXTI_SWIER_SWIER4
 ((
ušt32_t
)0x00000010è

	)

3368 

	#EXTI_SWIER_SWIER5
 ((
ušt32_t
)0x00000020è

	)

3369 

	#EXTI_SWIER_SWIER6
 ((
ušt32_t
)0x00000040è

	)

3370 

	#EXTI_SWIER_SWIER7
 ((
ušt32_t
)0x00000080è

	)

3371 

	#EXTI_SWIER_SWIER8
 ((
ušt32_t
)0x00000100è

	)

3372 

	#EXTI_SWIER_SWIER9
 ((
ušt32_t
)0x00000200è

	)

3373 

	#EXTI_SWIER_SWIER10
 ((
ušt32_t
)0x00000400è

	)

3374 

	#EXTI_SWIER_SWIER11
 ((
ušt32_t
)0x00000800è

	)

3375 

	#EXTI_SWIER_SWIER12
 ((
ušt32_t
)0x00001000è

	)

3376 

	#EXTI_SWIER_SWIER13
 ((
ušt32_t
)0x00002000è

	)

3377 

	#EXTI_SWIER_SWIER14
 ((
ušt32_t
)0x00004000è

	)

3378 

	#EXTI_SWIER_SWIER15
 ((
ušt32_t
)0x00008000è

	)

3379 

	#EXTI_SWIER_SWIER16
 ((
ušt32_t
)0x00010000è

	)

3380 

	#EXTI_SWIER_SWIER17
 ((
ušt32_t
)0x00020000è

	)

3381 

	#EXTI_SWIER_SWIER18
 ((
ušt32_t
)0x00040000è

	)

3382 

	#EXTI_SWIER_SWIER19
 ((
ušt32_t
)0x00080000è

	)

3385 

	#EXTI_PR_PR0
 ((
ušt32_t
)0x00000001è

	)

3386 

	#EXTI_PR_PR1
 ((
ušt32_t
)0x00000002è

	)

3387 

	#EXTI_PR_PR2
 ((
ušt32_t
)0x00000004è

	)

3388 

	#EXTI_PR_PR3
 ((
ušt32_t
)0x00000008è

	)

3389 

	#EXTI_PR_PR4
 ((
ušt32_t
)0x00000010è

	)

3390 

	#EXTI_PR_PR5
 ((
ušt32_t
)0x00000020è

	)

3391 

	#EXTI_PR_PR6
 ((
ušt32_t
)0x00000040è

	)

3392 

	#EXTI_PR_PR7
 ((
ušt32_t
)0x00000080è

	)

3393 

	#EXTI_PR_PR8
 ((
ušt32_t
)0x00000100è

	)

3394 

	#EXTI_PR_PR9
 ((
ušt32_t
)0x00000200è

	)

3395 

	#EXTI_PR_PR10
 ((
ušt32_t
)0x00000400è

	)

3396 

	#EXTI_PR_PR11
 ((
ušt32_t
)0x00000800è

	)

3397 

	#EXTI_PR_PR12
 ((
ušt32_t
)0x00001000è

	)

3398 

	#EXTI_PR_PR13
 ((
ušt32_t
)0x00002000è

	)

3399 

	#EXTI_PR_PR14
 ((
ušt32_t
)0x00004000è

	)

3400 

	#EXTI_PR_PR15
 ((
ušt32_t
)0x00008000è

	)

3401 

	#EXTI_PR_PR16
 ((
ušt32_t
)0x00010000è

	)

3402 

	#EXTI_PR_PR17
 ((
ušt32_t
)0x00020000è

	)

3403 

	#EXTI_PR_PR18
 ((
ušt32_t
)0x00040000è

	)

3404 

	#EXTI_PR_PR19
 ((
ušt32_t
)0x00080000è

	)

3413 

	#DMA_ISR_GIF1
 ((
ušt32_t
)0x00000001è

	)

3414 

	#DMA_ISR_TCIF1
 ((
ušt32_t
)0x00000002è

	)

3415 

	#DMA_ISR_HTIF1
 ((
ušt32_t
)0x00000004è

	)

3416 

	#DMA_ISR_TEIF1
 ((
ušt32_t
)0x00000008è

	)

3417 

	#DMA_ISR_GIF2
 ((
ušt32_t
)0x00000010è

	)

3418 

	#DMA_ISR_TCIF2
 ((
ušt32_t
)0x00000020è

	)

3419 

	#DMA_ISR_HTIF2
 ((
ušt32_t
)0x00000040è

	)

3420 

	#DMA_ISR_TEIF2
 ((
ušt32_t
)0x00000080è

	)

3421 

	#DMA_ISR_GIF3
 ((
ušt32_t
)0x00000100è

	)

3422 

	#DMA_ISR_TCIF3
 ((
ušt32_t
)0x00000200è

	)

3423 

	#DMA_ISR_HTIF3
 ((
ušt32_t
)0x00000400è

	)

3424 

	#DMA_ISR_TEIF3
 ((
ušt32_t
)0x00000800è

	)

3425 

	#DMA_ISR_GIF4
 ((
ušt32_t
)0x00001000è

	)

3426 

	#DMA_ISR_TCIF4
 ((
ušt32_t
)0x00002000è

	)

3427 

	#DMA_ISR_HTIF4
 ((
ušt32_t
)0x00004000è

	)

3428 

	#DMA_ISR_TEIF4
 ((
ušt32_t
)0x00008000è

	)

3429 

	#DMA_ISR_GIF5
 ((
ušt32_t
)0x00010000è

	)

3430 

	#DMA_ISR_TCIF5
 ((
ušt32_t
)0x00020000è

	)

3431 

	#DMA_ISR_HTIF5
 ((
ušt32_t
)0x00040000è

	)

3432 

	#DMA_ISR_TEIF5
 ((
ušt32_t
)0x00080000è

	)

3433 

	#DMA_ISR_GIF6
 ((
ušt32_t
)0x00100000è

	)

3434 

	#DMA_ISR_TCIF6
 ((
ušt32_t
)0x00200000è

	)

3435 

	#DMA_ISR_HTIF6
 ((
ušt32_t
)0x00400000è

	)

3436 

	#DMA_ISR_TEIF6
 ((
ušt32_t
)0x00800000è

	)

3437 

	#DMA_ISR_GIF7
 ((
ušt32_t
)0x01000000è

	)

3438 

	#DMA_ISR_TCIF7
 ((
ušt32_t
)0x02000000è

	)

3439 

	#DMA_ISR_HTIF7
 ((
ušt32_t
)0x04000000è

	)

3440 

	#DMA_ISR_TEIF7
 ((
ušt32_t
)0x08000000è

	)

3443 

	#DMA_IFCR_CGIF1
 ((
ušt32_t
)0x00000001è

	)

3444 

	#DMA_IFCR_CTCIF1
 ((
ušt32_t
)0x00000002è

	)

3445 

	#DMA_IFCR_CHTIF1
 ((
ušt32_t
)0x00000004è

	)

3446 

	#DMA_IFCR_CTEIF1
 ((
ušt32_t
)0x00000008è

	)

3447 

	#DMA_IFCR_CGIF2
 ((
ušt32_t
)0x00000010è

	)

3448 

	#DMA_IFCR_CTCIF2
 ((
ušt32_t
)0x00000020è

	)

3449 

	#DMA_IFCR_CHTIF2
 ((
ušt32_t
)0x00000040è

	)

3450 

	#DMA_IFCR_CTEIF2
 ((
ušt32_t
)0x00000080è

	)

3451 

	#DMA_IFCR_CGIF3
 ((
ušt32_t
)0x00000100è

	)

3452 

	#DMA_IFCR_CTCIF3
 ((
ušt32_t
)0x00000200è

	)

3453 

	#DMA_IFCR_CHTIF3
 ((
ušt32_t
)0x00000400è

	)

3454 

	#DMA_IFCR_CTEIF3
 ((
ušt32_t
)0x00000800è

	)

3455 

	#DMA_IFCR_CGIF4
 ((
ušt32_t
)0x00001000è

	)

3456 

	#DMA_IFCR_CTCIF4
 ((
ušt32_t
)0x00002000è

	)

3457 

	#DMA_IFCR_CHTIF4
 ((
ušt32_t
)0x00004000è

	)

3458 

	#DMA_IFCR_CTEIF4
 ((
ušt32_t
)0x00008000è

	)

3459 

	#DMA_IFCR_CGIF5
 ((
ušt32_t
)0x00010000è

	)

3460 

	#DMA_IFCR_CTCIF5
 ((
ušt32_t
)0x00020000è

	)

3461 

	#DMA_IFCR_CHTIF5
 ((
ušt32_t
)0x00040000è

	)

3462 

	#DMA_IFCR_CTEIF5
 ((
ušt32_t
)0x00080000è

	)

3463 

	#DMA_IFCR_CGIF6
 ((
ušt32_t
)0x00100000è

	)

3464 

	#DMA_IFCR_CTCIF6
 ((
ušt32_t
)0x00200000è

	)

3465 

	#DMA_IFCR_CHTIF6
 ((
ušt32_t
)0x00400000è

	)

3466 

	#DMA_IFCR_CTEIF6
 ((
ušt32_t
)0x00800000è

	)

3467 

	#DMA_IFCR_CGIF7
 ((
ušt32_t
)0x01000000è

	)

3468 

	#DMA_IFCR_CTCIF7
 ((
ušt32_t
)0x02000000è

	)

3469 

	#DMA_IFCR_CHTIF7
 ((
ušt32_t
)0x04000000è

	)

3470 

	#DMA_IFCR_CTEIF7
 ((
ušt32_t
)0x08000000è

	)

3473 

	#DMA_CCR1_EN
 ((
ušt16_t
)0x0001è

	)

3474 

	#DMA_CCR1_TCIE
 ((
ušt16_t
)0x0002è

	)

3475 

	#DMA_CCR1_HTIE
 ((
ušt16_t
)0x0004è

	)

3476 

	#DMA_CCR1_TEIE
 ((
ušt16_t
)0x0008è

	)

3477 

	#DMA_CCR1_DIR
 ((
ušt16_t
)0x0010è

	)

3478 

	#DMA_CCR1_CIRC
 ((
ušt16_t
)0x0020è

	)

3479 

	#DMA_CCR1_PINC
 ((
ušt16_t
)0x0040è

	)

3480 

	#DMA_CCR1_MINC
 ((
ušt16_t
)0x0080è

	)

3482 

	#DMA_CCR1_PSIZE
 ((
ušt16_t
)0x0300è

	)

3483 

	#DMA_CCR1_PSIZE_0
 ((
ušt16_t
)0x0100è

	)

3484 

	#DMA_CCR1_PSIZE_1
 ((
ušt16_t
)0x0200è

	)

3486 

	#DMA_CCR1_MSIZE
 ((
ušt16_t
)0x0C00è

	)

3487 

	#DMA_CCR1_MSIZE_0
 ((
ušt16_t
)0x0400è

	)

3488 

	#DMA_CCR1_MSIZE_1
 ((
ušt16_t
)0x0800è

	)

3490 

	#DMA_CCR1_PL
 ((
ušt16_t
)0x3000è

	)

3491 

	#DMA_CCR1_PL_0
 ((
ušt16_t
)0x1000è

	)

3492 

	#DMA_CCR1_PL_1
 ((
ušt16_t
)0x2000è

	)

3494 

	#DMA_CCR1_MEM2MEM
 ((
ušt16_t
)0x4000è

	)

3497 

	#DMA_CCR2_EN
 ((
ušt16_t
)0x0001è

	)

3498 

	#DMA_CCR2_TCIE
 ((
ušt16_t
)0x0002è

	)

3499 

	#DMA_CCR2_HTIE
 ((
ušt16_t
)0x0004è

	)

3500 

	#DMA_CCR2_TEIE
 ((
ušt16_t
)0x0008è

	)

3501 

	#DMA_CCR2_DIR
 ((
ušt16_t
)0x0010è

	)

3502 

	#DMA_CCR2_CIRC
 ((
ušt16_t
)0x0020è

	)

3503 

	#DMA_CCR2_PINC
 ((
ušt16_t
)0x0040è

	)

3504 

	#DMA_CCR2_MINC
 ((
ušt16_t
)0x0080è

	)

3506 

	#DMA_CCR2_PSIZE
 ((
ušt16_t
)0x0300è

	)

3507 

	#DMA_CCR2_PSIZE_0
 ((
ušt16_t
)0x0100è

	)

3508 

	#DMA_CCR2_PSIZE_1
 ((
ušt16_t
)0x0200è

	)

3510 

	#DMA_CCR2_MSIZE
 ((
ušt16_t
)0x0C00è

	)

3511 

	#DMA_CCR2_MSIZE_0
 ((
ušt16_t
)0x0400è

	)

3512 

	#DMA_CCR2_MSIZE_1
 ((
ušt16_t
)0x0800è

	)

3514 

	#DMA_CCR2_PL
 ((
ušt16_t
)0x3000è

	)

3515 

	#DMA_CCR2_PL_0
 ((
ušt16_t
)0x1000è

	)

3516 

	#DMA_CCR2_PL_1
 ((
ušt16_t
)0x2000è

	)

3518 

	#DMA_CCR2_MEM2MEM
 ((
ušt16_t
)0x4000è

	)

3521 

	#DMA_CCR3_EN
 ((
ušt16_t
)0x0001è

	)

3522 

	#DMA_CCR3_TCIE
 ((
ušt16_t
)0x0002è

	)

3523 

	#DMA_CCR3_HTIE
 ((
ušt16_t
)0x0004è

	)

3524 

	#DMA_CCR3_TEIE
 ((
ušt16_t
)0x0008è

	)

3525 

	#DMA_CCR3_DIR
 ((
ušt16_t
)0x0010è

	)

3526 

	#DMA_CCR3_CIRC
 ((
ušt16_t
)0x0020è

	)

3527 

	#DMA_CCR3_PINC
 ((
ušt16_t
)0x0040è

	)

3528 

	#DMA_CCR3_MINC
 ((
ušt16_t
)0x0080è

	)

3530 

	#DMA_CCR3_PSIZE
 ((
ušt16_t
)0x0300è

	)

3531 

	#DMA_CCR3_PSIZE_0
 ((
ušt16_t
)0x0100è

	)

3532 

	#DMA_CCR3_PSIZE_1
 ((
ušt16_t
)0x0200è

	)

3534 

	#DMA_CCR3_MSIZE
 ((
ušt16_t
)0x0C00è

	)

3535 

	#DMA_CCR3_MSIZE_0
 ((
ušt16_t
)0x0400è

	)

3536 

	#DMA_CCR3_MSIZE_1
 ((
ušt16_t
)0x0800è

	)

3538 

	#DMA_CCR3_PL
 ((
ušt16_t
)0x3000è

	)

3539 

	#DMA_CCR3_PL_0
 ((
ušt16_t
)0x1000è

	)

3540 

	#DMA_CCR3_PL_1
 ((
ušt16_t
)0x2000è

	)

3542 

	#DMA_CCR3_MEM2MEM
 ((
ušt16_t
)0x4000è

	)

3545 

	#DMA_CCR4_EN
 ((
ušt16_t
)0x0001è

	)

3546 

	#DMA_CCR4_TCIE
 ((
ušt16_t
)0x0002è

	)

3547 

	#DMA_CCR4_HTIE
 ((
ušt16_t
)0x0004è

	)

3548 

	#DMA_CCR4_TEIE
 ((
ušt16_t
)0x0008è

	)

3549 

	#DMA_CCR4_DIR
 ((
ušt16_t
)0x0010è

	)

3550 

	#DMA_CCR4_CIRC
 ((
ušt16_t
)0x0020è

	)

3551 

	#DMA_CCR4_PINC
 ((
ušt16_t
)0x0040è

	)

3552 

	#DMA_CCR4_MINC
 ((
ušt16_t
)0x0080è

	)

3554 

	#DMA_CCR4_PSIZE
 ((
ušt16_t
)0x0300è

	)

3555 

	#DMA_CCR4_PSIZE_0
 ((
ušt16_t
)0x0100è

	)

3556 

	#DMA_CCR4_PSIZE_1
 ((
ušt16_t
)0x0200è

	)

3558 

	#DMA_CCR4_MSIZE
 ((
ušt16_t
)0x0C00è

	)

3559 

	#DMA_CCR4_MSIZE_0
 ((
ušt16_t
)0x0400è

	)

3560 

	#DMA_CCR4_MSIZE_1
 ((
ušt16_t
)0x0800è

	)

3562 

	#DMA_CCR4_PL
 ((
ušt16_t
)0x3000è

	)

3563 

	#DMA_CCR4_PL_0
 ((
ušt16_t
)0x1000è

	)

3564 

	#DMA_CCR4_PL_1
 ((
ušt16_t
)0x2000è

	)

3566 

	#DMA_CCR4_MEM2MEM
 ((
ušt16_t
)0x4000è

	)

3569 

	#DMA_CCR5_EN
 ((
ušt16_t
)0x0001è

	)

3570 

	#DMA_CCR5_TCIE
 ((
ušt16_t
)0x0002è

	)

3571 

	#DMA_CCR5_HTIE
 ((
ušt16_t
)0x0004è

	)

3572 

	#DMA_CCR5_TEIE
 ((
ušt16_t
)0x0008è

	)

3573 

	#DMA_CCR5_DIR
 ((
ušt16_t
)0x0010è

	)

3574 

	#DMA_CCR5_CIRC
 ((
ušt16_t
)0x0020è

	)

3575 

	#DMA_CCR5_PINC
 ((
ušt16_t
)0x0040è

	)

3576 

	#DMA_CCR5_MINC
 ((
ušt16_t
)0x0080è

	)

3578 

	#DMA_CCR5_PSIZE
 ((
ušt16_t
)0x0300è

	)

3579 

	#DMA_CCR5_PSIZE_0
 ((
ušt16_t
)0x0100è

	)

3580 

	#DMA_CCR5_PSIZE_1
 ((
ušt16_t
)0x0200è

	)

3582 

	#DMA_CCR5_MSIZE
 ((
ušt16_t
)0x0C00è

	)

3583 

	#DMA_CCR5_MSIZE_0
 ((
ušt16_t
)0x0400è

	)

3584 

	#DMA_CCR5_MSIZE_1
 ((
ušt16_t
)0x0800è

	)

3586 

	#DMA_CCR5_PL
 ((
ušt16_t
)0x3000è

	)

3587 

	#DMA_CCR5_PL_0
 ((
ušt16_t
)0x1000è

	)

3588 

	#DMA_CCR5_PL_1
 ((
ušt16_t
)0x2000è

	)

3590 

	#DMA_CCR5_MEM2MEM
 ((
ušt16_t
)0x4000è

	)

3593 

	#DMA_CCR6_EN
 ((
ušt16_t
)0x0001è

	)

3594 

	#DMA_CCR6_TCIE
 ((
ušt16_t
)0x0002è

	)

3595 

	#DMA_CCR6_HTIE
 ((
ušt16_t
)0x0004è

	)

3596 

	#DMA_CCR6_TEIE
 ((
ušt16_t
)0x0008è

	)

3597 

	#DMA_CCR6_DIR
 ((
ušt16_t
)0x0010è

	)

3598 

	#DMA_CCR6_CIRC
 ((
ušt16_t
)0x0020è

	)

3599 

	#DMA_CCR6_PINC
 ((
ušt16_t
)0x0040è

	)

3600 

	#DMA_CCR6_MINC
 ((
ušt16_t
)0x0080è

	)

3602 

	#DMA_CCR6_PSIZE
 ((
ušt16_t
)0x0300è

	)

3603 

	#DMA_CCR6_PSIZE_0
 ((
ušt16_t
)0x0100è

	)

3604 

	#DMA_CCR6_PSIZE_1
 ((
ušt16_t
)0x0200è

	)

3606 

	#DMA_CCR6_MSIZE
 ((
ušt16_t
)0x0C00è

	)

3607 

	#DMA_CCR6_MSIZE_0
 ((
ušt16_t
)0x0400è

	)

3608 

	#DMA_CCR6_MSIZE_1
 ((
ušt16_t
)0x0800è

	)

3610 

	#DMA_CCR6_PL
 ((
ušt16_t
)0x3000è

	)

3611 

	#DMA_CCR6_PL_0
 ((
ušt16_t
)0x1000è

	)

3612 

	#DMA_CCR6_PL_1
 ((
ušt16_t
)0x2000è

	)

3614 

	#DMA_CCR6_MEM2MEM
 ((
ušt16_t
)0x4000è

	)

3617 

	#DMA_CCR7_EN
 ((
ušt16_t
)0x0001è

	)

3618 

	#DMA_CCR7_TCIE
 ((
ušt16_t
)0x0002è

	)

3619 

	#DMA_CCR7_HTIE
 ((
ušt16_t
)0x0004è

	)

3620 

	#DMA_CCR7_TEIE
 ((
ušt16_t
)0x0008è

	)

3621 

	#DMA_CCR7_DIR
 ((
ušt16_t
)0x0010è

	)

3622 

	#DMA_CCR7_CIRC
 ((
ušt16_t
)0x0020è

	)

3623 

	#DMA_CCR7_PINC
 ((
ušt16_t
)0x0040è

	)

3624 

	#DMA_CCR7_MINC
 ((
ušt16_t
)0x0080è

	)

3626 

	#DMA_CCR7_PSIZE
 , ((
ušt16_t
)0x0300è

	)

3627 

	#DMA_CCR7_PSIZE_0
 ((
ušt16_t
)0x0100è

	)

3628 

	#DMA_CCR7_PSIZE_1
 ((
ušt16_t
)0x0200è

	)

3630 

	#DMA_CCR7_MSIZE
 ((
ušt16_t
)0x0C00è

	)

3631 

	#DMA_CCR7_MSIZE_0
 ((
ušt16_t
)0x0400è

	)

3632 

	#DMA_CCR7_MSIZE_1
 ((
ušt16_t
)0x0800è

	)

3634 

	#DMA_CCR7_PL
 ((
ušt16_t
)0x3000è

	)

3635 

	#DMA_CCR7_PL_0
 ((
ušt16_t
)0x1000è

	)

3636 

	#DMA_CCR7_PL_1
 ((
ušt16_t
)0x2000è

	)

3638 

	#DMA_CCR7_MEM2MEM
 ((
ušt16_t
)0x4000è

	)

3641 

	#DMA_CNDTR1_NDT
 ((
ušt16_t
)0xFFFFè

	)

3644 

	#DMA_CNDTR2_NDT
 ((
ušt16_t
)0xFFFFè

	)

3647 

	#DMA_CNDTR3_NDT
 ((
ušt16_t
)0xFFFFè

	)

3650 

	#DMA_CNDTR4_NDT
 ((
ušt16_t
)0xFFFFè

	)

3653 

	#DMA_CNDTR5_NDT
 ((
ušt16_t
)0xFFFFè

	)

3656 

	#DMA_CNDTR6_NDT
 ((
ušt16_t
)0xFFFFè

	)

3659 

	#DMA_CNDTR7_NDT
 ((
ušt16_t
)0xFFFFè

	)

3662 

	#DMA_CPAR1_PA
 ((
ušt32_t
)0xFFFFFFFFè

	)

3665 

	#DMA_CPAR2_PA
 ((
ušt32_t
)0xFFFFFFFFè

	)

3668 

	#DMA_CPAR3_PA
 ((
ušt32_t
)0xFFFFFFFFè

	)

3672 

	#DMA_CPAR4_PA
 ((
ušt32_t
)0xFFFFFFFFè

	)

3675 

	#DMA_CPAR5_PA
 ((
ušt32_t
)0xFFFFFFFFè

	)

3678 

	#DMA_CPAR6_PA
 ((
ušt32_t
)0xFFFFFFFFè

	)

3682 

	#DMA_CPAR7_PA
 ((
ušt32_t
)0xFFFFFFFFè

	)

3685 

	#DMA_CMAR1_MA
 ((
ušt32_t
)0xFFFFFFFFè

	)

3688 

	#DMA_CMAR2_MA
 ((
ušt32_t
)0xFFFFFFFFè

	)

3691 

	#DMA_CMAR3_MA
 ((
ušt32_t
)0xFFFFFFFFè

	)

3695 

	#DMA_CMAR4_MA
 ((
ušt32_t
)0xFFFFFFFFè

	)

3698 

	#DMA_CMAR5_MA
 ((
ušt32_t
)0xFFFFFFFFè

	)

3701 

	#DMA_CMAR6_MA
 ((
ušt32_t
)0xFFFFFFFFè

	)

3704 

	#DMA_CMAR7_MA
 ((
ušt32_t
)0xFFFFFFFFè

	)

3713 

	#ADC_SR_AWD
 ((
ušt8_t
)0x01è

	)

3714 

	#ADC_SR_EOC
 ((
ušt8_t
)0x02è

	)

3715 

	#ADC_SR_JEOC
 ((
ušt8_t
)0x04è

	)

3716 

	#ADC_SR_JSTRT
 ((
ušt8_t
)0x08è

	)

3717 

	#ADC_SR_STRT
 ((
ušt8_t
)0x10è

	)

3720 

	#ADC_CR1_AWDCH
 ((
ušt32_t
)0x0000001Fè

	)

3721 

	#ADC_CR1_AWDCH_0
 ((
ušt32_t
)0x00000001è

	)

3722 

	#ADC_CR1_AWDCH_1
 ((
ušt32_t
)0x00000002è

	)

3723 

	#ADC_CR1_AWDCH_2
 ((
ušt32_t
)0x00000004è

	)

3724 

	#ADC_CR1_AWDCH_3
 ((
ušt32_t
)0x00000008è

	)

3725 

	#ADC_CR1_AWDCH_4
 ((
ušt32_t
)0x00000010è

	)

3727 

	#ADC_CR1_EOCIE
 ((
ušt32_t
)0x00000020è

	)

3728 

	#ADC_CR1_AWDIE
 ((
ušt32_t
)0x00000040è

	)

3729 

	#ADC_CR1_JEOCIE
 ((
ušt32_t
)0x00000080è

	)

3730 

	#ADC_CR1_SCAN
 ((
ušt32_t
)0x00000100è

	)

3731 

	#ADC_CR1_AWDSGL
 ((
ušt32_t
)0x00000200è

	)

3732 

	#ADC_CR1_JAUTO
 ((
ušt32_t
)0x00000400è

	)

3733 

	#ADC_CR1_DISCEN
 ((
ušt32_t
)0x00000800è

	)

3734 

	#ADC_CR1_JDISCEN
 ((
ušt32_t
)0x00001000è

	)

3736 

	#ADC_CR1_DISCNUM
 ((
ušt32_t
)0x0000E000è

	)

3737 

	#ADC_CR1_DISCNUM_0
 ((
ušt32_t
)0x00002000è

	)

3738 

	#ADC_CR1_DISCNUM_1
 ((
ušt32_t
)0x00004000è

	)

3739 

	#ADC_CR1_DISCNUM_2
 ((
ušt32_t
)0x00008000è

	)

3741 

	#ADC_CR1_DUALMOD
 ((
ušt32_t
)0x000F0000è

	)

3742 

	#ADC_CR1_DUALMOD_0
 ((
ušt32_t
)0x00010000è

	)

3743 

	#ADC_CR1_DUALMOD_1
 ((
ušt32_t
)0x00020000è

	)

3744 

	#ADC_CR1_DUALMOD_2
 ((
ušt32_t
)0x00040000è

	)

3745 

	#ADC_CR1_DUALMOD_3
 ((
ušt32_t
)0x00080000è

	)

3747 

	#ADC_CR1_JAWDEN
 ((
ušt32_t
)0x00400000è

	)

3748 

	#ADC_CR1_AWDEN
 ((
ušt32_t
)0x00800000è

	)

3752 

	#ADC_CR2_ADON
 ((
ušt32_t
)0x00000001è

	)

3753 

	#ADC_CR2_CONT
 ((
ušt32_t
)0x00000002è

	)

3754 

	#ADC_CR2_CAL
 ((
ušt32_t
)0x00000004è

	)

3755 

	#ADC_CR2_RSTCAL
 ((
ušt32_t
)0x00000008è

	)

3756 

	#ADC_CR2_DMA
 ((
ušt32_t
)0x00000100è

	)

3757 

	#ADC_CR2_ALIGN
 ((
ušt32_t
)0x00000800è

	)

3759 

	#ADC_CR2_JEXTSEL
 ((
ušt32_t
)0x00007000è

	)

3760 

	#ADC_CR2_JEXTSEL_0
 ((
ušt32_t
)0x00001000è

	)

3761 

	#ADC_CR2_JEXTSEL_1
 ((
ušt32_t
)0x00002000è

	)

3762 

	#ADC_CR2_JEXTSEL_2
 ((
ušt32_t
)0x00004000è

	)

3764 

	#ADC_CR2_JEXTTRIG
 ((
ušt32_t
)0x00008000è

	)

3766 

	#ADC_CR2_EXTSEL
 ((
ušt32_t
)0x000E0000è

	)

3767 

	#ADC_CR2_EXTSEL_0
 ((
ušt32_t
)0x00020000è

	)

3768 

	#ADC_CR2_EXTSEL_1
 ((
ušt32_t
)0x00040000è

	)

3769 

	#ADC_CR2_EXTSEL_2
 ((
ušt32_t
)0x00080000è

	)

3771 

	#ADC_CR2_EXTTRIG
 ((
ušt32_t
)0x00100000è

	)

3772 

	#ADC_CR2_JSWSTART
 ((
ušt32_t
)0x00200000è

	)

3773 

	#ADC_CR2_SWSTART
 ((
ušt32_t
)0x00400000è

	)

3774 

	#ADC_CR2_TSVREFE
 ((
ušt32_t
)0x00800000è

	)

3777 

	#ADC_SMPR1_SMP10
 ((
ušt32_t
)0x00000007è

	)

3778 

	#ADC_SMPR1_SMP10_0
 ((
ušt32_t
)0x00000001è

	)

3779 

	#ADC_SMPR1_SMP10_1
 ((
ušt32_t
)0x00000002è

	)

3780 

	#ADC_SMPR1_SMP10_2
 ((
ušt32_t
)0x00000004è

	)

3782 

	#ADC_SMPR1_SMP11
 ((
ušt32_t
)0x00000038è

	)

3783 

	#ADC_SMPR1_SMP11_0
 ((
ušt32_t
)0x00000008è

	)

3784 

	#ADC_SMPR1_SMP11_1
 ((
ušt32_t
)0x00000010è

	)

3785 

	#ADC_SMPR1_SMP11_2
 ((
ušt32_t
)0x00000020è

	)

3787 

	#ADC_SMPR1_SMP12
 ((
ušt32_t
)0x000001C0è

	)

3788 

	#ADC_SMPR1_SMP12_0
 ((
ušt32_t
)0x00000040è

	)

3789 

	#ADC_SMPR1_SMP12_1
 ((
ušt32_t
)0x00000080è

	)

3790 

	#ADC_SMPR1_SMP12_2
 ((
ušt32_t
)0x00000100è

	)

3792 

	#ADC_SMPR1_SMP13
 ((
ušt32_t
)0x00000E00è

	)

3793 

	#ADC_SMPR1_SMP13_0
 ((
ušt32_t
)0x00000200è

	)

3794 

	#ADC_SMPR1_SMP13_1
 ((
ušt32_t
)0x00000400è

	)

3795 

	#ADC_SMPR1_SMP13_2
 ((
ušt32_t
)0x00000800è

	)

3797 

	#ADC_SMPR1_SMP14
 ((
ušt32_t
)0x00007000è

	)

3798 

	#ADC_SMPR1_SMP14_0
 ((
ušt32_t
)0x00001000è

	)

3799 

	#ADC_SMPR1_SMP14_1
 ((
ušt32_t
)0x00002000è

	)

3800 

	#ADC_SMPR1_SMP14_2
 ((
ušt32_t
)0x00004000è

	)

3802 

	#ADC_SMPR1_SMP15
 ((
ušt32_t
)0x00038000è

	)

3803 

	#ADC_SMPR1_SMP15_0
 ((
ušt32_t
)0x00008000è

	)

3804 

	#ADC_SMPR1_SMP15_1
 ((
ušt32_t
)0x00010000è

	)

3805 

	#ADC_SMPR1_SMP15_2
 ((
ušt32_t
)0x00020000è

	)

3807 

	#ADC_SMPR1_SMP16
 ((
ušt32_t
)0x001C0000è

	)

3808 

	#ADC_SMPR1_SMP16_0
 ((
ušt32_t
)0x00040000è

	)

3809 

	#ADC_SMPR1_SMP16_1
 ((
ušt32_t
)0x00080000è

	)

3810 

	#ADC_SMPR1_SMP16_2
 ((
ušt32_t
)0x00100000è

	)

3812 

	#ADC_SMPR1_SMP17
 ((
ušt32_t
)0x00E00000è

	)

3813 

	#ADC_SMPR1_SMP17_0
 ((
ušt32_t
)0x00200000è

	)

3814 

	#ADC_SMPR1_SMP17_1
 ((
ušt32_t
)0x00400000è

	)

3815 

	#ADC_SMPR1_SMP17_2
 ((
ušt32_t
)0x00800000è

	)

3818 

	#ADC_SMPR2_SMP0
 ((
ušt32_t
)0x00000007è

	)

3819 

	#ADC_SMPR2_SMP0_0
 ((
ušt32_t
)0x00000001è

	)

3820 

	#ADC_SMPR2_SMP0_1
 ((
ušt32_t
)0x00000002è

	)

3821 

	#ADC_SMPR2_SMP0_2
 ((
ušt32_t
)0x00000004è

	)

3823 

	#ADC_SMPR2_SMP1
 ((
ušt32_t
)0x00000038è

	)

3824 

	#ADC_SMPR2_SMP1_0
 ((
ušt32_t
)0x00000008è

	)

3825 

	#ADC_SMPR2_SMP1_1
 ((
ušt32_t
)0x00000010è

	)

3826 

	#ADC_SMPR2_SMP1_2
 ((
ušt32_t
)0x00000020è

	)

3828 

	#ADC_SMPR2_SMP2
 ((
ušt32_t
)0x000001C0è

	)

3829 

	#ADC_SMPR2_SMP2_0
 ((
ušt32_t
)0x00000040è

	)

3830 

	#ADC_SMPR2_SMP2_1
 ((
ušt32_t
)0x00000080è

	)

3831 

	#ADC_SMPR2_SMP2_2
 ((
ušt32_t
)0x00000100è

	)

3833 

	#ADC_SMPR2_SMP3
 ((
ušt32_t
)0x00000E00è

	)

3834 

	#ADC_SMPR2_SMP3_0
 ((
ušt32_t
)0x00000200è

	)

3835 

	#ADC_SMPR2_SMP3_1
 ((
ušt32_t
)0x00000400è

	)

3836 

	#ADC_SMPR2_SMP3_2
 ((
ušt32_t
)0x00000800è

	)

3838 

	#ADC_SMPR2_SMP4
 ((
ušt32_t
)0x00007000è

	)

3839 

	#ADC_SMPR2_SMP4_0
 ((
ušt32_t
)0x00001000è

	)

3840 

	#ADC_SMPR2_SMP4_1
 ((
ušt32_t
)0x00002000è

	)

3841 

	#ADC_SMPR2_SMP4_2
 ((
ušt32_t
)0x00004000è

	)

3843 

	#ADC_SMPR2_SMP5
 ((
ušt32_t
)0x00038000è

	)

3844 

	#ADC_SMPR2_SMP5_0
 ((
ušt32_t
)0x00008000è

	)

3845 

	#ADC_SMPR2_SMP5_1
 ((
ušt32_t
)0x00010000è

	)

3846 

	#ADC_SMPR2_SMP5_2
 ((
ušt32_t
)0x00020000è

	)

3848 

	#ADC_SMPR2_SMP6
 ((
ušt32_t
)0x001C0000è

	)

3849 

	#ADC_SMPR2_SMP6_0
 ((
ušt32_t
)0x00040000è

	)

3850 

	#ADC_SMPR2_SMP6_1
 ((
ušt32_t
)0x00080000è

	)

3851 

	#ADC_SMPR2_SMP6_2
 ((
ušt32_t
)0x00100000è

	)

3853 

	#ADC_SMPR2_SMP7
 ((
ušt32_t
)0x00E00000è

	)

3854 

	#ADC_SMPR2_SMP7_0
 ((
ušt32_t
)0x00200000è

	)

3855 

	#ADC_SMPR2_SMP7_1
 ((
ušt32_t
)0x00400000è

	)

3856 

	#ADC_SMPR2_SMP7_2
 ((
ušt32_t
)0x00800000è

	)

3858 

	#ADC_SMPR2_SMP8
 ((
ušt32_t
)0x07000000è

	)

3859 

	#ADC_SMPR2_SMP8_0
 ((
ušt32_t
)0x01000000è

	)

3860 

	#ADC_SMPR2_SMP8_1
 ((
ušt32_t
)0x02000000è

	)

3861 

	#ADC_SMPR2_SMP8_2
 ((
ušt32_t
)0x04000000è

	)

3863 

	#ADC_SMPR2_SMP9
 ((
ušt32_t
)0x38000000è

	)

3864 

	#ADC_SMPR2_SMP9_0
 ((
ušt32_t
)0x08000000è

	)

3865 

	#ADC_SMPR2_SMP9_1
 ((
ušt32_t
)0x10000000è

	)

3866 

	#ADC_SMPR2_SMP9_2
 ((
ušt32_t
)0x20000000è

	)

3869 

	#ADC_JOFR1_JOFFSET1
 ((
ušt16_t
)0x0FFFè

	)

3872 

	#ADC_JOFR2_JOFFSET2
 ((
ušt16_t
)0x0FFFè

	)

3875 

	#ADC_JOFR3_JOFFSET3
 ((
ušt16_t
)0x0FFFè

	)

3878 

	#ADC_JOFR4_JOFFSET4
 ((
ušt16_t
)0x0FFFè

	)

3881 

	#ADC_HTR_HT
 ((
ušt16_t
)0x0FFFè

	)

3884 

	#ADC_LTR_LT
 ((
ušt16_t
)0x0FFFè

	)

3887 

	#ADC_SQR1_SQ13
 ((
ušt32_t
)0x0000001Fè

	)

3888 

	#ADC_SQR1_SQ13_0
 ((
ušt32_t
)0x00000001è

	)

3889 

	#ADC_SQR1_SQ13_1
 ((
ušt32_t
)0x00000002è

	)

3890 

	#ADC_SQR1_SQ13_2
 ((
ušt32_t
)0x00000004è

	)

3891 

	#ADC_SQR1_SQ13_3
 ((
ušt32_t
)0x00000008è

	)

3892 

	#ADC_SQR1_SQ13_4
 ((
ušt32_t
)0x00000010è

	)

3894 

	#ADC_SQR1_SQ14
 ((
ušt32_t
)0x000003E0è

	)

3895 

	#ADC_SQR1_SQ14_0
 ((
ušt32_t
)0x00000020è

	)

3896 

	#ADC_SQR1_SQ14_1
 ((
ušt32_t
)0x00000040è

	)

3897 

	#ADC_SQR1_SQ14_2
 ((
ušt32_t
)0x00000080è

	)

3898 

	#ADC_SQR1_SQ14_3
 ((
ušt32_t
)0x00000100è

	)

3899 

	#ADC_SQR1_SQ14_4
 ((
ušt32_t
)0x00000200è

	)

3901 

	#ADC_SQR1_SQ15
 ((
ušt32_t
)0x00007C00è

	)

3902 

	#ADC_SQR1_SQ15_0
 ((
ušt32_t
)0x00000400è

	)

3903 

	#ADC_SQR1_SQ15_1
 ((
ušt32_t
)0x00000800è

	)

3904 

	#ADC_SQR1_SQ15_2
 ((
ušt32_t
)0x00001000è

	)

3905 

	#ADC_SQR1_SQ15_3
 ((
ušt32_t
)0x00002000è

	)

3906 

	#ADC_SQR1_SQ15_4
 ((
ušt32_t
)0x00004000è

	)

3908 

	#ADC_SQR1_SQ16
 ((
ušt32_t
)0x000F8000è

	)

3909 

	#ADC_SQR1_SQ16_0
 ((
ušt32_t
)0x00008000è

	)

3910 

	#ADC_SQR1_SQ16_1
 ((
ušt32_t
)0x00010000è

	)

3911 

	#ADC_SQR1_SQ16_2
 ((
ušt32_t
)0x00020000è

	)

3912 

	#ADC_SQR1_SQ16_3
 ((
ušt32_t
)0x00040000è

	)

3913 

	#ADC_SQR1_SQ16_4
 ((
ušt32_t
)0x00080000è

	)

3915 

	#ADC_SQR1_L
 ((
ušt32_t
)0x00F00000è

	)

3916 

	#ADC_SQR1_L_0
 ((
ušt32_t
)0x00100000è

	)

3917 

	#ADC_SQR1_L_1
 ((
ušt32_t
)0x00200000è

	)

3918 

	#ADC_SQR1_L_2
 ((
ušt32_t
)0x00400000è

	)

3919 

	#ADC_SQR1_L_3
 ((
ušt32_t
)0x00800000è

	)

3922 

	#ADC_SQR2_SQ7
 ((
ušt32_t
)0x0000001Fè

	)

3923 

	#ADC_SQR2_SQ7_0
 ((
ušt32_t
)0x00000001è

	)

3924 

	#ADC_SQR2_SQ7_1
 ((
ušt32_t
)0x00000002è

	)

3925 

	#ADC_SQR2_SQ7_2
 ((
ušt32_t
)0x00000004è

	)

3926 

	#ADC_SQR2_SQ7_3
 ((
ušt32_t
)0x00000008è

	)

3927 

	#ADC_SQR2_SQ7_4
 ((
ušt32_t
)0x00000010è

	)

3929 

	#ADC_SQR2_SQ8
 ((
ušt32_t
)0x000003E0è

	)

3930 

	#ADC_SQR2_SQ8_0
 ((
ušt32_t
)0x00000020è

	)

3931 

	#ADC_SQR2_SQ8_1
 ((
ušt32_t
)0x00000040è

	)

3932 

	#ADC_SQR2_SQ8_2
 ((
ušt32_t
)0x00000080è

	)

3933 

	#ADC_SQR2_SQ8_3
 ((
ušt32_t
)0x00000100è

	)

3934 

	#ADC_SQR2_SQ8_4
 ((
ušt32_t
)0x00000200è

	)

3936 

	#ADC_SQR2_SQ9
 ((
ušt32_t
)0x00007C00è

	)

3937 

	#ADC_SQR2_SQ9_0
 ((
ušt32_t
)0x00000400è

	)

3938 

	#ADC_SQR2_SQ9_1
 ((
ušt32_t
)0x00000800è

	)

3939 

	#ADC_SQR2_SQ9_2
 ((
ušt32_t
)0x00001000è

	)

3940 

	#ADC_SQR2_SQ9_3
 ((
ušt32_t
)0x00002000è

	)

3941 

	#ADC_SQR2_SQ9_4
 ((
ušt32_t
)0x00004000è

	)

3943 

	#ADC_SQR2_SQ10
 ((
ušt32_t
)0x000F8000è

	)

3944 

	#ADC_SQR2_SQ10_0
 ((
ušt32_t
)0x00008000è

	)

3945 

	#ADC_SQR2_SQ10_1
 ((
ušt32_t
)0x00010000è

	)

3946 

	#ADC_SQR2_SQ10_2
 ((
ušt32_t
)0x00020000è

	)

3947 

	#ADC_SQR2_SQ10_3
 ((
ušt32_t
)0x00040000è

	)

3948 

	#ADC_SQR2_SQ10_4
 ((
ušt32_t
)0x00080000è

	)

3950 

	#ADC_SQR2_SQ11
 ((
ušt32_t
)0x01F00000è

	)

3951 

	#ADC_SQR2_SQ11_0
 ((
ušt32_t
)0x00100000è

	)

3952 

	#ADC_SQR2_SQ11_1
 ((
ušt32_t
)0x00200000è

	)

3953 

	#ADC_SQR2_SQ11_2
 ((
ušt32_t
)0x00400000è

	)

3954 

	#ADC_SQR2_SQ11_3
 ((
ušt32_t
)0x00800000è

	)

3955 

	#ADC_SQR2_SQ11_4
 ((
ušt32_t
)0x01000000è

	)

3957 

	#ADC_SQR2_SQ12
 ((
ušt32_t
)0x3E000000è

	)

3958 

	#ADC_SQR2_SQ12_0
 ((
ušt32_t
)0x02000000è

	)

3959 

	#ADC_SQR2_SQ12_1
 ((
ušt32_t
)0x04000000è

	)

3960 

	#ADC_SQR2_SQ12_2
 ((
ušt32_t
)0x08000000è

	)

3961 

	#ADC_SQR2_SQ12_3
 ((
ušt32_t
)0x10000000è

	)

3962 

	#ADC_SQR2_SQ12_4
 ((
ušt32_t
)0x20000000è

	)

3965 

	#ADC_SQR3_SQ1
 ((
ušt32_t
)0x0000001Fè

	)

3966 

	#ADC_SQR3_SQ1_0
 ((
ušt32_t
)0x00000001è

	)

3967 

	#ADC_SQR3_SQ1_1
 ((
ušt32_t
)0x00000002è

	)

3968 

	#ADC_SQR3_SQ1_2
 ((
ušt32_t
)0x00000004è

	)

3969 

	#ADC_SQR3_SQ1_3
 ((
ušt32_t
)0x00000008è

	)

3970 

	#ADC_SQR3_SQ1_4
 ((
ušt32_t
)0x00000010è

	)

3972 

	#ADC_SQR3_SQ2
 ((
ušt32_t
)0x000003E0è

	)

3973 

	#ADC_SQR3_SQ2_0
 ((
ušt32_t
)0x00000020è

	)

3974 

	#ADC_SQR3_SQ2_1
 ((
ušt32_t
)0x00000040è

	)

3975 

	#ADC_SQR3_SQ2_2
 ((
ušt32_t
)0x00000080è

	)

3976 

	#ADC_SQR3_SQ2_3
 ((
ušt32_t
)0x00000100è

	)

3977 

	#ADC_SQR3_SQ2_4
 ((
ušt32_t
)0x00000200è

	)

3979 

	#ADC_SQR3_SQ3
 ((
ušt32_t
)0x00007C00è

	)

3980 

	#ADC_SQR3_SQ3_0
 ((
ušt32_t
)0x00000400è

	)

3981 

	#ADC_SQR3_SQ3_1
 ((
ušt32_t
)0x00000800è

	)

3982 

	#ADC_SQR3_SQ3_2
 ((
ušt32_t
)0x00001000è

	)

3983 

	#ADC_SQR3_SQ3_3
 ((
ušt32_t
)0x00002000è

	)

3984 

	#ADC_SQR3_SQ3_4
 ((
ušt32_t
)0x00004000è

	)

3986 

	#ADC_SQR3_SQ4
 ((
ušt32_t
)0x000F8000è

	)

3987 

	#ADC_SQR3_SQ4_0
 ((
ušt32_t
)0x00008000è

	)

3988 

	#ADC_SQR3_SQ4_1
 ((
ušt32_t
)0x00010000è

	)

3989 

	#ADC_SQR3_SQ4_2
 ((
ušt32_t
)0x00020000è

	)

3990 

	#ADC_SQR3_SQ4_3
 ((
ušt32_t
)0x00040000è

	)

3991 

	#ADC_SQR3_SQ4_4
 ((
ušt32_t
)0x00080000è

	)

3993 

	#ADC_SQR3_SQ5
 ((
ušt32_t
)0x01F00000è

	)

3994 

	#ADC_SQR3_SQ5_0
 ((
ušt32_t
)0x00100000è

	)

3995 

	#ADC_SQR3_SQ5_1
 ((
ušt32_t
)0x00200000è

	)

3996 

	#ADC_SQR3_SQ5_2
 ((
ušt32_t
)0x00400000è

	)

3997 

	#ADC_SQR3_SQ5_3
 ((
ušt32_t
)0x00800000è

	)

3998 

	#ADC_SQR3_SQ5_4
 ((
ušt32_t
)0x01000000è

	)

4000 

	#ADC_SQR3_SQ6
 ((
ušt32_t
)0x3E000000è

	)

4001 

	#ADC_SQR3_SQ6_0
 ((
ušt32_t
)0x02000000è

	)

4002 

	#ADC_SQR3_SQ6_1
 ((
ušt32_t
)0x04000000è

	)

4003 

	#ADC_SQR3_SQ6_2
 ((
ušt32_t
)0x08000000è

	)

4004 

	#ADC_SQR3_SQ6_3
 ((
ušt32_t
)0x10000000è

	)

4005 

	#ADC_SQR3_SQ6_4
 ((
ušt32_t
)0x20000000è

	)

4008 

	#ADC_JSQR_JSQ1
 ((
ušt32_t
)0x0000001Fè

	)

4009 

	#ADC_JSQR_JSQ1_0
 ((
ušt32_t
)0x00000001è

	)

4010 

	#ADC_JSQR_JSQ1_1
 ((
ušt32_t
)0x00000002è

	)

4011 

	#ADC_JSQR_JSQ1_2
 ((
ušt32_t
)0x00000004è

	)

4012 

	#ADC_JSQR_JSQ1_3
 ((
ušt32_t
)0x00000008è

	)

4013 

	#ADC_JSQR_JSQ1_4
 ((
ušt32_t
)0x00000010è

	)

4015 

	#ADC_JSQR_JSQ2
 ((
ušt32_t
)0x000003E0è

	)

4016 

	#ADC_JSQR_JSQ2_0
 ((
ušt32_t
)0x00000020è

	)

4017 

	#ADC_JSQR_JSQ2_1
 ((
ušt32_t
)0x00000040è

	)

4018 

	#ADC_JSQR_JSQ2_2
 ((
ušt32_t
)0x00000080è

	)

4019 

	#ADC_JSQR_JSQ2_3
 ((
ušt32_t
)0x00000100è

	)

4020 

	#ADC_JSQR_JSQ2_4
 ((
ušt32_t
)0x00000200è

	)

4022 

	#ADC_JSQR_JSQ3
 ((
ušt32_t
)0x00007C00è

	)

4023 

	#ADC_JSQR_JSQ3_0
 ((
ušt32_t
)0x00000400è

	)

4024 

	#ADC_JSQR_JSQ3_1
 ((
ušt32_t
)0x00000800è

	)

4025 

	#ADC_JSQR_JSQ3_2
 ((
ušt32_t
)0x00001000è

	)

4026 

	#ADC_JSQR_JSQ3_3
 ((
ušt32_t
)0x00002000è

	)

4027 

	#ADC_JSQR_JSQ3_4
 ((
ušt32_t
)0x00004000è

	)

4029 

	#ADC_JSQR_JSQ4
 ((
ušt32_t
)0x000F8000è

	)

4030 

	#ADC_JSQR_JSQ4_0
 ((
ušt32_t
)0x00008000è

	)

4031 

	#ADC_JSQR_JSQ4_1
 ((
ušt32_t
)0x00010000è

	)

4032 

	#ADC_JSQR_JSQ4_2
 ((
ušt32_t
)0x00020000è

	)

4033 

	#ADC_JSQR_JSQ4_3
 ((
ušt32_t
)0x00040000è

	)

4034 

	#ADC_JSQR_JSQ4_4
 ((
ušt32_t
)0x00080000è

	)

4036 

	#ADC_JSQR_JL
 ((
ušt32_t
)0x00300000è

	)

4037 

	#ADC_JSQR_JL_0
 ((
ušt32_t
)0x00100000è

	)

4038 

	#ADC_JSQR_JL_1
 ((
ušt32_t
)0x00200000è

	)

4041 

	#ADC_JDR1_JDATA
 ((
ušt16_t
)0xFFFFè

	)

4044 

	#ADC_JDR2_JDATA
 ((
ušt16_t
)0xFFFFè

	)

4047 

	#ADC_JDR3_JDATA
 ((
ušt16_t
)0xFFFFè

	)

4050 

	#ADC_JDR4_JDATA
 ((
ušt16_t
)0xFFFFè

	)

4053 

	#ADC_DR_DATA
 ((
ušt32_t
)0x0000FFFFè

	)

4054 

	#ADC_DR_ADC2DATA
 ((
ušt32_t
)0xFFFF0000è

	)

4063 

	#DAC_CR_EN1
 ((
ušt32_t
)0x00000001è

	)

4064 

	#DAC_CR_BOFF1
 ((
ušt32_t
)0x00000002è

	)

4065 

	#DAC_CR_TEN1
 ((
ušt32_t
)0x00000004è

	)

4067 

	#DAC_CR_TSEL1
 ((
ušt32_t
)0x00000038è

	)

4068 

	#DAC_CR_TSEL1_0
 ((
ušt32_t
)0x00000008è

	)

4069 

	#DAC_CR_TSEL1_1
 ((
ušt32_t
)0x00000010è

	)

4070 

	#DAC_CR_TSEL1_2
 ((
ušt32_t
)0x00000020è

	)

4072 

	#DAC_CR_WAVE1
 ((
ušt32_t
)0x000000C0è

	)

4073 

	#DAC_CR_WAVE1_0
 ((
ušt32_t
)0x00000040è

	)

4074 

	#DAC_CR_WAVE1_1
 ((
ušt32_t
)0x00000080è

	)

4076 

	#DAC_CR_MAMP1
 ((
ušt32_t
)0x00000F00è

	)

4077 

	#DAC_CR_MAMP1_0
 ((
ušt32_t
)0x00000100è

	)

4078 

	#DAC_CR_MAMP1_1
 ((
ušt32_t
)0x00000200è

	)

4079 

	#DAC_CR_MAMP1_2
 ((
ušt32_t
)0x00000400è

	)

4080 

	#DAC_CR_MAMP1_3
 ((
ušt32_t
)0x00000800è

	)

4082 

	#DAC_CR_DMAEN1
 ((
ušt32_t
)0x00001000è

	)

4083 

	#DAC_CR_EN2
 ((
ušt32_t
)0x00010000è

	)

4084 

	#DAC_CR_BOFF2
 ((
ušt32_t
)0x00020000è

	)

4085 

	#DAC_CR_TEN2
 ((
ušt32_t
)0x00040000è

	)

4087 

	#DAC_CR_TSEL2
 ((
ušt32_t
)0x00380000è

	)

4088 

	#DAC_CR_TSEL2_0
 ((
ušt32_t
)0x00080000è

	)

4089 

	#DAC_CR_TSEL2_1
 ((
ušt32_t
)0x00100000è

	)

4090 

	#DAC_CR_TSEL2_2
 ((
ušt32_t
)0x00200000è

	)

4092 

	#DAC_CR_WAVE2
 ((
ušt32_t
)0x00C00000è

	)

4093 

	#DAC_CR_WAVE2_0
 ((
ušt32_t
)0x00400000è

	)

4094 

	#DAC_CR_WAVE2_1
 ((
ušt32_t
)0x00800000è

	)

4096 

	#DAC_CR_MAMP2
 ((
ušt32_t
)0x0F000000è

	)

4097 

	#DAC_CR_MAMP2_0
 ((
ušt32_t
)0x01000000è

	)

4098 

	#DAC_CR_MAMP2_1
 ((
ušt32_t
)0x02000000è

	)

4099 

	#DAC_CR_MAMP2_2
 ((
ušt32_t
)0x04000000è

	)

4100 

	#DAC_CR_MAMP2_3
 ((
ušt32_t
)0x08000000è

	)

4102 

	#DAC_CR_DMAEN2
 ((
ušt32_t
)0x10000000è

	)

4104 #ià
defšed
 (
STM32F10X_LD_VL
è|| defšed (
STM32F10X_MD_VL
è|| defšed (
STM32F10X_HD_VL
)

4105 

	#DAC_CR_DMAUDRIE1
 ((
ušt32_t
)0x00002000è

	)

4106 

	#DAC_CR_DMAUDRIE2
 ((
ušt32_t
)0x20000000è

	)

4110 

	#DAC_SWTRIGR_SWTRIG1
 ((
ušt8_t
)0x01è

	)

4111 

	#DAC_SWTRIGR_SWTRIG2
 ((
ušt8_t
)0x02è

	)

4114 

	#DAC_DHR12R1_DACC1DHR
 ((
ušt16_t
)0x0FFFè

	)

4117 

	#DAC_DHR12L1_DACC1DHR
 ((
ušt16_t
)0xFFF0è

	)

4120 

	#DAC_DHR8R1_DACC1DHR
 ((
ušt8_t
)0xFFè

	)

4123 

	#DAC_DHR12R2_DACC2DHR
 ((
ušt16_t
)0x0FFFè

	)

4126 

	#DAC_DHR12L2_DACC2DHR
 ((
ušt16_t
)0xFFF0è

	)

4129 

	#DAC_DHR8R2_DACC2DHR
 ((
ušt8_t
)0xFFè

	)

4132 

	#DAC_DHR12RD_DACC1DHR
 ((
ušt32_t
)0x00000FFFè

	)

4133 

	#DAC_DHR12RD_DACC2DHR
 ((
ušt32_t
)0x0FFF0000è

	)

4136 

	#DAC_DHR12LD_DACC1DHR
 ((
ušt32_t
)0x0000FFF0è

	)

4137 

	#DAC_DHR12LD_DACC2DHR
 ((
ušt32_t
)0xFFF00000è

	)

4140 

	#DAC_DHR8RD_DACC1DHR
 ((
ušt16_t
)0x00FFè

	)

4141 

	#DAC_DHR8RD_DACC2DHR
 ((
ušt16_t
)0xFF00è

	)

4144 

	#DAC_DOR1_DACC1DOR
 ((
ušt16_t
)0x0FFFè

	)

4147 

	#DAC_DOR2_DACC2DOR
 ((
ušt16_t
)0x0FFFè

	)

4150 

	#DAC_SR_DMAUDR1
 ((
ušt32_t
)0x00002000è

	)

4151 

	#DAC_SR_DMAUDR2
 ((
ušt32_t
)0x20000000è

	)

4159 

	#CEC_CFGR_PE
 ((
ušt16_t
)0x0001è

	)

4160 

	#CEC_CFGR_IE
 ((
ušt16_t
)0x0002è

	)

4161 

	#CEC_CFGR_BTEM
 ((
ušt16_t
)0x0004è

	)

4162 

	#CEC_CFGR_BPEM
 ((
ušt16_t
)0x0008è

	)

4165 

	#CEC_OAR_OA
 ((
ušt16_t
)0x000Fè

	)

4166 

	#CEC_OAR_OA_0
 ((
ušt16_t
)0x0001è

	)

4167 

	#CEC_OAR_OA_1
 ((
ušt16_t
)0x0002è

	)

4168 

	#CEC_OAR_OA_2
 ((
ušt16_t
)0x0004è

	)

4169 

	#CEC_OAR_OA_3
 ((
ušt16_t
)0x0008è

	)

4172 

	#CEC_PRES_PRES
 ((
ušt16_t
)0x3FFFè

	)

4175 

	#CEC_ESR_BTE
 ((
ušt16_t
)0x0001è

	)

4176 

	#CEC_ESR_BPE
 ((
ušt16_t
)0x0002è

	)

4177 

	#CEC_ESR_RBTFE
 ((
ušt16_t
)0x0004è

	)

4178 

	#CEC_ESR_SBE
 ((
ušt16_t
)0x0008è

	)

4179 

	#CEC_ESR_ACKE
 ((
ušt16_t
)0x0010è

	)

4180 

	#CEC_ESR_LINE
 ((
ušt16_t
)0x0020è

	)

4181 

	#CEC_ESR_TBTFE
 ((
ušt16_t
)0x0040è

	)

4184 

	#CEC_CSR_TSOM
 ((
ušt16_t
)0x0001è

	)

4185 

	#CEC_CSR_TEOM
 ((
ušt16_t
)0x0002è

	)

4186 

	#CEC_CSR_TERR
 ((
ušt16_t
)0x0004è

	)

4187 

	#CEC_CSR_TBTRF
 ((
ušt16_t
)0x0008è

	)

4188 

	#CEC_CSR_RSOM
 ((
ušt16_t
)0x0010è

	)

4189 

	#CEC_CSR_REOM
 ((
ušt16_t
)0x0020è

	)

4190 

	#CEC_CSR_RERR
 ((
ušt16_t
)0x0040è

	)

4191 

	#CEC_CSR_RBTF
 ((
ušt16_t
)0x0080è

	)

4194 

	#CEC_TXD_TXD
 ((
ušt16_t
)0x00FFè

	)

4197 

	#CEC_RXD_RXD
 ((
ušt16_t
)0x00FFè

	)

4206 

	#TIM_CR1_CEN
 ((
ušt16_t
)0x0001è

	)

4207 

	#TIM_CR1_UDIS
 ((
ušt16_t
)0x0002è

	)

4208 

	#TIM_CR1_URS
 ((
ušt16_t
)0x0004è

	)

4209 

	#TIM_CR1_OPM
 ((
ušt16_t
)0x0008è

	)

4210 

	#TIM_CR1_DIR
 ((
ušt16_t
)0x0010è

	)

4212 

	#TIM_CR1_CMS
 ((
ušt16_t
)0x0060è

	)

4213 

	#TIM_CR1_CMS_0
 ((
ušt16_t
)0x0020è

	)

4214 

	#TIM_CR1_CMS_1
 ((
ušt16_t
)0x0040è

	)

4216 

	#TIM_CR1_ARPE
 ((
ušt16_t
)0x0080è

	)

4218 

	#TIM_CR1_CKD
 ((
ušt16_t
)0x0300è

	)

4219 

	#TIM_CR1_CKD_0
 ((
ušt16_t
)0x0100è

	)

4220 

	#TIM_CR1_CKD_1
 ((
ušt16_t
)0x0200è

	)

4223 

	#TIM_CR2_CCPC
 ((
ušt16_t
)0x0001è

	)

4224 

	#TIM_CR2_CCUS
 ((
ušt16_t
)0x0004è

	)

4225 

	#TIM_CR2_CCDS
 ((
ušt16_t
)0x0008è

	)

4227 

	#TIM_CR2_MMS
 ((
ušt16_t
)0x0070è

	)

4228 

	#TIM_CR2_MMS_0
 ((
ušt16_t
)0x0010è

	)

4229 

	#TIM_CR2_MMS_1
 ((
ušt16_t
)0x0020è

	)

4230 

	#TIM_CR2_MMS_2
 ((
ušt16_t
)0x0040è

	)

4232 

	#TIM_CR2_TI1S
 ((
ušt16_t
)0x0080è

	)

4233 

	#TIM_CR2_OIS1
 ((
ušt16_t
)0x0100è

	)

4234 

	#TIM_CR2_OIS1N
 ((
ušt16_t
)0x0200è

	)

4235 

	#TIM_CR2_OIS2
 ((
ušt16_t
)0x0400è

	)

4236 

	#TIM_CR2_OIS2N
 ((
ušt16_t
)0x0800è

	)

4237 

	#TIM_CR2_OIS3
 ((
ušt16_t
)0x1000è

	)

4238 

	#TIM_CR2_OIS3N
 ((
ušt16_t
)0x2000è

	)

4239 

	#TIM_CR2_OIS4
 ((
ušt16_t
)0x4000è

	)

4242 

	#TIM_SMCR_SMS
 ((
ušt16_t
)0x0007è

	)

4243 

	#TIM_SMCR_SMS_0
 ((
ušt16_t
)0x0001è

	)

4244 

	#TIM_SMCR_SMS_1
 ((
ušt16_t
)0x0002è

	)

4245 

	#TIM_SMCR_SMS_2
 ((
ušt16_t
)0x0004è

	)

4247 

	#TIM_SMCR_TS
 ((
ušt16_t
)0x0070è

	)

4248 

	#TIM_SMCR_TS_0
 ((
ušt16_t
)0x0010è

	)

4249 

	#TIM_SMCR_TS_1
 ((
ušt16_t
)0x0020è

	)

4250 

	#TIM_SMCR_TS_2
 ((
ušt16_t
)0x0040è

	)

4252 

	#TIM_SMCR_MSM
 ((
ušt16_t
)0x0080è

	)

4254 

	#TIM_SMCR_ETF
 ((
ušt16_t
)0x0F00è

	)

4255 

	#TIM_SMCR_ETF_0
 ((
ušt16_t
)0x0100è

	)

4256 

	#TIM_SMCR_ETF_1
 ((
ušt16_t
)0x0200è

	)

4257 

	#TIM_SMCR_ETF_2
 ((
ušt16_t
)0x0400è

	)

4258 

	#TIM_SMCR_ETF_3
 ((
ušt16_t
)0x0800è

	)

4260 

	#TIM_SMCR_ETPS
 ((
ušt16_t
)0x3000è

	)

4261 

	#TIM_SMCR_ETPS_0
 ((
ušt16_t
)0x1000è

	)

4262 

	#TIM_SMCR_ETPS_1
 ((
ušt16_t
)0x2000è

	)

4264 

	#TIM_SMCR_ECE
 ((
ušt16_t
)0x4000è

	)

4265 

	#TIM_SMCR_ETP
 ((
ušt16_t
)0x8000è

	)

4268 

	#TIM_DIER_UIE
 ((
ušt16_t
)0x0001è

	)

4269 

	#TIM_DIER_CC1IE
 ((
ušt16_t
)0x0002è

	)

4270 

	#TIM_DIER_CC2IE
 ((
ušt16_t
)0x0004è

	)

4271 

	#TIM_DIER_CC3IE
 ((
ušt16_t
)0x0008è

	)

4272 

	#TIM_DIER_CC4IE
 ((
ušt16_t
)0x0010è

	)

4273 

	#TIM_DIER_COMIE
 ((
ušt16_t
)0x0020è

	)

4274 

	#TIM_DIER_TIE
 ((
ušt16_t
)0x0040è

	)

4275 

	#TIM_DIER_BIE
 ((
ušt16_t
)0x0080è

	)

4276 

	#TIM_DIER_UDE
 ((
ušt16_t
)0x0100è

	)

4277 

	#TIM_DIER_CC1DE
 ((
ušt16_t
)0x0200è

	)

4278 

	#TIM_DIER_CC2DE
 ((
ušt16_t
)0x0400è

	)

4279 

	#TIM_DIER_CC3DE
 ((
ušt16_t
)0x0800è

	)

4280 

	#TIM_DIER_CC4DE
 ((
ušt16_t
)0x1000è

	)

4281 

	#TIM_DIER_COMDE
 ((
ušt16_t
)0x2000è

	)

4282 

	#TIM_DIER_TDE
 ((
ušt16_t
)0x4000è

	)

4285 

	#TIM_SR_UIF
 ((
ušt16_t
)0x0001è

	)

4286 

	#TIM_SR_CC1IF
 ((
ušt16_t
)0x0002è

	)

4287 

	#TIM_SR_CC2IF
 ((
ušt16_t
)0x0004è

	)

4288 

	#TIM_SR_CC3IF
 ((
ušt16_t
)0x0008è

	)

4289 

	#TIM_SR_CC4IF
 ((
ušt16_t
)0x0010è

	)

4290 

	#TIM_SR_COMIF
 ((
ušt16_t
)0x0020è

	)

4291 

	#TIM_SR_TIF
 ((
ušt16_t
)0x0040è

	)

4292 

	#TIM_SR_BIF
 ((
ušt16_t
)0x0080è

	)

4293 

	#TIM_SR_CC1OF
 ((
ušt16_t
)0x0200è

	)

4294 

	#TIM_SR_CC2OF
 ((
ušt16_t
)0x0400è

	)

4295 

	#TIM_SR_CC3OF
 ((
ušt16_t
)0x0800è

	)

4296 

	#TIM_SR_CC4OF
 ((
ušt16_t
)0x1000è

	)

4299 

	#TIM_EGR_UG
 ((
ušt8_t
)0x01è

	)

4300 

	#TIM_EGR_CC1G
 ((
ušt8_t
)0x02è

	)

4301 

	#TIM_EGR_CC2G
 ((
ušt8_t
)0x04è

	)

4302 

	#TIM_EGR_CC3G
 ((
ušt8_t
)0x08è

	)

4303 

	#TIM_EGR_CC4G
 ((
ušt8_t
)0x10è

	)

4304 

	#TIM_EGR_COMG
 ((
ušt8_t
)0x20è

	)

4305 

	#TIM_EGR_TG
 ((
ušt8_t
)0x40è

	)

4306 

	#TIM_EGR_BG
 ((
ušt8_t
)0x80è

	)

4309 

	#TIM_CCMR1_CC1S
 ((
ušt16_t
)0x0003è

	)

4310 

	#TIM_CCMR1_CC1S_0
 ((
ušt16_t
)0x0001è

	)

4311 

	#TIM_CCMR1_CC1S_1
 ((
ušt16_t
)0x0002è

	)

4313 

	#TIM_CCMR1_OC1FE
 ((
ušt16_t
)0x0004è

	)

4314 

	#TIM_CCMR1_OC1PE
 ((
ušt16_t
)0x0008è

	)

4316 

	#TIM_CCMR1_OC1M
 ((
ušt16_t
)0x0070è

	)

4317 

	#TIM_CCMR1_OC1M_0
 ((
ušt16_t
)0x0010è

	)

4318 

	#TIM_CCMR1_OC1M_1
 ((
ušt16_t
)0x0020è

	)

4319 

	#TIM_CCMR1_OC1M_2
 ((
ušt16_t
)0x0040è

	)

4321 

	#TIM_CCMR1_OC1CE
 ((
ušt16_t
)0x0080è

	)

4323 

	#TIM_CCMR1_CC2S
 ((
ušt16_t
)0x0300è

	)

4324 

	#TIM_CCMR1_CC2S_0
 ((
ušt16_t
)0x0100è

	)

4325 

	#TIM_CCMR1_CC2S_1
 ((
ušt16_t
)0x0200è

	)

4327 

	#TIM_CCMR1_OC2FE
 ((
ušt16_t
)0x0400è

	)

4328 

	#TIM_CCMR1_OC2PE
 ((
ušt16_t
)0x0800è

	)

4330 

	#TIM_CCMR1_OC2M
 ((
ušt16_t
)0x7000è

	)

4331 

	#TIM_CCMR1_OC2M_0
 ((
ušt16_t
)0x1000è

	)

4332 

	#TIM_CCMR1_OC2M_1
 ((
ušt16_t
)0x2000è

	)

4333 

	#TIM_CCMR1_OC2M_2
 ((
ušt16_t
)0x4000è

	)

4335 

	#TIM_CCMR1_OC2CE
 ((
ušt16_t
)0x8000è

	)

4339 

	#TIM_CCMR1_IC1PSC
 ((
ušt16_t
)0x000Cè

	)

4340 

	#TIM_CCMR1_IC1PSC_0
 ((
ušt16_t
)0x0004è

	)

4341 

	#TIM_CCMR1_IC1PSC_1
 ((
ušt16_t
)0x0008è

	)

4343 

	#TIM_CCMR1_IC1F
 ((
ušt16_t
)0x00F0è

	)

4344 

	#TIM_CCMR1_IC1F_0
 ((
ušt16_t
)0x0010è

	)

4345 

	#TIM_CCMR1_IC1F_1
 ((
ušt16_t
)0x0020è

	)

4346 

	#TIM_CCMR1_IC1F_2
 ((
ušt16_t
)0x0040è

	)

4347 

	#TIM_CCMR1_IC1F_3
 ((
ušt16_t
)0x0080è

	)

4349 

	#TIM_CCMR1_IC2PSC
 ((
ušt16_t
)0x0C00è

	)

4350 

	#TIM_CCMR1_IC2PSC_0
 ((
ušt16_t
)0x0400è

	)

4351 

	#TIM_CCMR1_IC2PSC_1
 ((
ušt16_t
)0x0800è

	)

4353 

	#TIM_CCMR1_IC2F
 ((
ušt16_t
)0xF000è

	)

4354 

	#TIM_CCMR1_IC2F_0
 ((
ušt16_t
)0x1000è

	)

4355 

	#TIM_CCMR1_IC2F_1
 ((
ušt16_t
)0x2000è

	)

4356 

	#TIM_CCMR1_IC2F_2
 ((
ušt16_t
)0x4000è

	)

4357 

	#TIM_CCMR1_IC2F_3
 ((
ušt16_t
)0x8000è

	)

4360 

	#TIM_CCMR2_CC3S
 ((
ušt16_t
)0x0003è

	)

4361 

	#TIM_CCMR2_CC3S_0
 ((
ušt16_t
)0x0001è

	)

4362 

	#TIM_CCMR2_CC3S_1
 ((
ušt16_t
)0x0002è

	)

4364 

	#TIM_CCMR2_OC3FE
 ((
ušt16_t
)0x0004è

	)

4365 

	#TIM_CCMR2_OC3PE
 ((
ušt16_t
)0x0008è

	)

4367 

	#TIM_CCMR2_OC3M
 ((
ušt16_t
)0x0070è

	)

4368 

	#TIM_CCMR2_OC3M_0
 ((
ušt16_t
)0x0010è

	)

4369 

	#TIM_CCMR2_OC3M_1
 ((
ušt16_t
)0x0020è

	)

4370 

	#TIM_CCMR2_OC3M_2
 ((
ušt16_t
)0x0040è

	)

4372 

	#TIM_CCMR2_OC3CE
 ((
ušt16_t
)0x0080è

	)

4374 

	#TIM_CCMR2_CC4S
 ((
ušt16_t
)0x0300è

	)

4375 

	#TIM_CCMR2_CC4S_0
 ((
ušt16_t
)0x0100è

	)

4376 

	#TIM_CCMR2_CC4S_1
 ((
ušt16_t
)0x0200è

	)

4378 

	#TIM_CCMR2_OC4FE
 ((
ušt16_t
)0x0400è

	)

4379 

	#TIM_CCMR2_OC4PE
 ((
ušt16_t
)0x0800è

	)

4381 

	#TIM_CCMR2_OC4M
 ((
ušt16_t
)0x7000è

	)

4382 

	#TIM_CCMR2_OC4M_0
 ((
ušt16_t
)0x1000è

	)

4383 

	#TIM_CCMR2_OC4M_1
 ((
ušt16_t
)0x2000è

	)

4384 

	#TIM_CCMR2_OC4M_2
 ((
ušt16_t
)0x4000è

	)

4386 

	#TIM_CCMR2_OC4CE
 ((
ušt16_t
)0x8000è

	)

4390 

	#TIM_CCMR2_IC3PSC
 ((
ušt16_t
)0x000Cè

	)

4391 

	#TIM_CCMR2_IC3PSC_0
 ((
ušt16_t
)0x0004è

	)

4392 

	#TIM_CCMR2_IC3PSC_1
 ((
ušt16_t
)0x0008è

	)

4394 

	#TIM_CCMR2_IC3F
 ((
ušt16_t
)0x00F0è

	)

4395 

	#TIM_CCMR2_IC3F_0
 ((
ušt16_t
)0x0010è

	)

4396 

	#TIM_CCMR2_IC3F_1
 ((
ušt16_t
)0x0020è

	)

4397 

	#TIM_CCMR2_IC3F_2
 ((
ušt16_t
)0x0040è

	)

4398 

	#TIM_CCMR2_IC3F_3
 ((
ušt16_t
)0x0080è

	)

4400 

	#TIM_CCMR2_IC4PSC
 ((
ušt16_t
)0x0C00è

	)

4401 

	#TIM_CCMR2_IC4PSC_0
 ((
ušt16_t
)0x0400è

	)

4402 

	#TIM_CCMR2_IC4PSC_1
 ((
ušt16_t
)0x0800è

	)

4404 

	#TIM_CCMR2_IC4F
 ((
ušt16_t
)0xF000è

	)

4405 

	#TIM_CCMR2_IC4F_0
 ((
ušt16_t
)0x1000è

	)

4406 

	#TIM_CCMR2_IC4F_1
 ((
ušt16_t
)0x2000è

	)

4407 

	#TIM_CCMR2_IC4F_2
 ((
ušt16_t
)0x4000è

	)

4408 

	#TIM_CCMR2_IC4F_3
 ((
ušt16_t
)0x8000è

	)

4411 

	#TIM_CCER_CC1E
 ((
ušt16_t
)0x0001è

	)

4412 

	#TIM_CCER_CC1P
 ((
ušt16_t
)0x0002è

	)

4413 

	#TIM_CCER_CC1NE
 ((
ušt16_t
)0x0004è

	)

4414 

	#TIM_CCER_CC1NP
 ((
ušt16_t
)0x0008è

	)

4415 

	#TIM_CCER_CC2E
 ((
ušt16_t
)0x0010è

	)

4416 

	#TIM_CCER_CC2P
 ((
ušt16_t
)0x0020è

	)

4417 

	#TIM_CCER_CC2NE
 ((
ušt16_t
)0x0040è

	)

4418 

	#TIM_CCER_CC2NP
 ((
ušt16_t
)0x0080è

	)

4419 

	#TIM_CCER_CC3E
 ((
ušt16_t
)0x0100è

	)

4420 

	#TIM_CCER_CC3P
 ((
ušt16_t
)0x0200è

	)

4421 

	#TIM_CCER_CC3NE
 ((
ušt16_t
)0x0400è

	)

4422 

	#TIM_CCER_CC3NP
 ((
ušt16_t
)0x0800è

	)

4423 

	#TIM_CCER_CC4E
 ((
ušt16_t
)0x1000è

	)

4424 

	#TIM_CCER_CC4P
 ((
ušt16_t
)0x2000è

	)

4425 

	#TIM_CCER_CC4NP
 ((
ušt16_t
)0x8000è

	)

4428 

	#TIM_CNT_CNT
 ((
ušt16_t
)0xFFFFè

	)

4431 

	#TIM_PSC_PSC
 ((
ušt16_t
)0xFFFFè

	)

4434 

	#TIM_ARR_ARR
 ((
ušt16_t
)0xFFFFè

	)

4437 

	#TIM_RCR_REP
 ((
ušt8_t
)0xFFè

	)

4440 

	#TIM_CCR1_CCR1
 ((
ušt16_t
)0xFFFFè

	)

4443 

	#TIM_CCR2_CCR2
 ((
ušt16_t
)0xFFFFè

	)

4446 

	#TIM_CCR3_CCR3
 ((
ušt16_t
)0xFFFFè

	)

4449 

	#TIM_CCR4_CCR4
 ((
ušt16_t
)0xFFFFè

	)

4452 

	#TIM_BDTR_DTG
 ((
ušt16_t
)0x00FFè

	)

4453 

	#TIM_BDTR_DTG_0
 ((
ušt16_t
)0x0001è

	)

4454 

	#TIM_BDTR_DTG_1
 ((
ušt16_t
)0x0002è

	)

4455 

	#TIM_BDTR_DTG_2
 ((
ušt16_t
)0x0004è

	)

4456 

	#TIM_BDTR_DTG_3
 ((
ušt16_t
)0x0008è

	)

4457 

	#TIM_BDTR_DTG_4
 ((
ušt16_t
)0x0010è

	)

4458 

	#TIM_BDTR_DTG_5
 ((
ušt16_t
)0x0020è

	)

4459 

	#TIM_BDTR_DTG_6
 ((
ušt16_t
)0x0040è

	)

4460 

	#TIM_BDTR_DTG_7
 ((
ušt16_t
)0x0080è

	)

4462 

	#TIM_BDTR_LOCK
 ((
ušt16_t
)0x0300è

	)

4463 

	#TIM_BDTR_LOCK_0
 ((
ušt16_t
)0x0100è

	)

4464 

	#TIM_BDTR_LOCK_1
 ((
ušt16_t
)0x0200è

	)

4466 

	#TIM_BDTR_OSSI
 ((
ušt16_t
)0x0400è

	)

4467 

	#TIM_BDTR_OSSR
 ((
ušt16_t
)0x0800è

	)

4468 

	#TIM_BDTR_BKE
 ((
ušt16_t
)0x1000è

	)

4469 

	#TIM_BDTR_BKP
 ((
ušt16_t
)0x2000è

	)

4470 

	#TIM_BDTR_AOE
 ((
ušt16_t
)0x4000è

	)

4471 

	#TIM_BDTR_MOE
 ((
ušt16_t
)0x8000è

	)

4474 

	#TIM_DCR_DBA
 ((
ušt16_t
)0x001Fè

	)

4475 

	#TIM_DCR_DBA_0
 ((
ušt16_t
)0x0001è

	)

4476 

	#TIM_DCR_DBA_1
 ((
ušt16_t
)0x0002è

	)

4477 

	#TIM_DCR_DBA_2
 ((
ušt16_t
)0x0004è

	)

4478 

	#TIM_DCR_DBA_3
 ((
ušt16_t
)0x0008è

	)

4479 

	#TIM_DCR_DBA_4
 ((
ušt16_t
)0x0010è

	)

4481 

	#TIM_DCR_DBL
 ((
ušt16_t
)0x1F00è

	)

4482 

	#TIM_DCR_DBL_0
 ((
ušt16_t
)0x0100è

	)

4483 

	#TIM_DCR_DBL_1
 ((
ušt16_t
)0x0200è

	)

4484 

	#TIM_DCR_DBL_2
 ((
ušt16_t
)0x0400è

	)

4485 

	#TIM_DCR_DBL_3
 ((
ušt16_t
)0x0800è

	)

4486 

	#TIM_DCR_DBL_4
 ((
ušt16_t
)0x1000è

	)

4489 

	#TIM_DMAR_DMAB
 ((
ušt16_t
)0xFFFFè

	)

4498 

	#RTC_CRH_SECIE
 ((
ušt8_t
)0x01è

	)

4499 

	#RTC_CRH_ALRIE
 ((
ušt8_t
)0x02è

	)

4500 

	#RTC_CRH_OWIE
 ((
ušt8_t
)0x04è

	)

4503 

	#RTC_CRL_SECF
 ((
ušt8_t
)0x01è

	)

4504 

	#RTC_CRL_ALRF
 ((
ušt8_t
)0x02è

	)

4505 

	#RTC_CRL_OWF
 ((
ušt8_t
)0x04è

	)

4506 

	#RTC_CRL_RSF
 ((
ušt8_t
)0x08è

	)

4507 

	#RTC_CRL_CNF
 ((
ušt8_t
)0x10è

	)

4508 

	#RTC_CRL_RTOFF
 ((
ušt8_t
)0x20è

	)

4511 

	#RTC_PRLH_PRL
 ((
ušt16_t
)0x000Fè

	)

4514 

	#RTC_PRLL_PRL
 ((
ušt16_t
)0xFFFFè

	)

4517 

	#RTC_DIVH_RTC_DIV
 ((
ušt16_t
)0x000Fè

	)

4520 

	#RTC_DIVL_RTC_DIV
 ((
ušt16_t
)0xFFFFè

	)

4523 

	#RTC_CNTH_RTC_CNT
 ((
ušt16_t
)0xFFFFè

	)

4526 

	#RTC_CNTL_RTC_CNT
 ((
ušt16_t
)0xFFFFè

	)

4529 

	#RTC_ALRH_RTC_ALR
 ((
ušt16_t
)0xFFFFè

	)

4532 

	#RTC_ALRL_RTC_ALR
 ((
ušt16_t
)0xFFFFè

	)

4541 

	#IWDG_KR_KEY
 ((
ušt16_t
)0xFFFFè

	)

4544 

	#IWDG_PR_PR
 ((
ušt8_t
)0x07è

	)

4545 

	#IWDG_PR_PR_0
 ((
ušt8_t
)0x01è

	)

4546 

	#IWDG_PR_PR_1
 ((
ušt8_t
)0x02è

	)

4547 

	#IWDG_PR_PR_2
 ((
ušt8_t
)0x04è

	)

4550 

	#IWDG_RLR_RL
 ((
ušt16_t
)0x0FFFè

	)

4553 

	#IWDG_SR_PVU
 ((
ušt8_t
)0x01è

	)

4554 

	#IWDG_SR_RVU
 ((
ušt8_t
)0x02è

	)

4563 

	#WWDG_CR_T
 ((
ušt8_t
)0x7Fè

	)

4564 

	#WWDG_CR_T0
 ((
ušt8_t
)0x01è

	)

4565 

	#WWDG_CR_T1
 ((
ušt8_t
)0x02è

	)

4566 

	#WWDG_CR_T2
 ((
ušt8_t
)0x04è

	)

4567 

	#WWDG_CR_T3
 ((
ušt8_t
)0x08è

	)

4568 

	#WWDG_CR_T4
 ((
ušt8_t
)0x10è

	)

4569 

	#WWDG_CR_T5
 ((
ušt8_t
)0x20è

	)

4570 

	#WWDG_CR_T6
 ((
ušt8_t
)0x40è

	)

4572 

	#WWDG_CR_WDGA
 ((
ušt8_t
)0x80è

	)

4575 

	#WWDG_CFR_W
 ((
ušt16_t
)0x007Fè

	)

4576 

	#WWDG_CFR_W0
 ((
ušt16_t
)0x0001è

	)

4577 

	#WWDG_CFR_W1
 ((
ušt16_t
)0x0002è

	)

4578 

	#WWDG_CFR_W2
 ((
ušt16_t
)0x0004è

	)

4579 

	#WWDG_CFR_W3
 ((
ušt16_t
)0x0008è

	)

4580 

	#WWDG_CFR_W4
 ((
ušt16_t
)0x0010è

	)

4581 

	#WWDG_CFR_W5
 ((
ušt16_t
)0x0020è

	)

4582 

	#WWDG_CFR_W6
 ((
ušt16_t
)0x0040è

	)

4584 

	#WWDG_CFR_WDGTB
 ((
ušt16_t
)0x0180è

	)

4585 

	#WWDG_CFR_WDGTB0
 ((
ušt16_t
)0x0080è

	)

4586 

	#WWDG_CFR_WDGTB1
 ((
ušt16_t
)0x0100è

	)

4588 

	#WWDG_CFR_EWI
 ((
ušt16_t
)0x0200è

	)

4591 

	#WWDG_SR_EWIF
 ((
ušt8_t
)0x01è

	)

4600 

	#FSMC_BCR1_MBKEN
 ((
ušt32_t
)0x00000001è

	)

4601 

	#FSMC_BCR1_MUXEN
 ((
ušt32_t
)0x00000002è

	)

4603 

	#FSMC_BCR1_MTYP
 ((
ušt32_t
)0x0000000Cè

	)

4604 

	#FSMC_BCR1_MTYP_0
 ((
ušt32_t
)0x00000004è

	)

4605 

	#FSMC_BCR1_MTYP_1
 ((
ušt32_t
)0x00000008è

	)

4607 

	#FSMC_BCR1_MWID
 ((
ušt32_t
)0x00000030è

	)

4608 

	#FSMC_BCR1_MWID_0
 ((
ušt32_t
)0x00000010è

	)

4609 

	#FSMC_BCR1_MWID_1
 ((
ušt32_t
)0x00000020è

	)

4611 

	#FSMC_BCR1_FACCEN
 ((
ušt32_t
)0x00000040è

	)

4612 

	#FSMC_BCR1_BURSTEN
 ((
ušt32_t
)0x00000100è

	)

4613 

	#FSMC_BCR1_WAITPOL
 ((
ušt32_t
)0x00000200è

	)

4614 

	#FSMC_BCR1_WRAPMOD
 ((
ušt32_t
)0x00000400è

	)

4615 

	#FSMC_BCR1_WAITCFG
 ((
ušt32_t
)0x00000800è

	)

4616 

	#FSMC_BCR1_WREN
 ((
ušt32_t
)0x00001000è

	)

4617 

	#FSMC_BCR1_WAITEN
 ((
ušt32_t
)0x00002000è

	)

4618 

	#FSMC_BCR1_EXTMOD
 ((
ušt32_t
)0x00004000è

	)

4619 

	#FSMC_BCR1_ASYNCWAIT
 ((
ušt32_t
)0x00008000è

	)

4620 

	#FSMC_BCR1_CBURSTRW
 ((
ušt32_t
)0x00080000è

	)

4623 

	#FSMC_BCR2_MBKEN
 ((
ušt32_t
)0x00000001è

	)

4624 

	#FSMC_BCR2_MUXEN
 ((
ušt32_t
)0x00000002è

	)

4626 

	#FSMC_BCR2_MTYP
 ((
ušt32_t
)0x0000000Cè

	)

4627 

	#FSMC_BCR2_MTYP_0
 ((
ušt32_t
)0x00000004è

	)

4628 

	#FSMC_BCR2_MTYP_1
 ((
ušt32_t
)0x00000008è

	)

4630 

	#FSMC_BCR2_MWID
 ((
ušt32_t
)0x00000030è

	)

4631 

	#FSMC_BCR2_MWID_0
 ((
ušt32_t
)0x00000010è

	)

4632 

	#FSMC_BCR2_MWID_1
 ((
ušt32_t
)0x00000020è

	)

4634 

	#FSMC_BCR2_FACCEN
 ((
ušt32_t
)0x00000040è

	)

4635 

	#FSMC_BCR2_BURSTEN
 ((
ušt32_t
)0x00000100è

	)

4636 

	#FSMC_BCR2_WAITPOL
 ((
ušt32_t
)0x00000200è

	)

4637 

	#FSMC_BCR2_WRAPMOD
 ((
ušt32_t
)0x00000400è

	)

4638 

	#FSMC_BCR2_WAITCFG
 ((
ušt32_t
)0x00000800è

	)

4639 

	#FSMC_BCR2_WREN
 ((
ušt32_t
)0x00001000è

	)

4640 

	#FSMC_BCR2_WAITEN
 ((
ušt32_t
)0x00002000è

	)

4641 

	#FSMC_BCR2_EXTMOD
 ((
ušt32_t
)0x00004000è

	)

4642 

	#FSMC_BCR2_ASYNCWAIT
 ((
ušt32_t
)0x00008000è

	)

4643 

	#FSMC_BCR2_CBURSTRW
 ((
ušt32_t
)0x00080000è

	)

4646 

	#FSMC_BCR3_MBKEN
 ((
ušt32_t
)0x00000001è

	)

4647 

	#FSMC_BCR3_MUXEN
 ((
ušt32_t
)0x00000002è

	)

4649 

	#FSMC_BCR3_MTYP
 ((
ušt32_t
)0x0000000Cè

	)

4650 

	#FSMC_BCR3_MTYP_0
 ((
ušt32_t
)0x00000004è

	)

4651 

	#FSMC_BCR3_MTYP_1
 ((
ušt32_t
)0x00000008è

	)

4653 

	#FSMC_BCR3_MWID
 ((
ušt32_t
)0x00000030è

	)

4654 

	#FSMC_BCR3_MWID_0
 ((
ušt32_t
)0x00000010è

	)

4655 

	#FSMC_BCR3_MWID_1
 ((
ušt32_t
)0x00000020è

	)

4657 

	#FSMC_BCR3_FACCEN
 ((
ušt32_t
)0x00000040è

	)

4658 

	#FSMC_BCR3_BURSTEN
 ((
ušt32_t
)0x00000100è

	)

4659 

	#FSMC_BCR3_WAITPOL
 ((
ušt32_t
)0x00000200è

	)

4660 

	#FSMC_BCR3_WRAPMOD
 ((
ušt32_t
)0x00000400è

	)

4661 

	#FSMC_BCR3_WAITCFG
 ((
ušt32_t
)0x00000800è

	)

4662 

	#FSMC_BCR3_WREN
 ((
ušt32_t
)0x00001000è

	)

4663 

	#FSMC_BCR3_WAITEN
 ((
ušt32_t
)0x00002000è

	)

4664 

	#FSMC_BCR3_EXTMOD
 ((
ušt32_t
)0x00004000è

	)

4665 

	#FSMC_BCR3_ASYNCWAIT
 ((
ušt32_t
)0x00008000è

	)

4666 

	#FSMC_BCR3_CBURSTRW
 ((
ušt32_t
)0x00080000è

	)

4669 

	#FSMC_BCR4_MBKEN
 ((
ušt32_t
)0x00000001è

	)

4670 

	#FSMC_BCR4_MUXEN
 ((
ušt32_t
)0x00000002è

	)

4672 

	#FSMC_BCR4_MTYP
 ((
ušt32_t
)0x0000000Cè

	)

4673 

	#FSMC_BCR4_MTYP_0
 ((
ušt32_t
)0x00000004è

	)

4674 

	#FSMC_BCR4_MTYP_1
 ((
ušt32_t
)0x00000008è

	)

4676 

	#FSMC_BCR4_MWID
 ((
ušt32_t
)0x00000030è

	)

4677 

	#FSMC_BCR4_MWID_0
 ((
ušt32_t
)0x00000010è

	)

4678 

	#FSMC_BCR4_MWID_1
 ((
ušt32_t
)0x00000020è

	)

4680 

	#FSMC_BCR4_FACCEN
 ((
ušt32_t
)0x00000040è

	)

4681 

	#FSMC_BCR4_BURSTEN
 ((
ušt32_t
)0x00000100è

	)

4682 

	#FSMC_BCR4_WAITPOL
 ((
ušt32_t
)0x00000200è

	)

4683 

	#FSMC_BCR4_WRAPMOD
 ((
ušt32_t
)0x00000400è

	)

4684 

	#FSMC_BCR4_WAITCFG
 ((
ušt32_t
)0x00000800è

	)

4685 

	#FSMC_BCR4_WREN
 ((
ušt32_t
)0x00001000è

	)

4686 

	#FSMC_BCR4_WAITEN
 ((
ušt32_t
)0x00002000è

	)

4687 

	#FSMC_BCR4_EXTMOD
 ((
ušt32_t
)0x00004000è

	)

4688 

	#FSMC_BCR4_ASYNCWAIT
 ((
ušt32_t
)0x00008000è

	)

4689 

	#FSMC_BCR4_CBURSTRW
 ((
ušt32_t
)0x00080000è

	)

4692 

	#FSMC_BTR1_ADDSET
 ((
ušt32_t
)0x0000000Fè

	)

4693 

	#FSMC_BTR1_ADDSET_0
 ((
ušt32_t
)0x00000001è

	)

4694 

	#FSMC_BTR1_ADDSET_1
 ((
ušt32_t
)0x00000002è

	)

4695 

	#FSMC_BTR1_ADDSET_2
 ((
ušt32_t
)0x00000004è

	)

4696 

	#FSMC_BTR1_ADDSET_3
 ((
ušt32_t
)0x00000008è

	)

4698 

	#FSMC_BTR1_ADDHLD
 ((
ušt32_t
)0x000000F0è

	)

4699 

	#FSMC_BTR1_ADDHLD_0
 ((
ušt32_t
)0x00000010è

	)

4700 

	#FSMC_BTR1_ADDHLD_1
 ((
ušt32_t
)0x00000020è

	)

4701 

	#FSMC_BTR1_ADDHLD_2
 ((
ušt32_t
)0x00000040è

	)

4702 

	#FSMC_BTR1_ADDHLD_3
 ((
ušt32_t
)0x00000080è

	)

4704 

	#FSMC_BTR1_DATAST
 ((
ušt32_t
)0x0000FF00è

	)

4705 

	#FSMC_BTR1_DATAST_0
 ((
ušt32_t
)0x00000100è

	)

4706 

	#FSMC_BTR1_DATAST_1
 ((
ušt32_t
)0x00000200è

	)

4707 

	#FSMC_BTR1_DATAST_2
 ((
ušt32_t
)0x00000400è

	)

4708 

	#FSMC_BTR1_DATAST_3
 ((
ušt32_t
)0x00000800è

	)

4709 

	#FSMC_BTR1_DATAST_4
 ((
ušt32_t
)0x00001000è

	)

4710 

	#FSMC_BTR1_DATAST_5
 ((
ušt32_t
)0x00002000è

	)

4711 

	#FSMC_BTR1_DATAST_6
 ((
ušt32_t
)0x00004000è

	)

4712 

	#FSMC_BTR1_DATAST_7
 ((
ušt32_t
)0x00008000è

	)

4714 

	#FSMC_BTR1_BUSTURN
 ((
ušt32_t
)0x000F0000è

	)

4715 

	#FSMC_BTR1_BUSTURN_0
 ((
ušt32_t
)0x00010000è

	)

4716 

	#FSMC_BTR1_BUSTURN_1
 ((
ušt32_t
)0x00020000è

	)

4717 

	#FSMC_BTR1_BUSTURN_2
 ((
ušt32_t
)0x00040000è

	)

4718 

	#FSMC_BTR1_BUSTURN_3
 ((
ušt32_t
)0x00080000è

	)

4720 

	#FSMC_BTR1_CLKDIV
 ((
ušt32_t
)0x00F00000è

	)

4721 

	#FSMC_BTR1_CLKDIV_0
 ((
ušt32_t
)0x00100000è

	)

4722 

	#FSMC_BTR1_CLKDIV_1
 ((
ušt32_t
)0x00200000è

	)

4723 

	#FSMC_BTR1_CLKDIV_2
 ((
ušt32_t
)0x00400000è

	)

4724 

	#FSMC_BTR1_CLKDIV_3
 ((
ušt32_t
)0x00800000è

	)

4726 

	#FSMC_BTR1_DATLAT
 ((
ušt32_t
)0x0F000000è

	)

4727 

	#FSMC_BTR1_DATLAT_0
 ((
ušt32_t
)0x01000000è

	)

4728 

	#FSMC_BTR1_DATLAT_1
 ((
ušt32_t
)0x02000000è

	)

4729 

	#FSMC_BTR1_DATLAT_2
 ((
ušt32_t
)0x04000000è

	)

4730 

	#FSMC_BTR1_DATLAT_3
 ((
ušt32_t
)0x08000000è

	)

4732 

	#FSMC_BTR1_ACCMOD
 ((
ušt32_t
)0x30000000è

	)

4733 

	#FSMC_BTR1_ACCMOD_0
 ((
ušt32_t
)0x10000000è

	)

4734 

	#FSMC_BTR1_ACCMOD_1
 ((
ušt32_t
)0x20000000è

	)

4737 

	#FSMC_BTR2_ADDSET
 ((
ušt32_t
)0x0000000Fè

	)

4738 

	#FSMC_BTR2_ADDSET_0
 ((
ušt32_t
)0x00000001è

	)

4739 

	#FSMC_BTR2_ADDSET_1
 ((
ušt32_t
)0x00000002è

	)

4740 

	#FSMC_BTR2_ADDSET_2
 ((
ušt32_t
)0x00000004è

	)

4741 

	#FSMC_BTR2_ADDSET_3
 ((
ušt32_t
)0x00000008è

	)

4743 

	#FSMC_BTR2_ADDHLD
 ((
ušt32_t
)0x000000F0è

	)

4744 

	#FSMC_BTR2_ADDHLD_0
 ((
ušt32_t
)0x00000010è

	)

4745 

	#FSMC_BTR2_ADDHLD_1
 ((
ušt32_t
)0x00000020è

	)

4746 

	#FSMC_BTR2_ADDHLD_2
 ((
ušt32_t
)0x00000040è

	)

4747 

	#FSMC_BTR2_ADDHLD_3
 ((
ušt32_t
)0x00000080è

	)

4749 

	#FSMC_BTR2_DATAST
 ((
ušt32_t
)0x0000FF00è

	)

4750 

	#FSMC_BTR2_DATAST_0
 ((
ušt32_t
)0x00000100è

	)

4751 

	#FSMC_BTR2_DATAST_1
 ((
ušt32_t
)0x00000200è

	)

4752 

	#FSMC_BTR2_DATAST_2
 ((
ušt32_t
)0x00000400è

	)

4753 

	#FSMC_BTR2_DATAST_3
 ((
ušt32_t
)0x00000800è

	)

4754 

	#FSMC_BTR2_DATAST_4
 ((
ušt32_t
)0x00001000è

	)

4755 

	#FSMC_BTR2_DATAST_5
 ((
ušt32_t
)0x00002000è

	)

4756 

	#FSMC_BTR2_DATAST_6
 ((
ušt32_t
)0x00004000è

	)

4757 

	#FSMC_BTR2_DATAST_7
 ((
ušt32_t
)0x00008000è

	)

4759 

	#FSMC_BTR2_BUSTURN
 ((
ušt32_t
)0x000F0000è

	)

4760 

	#FSMC_BTR2_BUSTURN_0
 ((
ušt32_t
)0x00010000è

	)

4761 

	#FSMC_BTR2_BUSTURN_1
 ((
ušt32_t
)0x00020000è

	)

4762 

	#FSMC_BTR2_BUSTURN_2
 ((
ušt32_t
)0x00040000è

	)

4763 

	#FSMC_BTR2_BUSTURN_3
 ((
ušt32_t
)0x00080000è

	)

4765 

	#FSMC_BTR2_CLKDIV
 ((
ušt32_t
)0x00F00000è

	)

4766 

	#FSMC_BTR2_CLKDIV_0
 ((
ušt32_t
)0x00100000è

	)

4767 

	#FSMC_BTR2_CLKDIV_1
 ((
ušt32_t
)0x00200000è

	)

4768 

	#FSMC_BTR2_CLKDIV_2
 ((
ušt32_t
)0x00400000è

	)

4769 

	#FSMC_BTR2_CLKDIV_3
 ((
ušt32_t
)0x00800000è

	)

4771 

	#FSMC_BTR2_DATLAT
 ((
ušt32_t
)0x0F000000è

	)

4772 

	#FSMC_BTR2_DATLAT_0
 ((
ušt32_t
)0x01000000è

	)

4773 

	#FSMC_BTR2_DATLAT_1
 ((
ušt32_t
)0x02000000è

	)

4774 

	#FSMC_BTR2_DATLAT_2
 ((
ušt32_t
)0x04000000è

	)

4775 

	#FSMC_BTR2_DATLAT_3
 ((
ušt32_t
)0x08000000è

	)

4777 

	#FSMC_BTR2_ACCMOD
 ((
ušt32_t
)0x30000000è

	)

4778 

	#FSMC_BTR2_ACCMOD_0
 ((
ušt32_t
)0x10000000è

	)

4779 

	#FSMC_BTR2_ACCMOD_1
 ((
ušt32_t
)0x20000000è

	)

4782 

	#FSMC_BTR3_ADDSET
 ((
ušt32_t
)0x0000000Fè

	)

4783 

	#FSMC_BTR3_ADDSET_0
 ((
ušt32_t
)0x00000001è

	)

4784 

	#FSMC_BTR3_ADDSET_1
 ((
ušt32_t
)0x00000002è

	)

4785 

	#FSMC_BTR3_ADDSET_2
 ((
ušt32_t
)0x00000004è

	)

4786 

	#FSMC_BTR3_ADDSET_3
 ((
ušt32_t
)0x00000008è

	)

4788 

	#FSMC_BTR3_ADDHLD
 ((
ušt32_t
)0x000000F0è

	)

4789 

	#FSMC_BTR3_ADDHLD_0
 ((
ušt32_t
)0x00000010è

	)

4790 

	#FSMC_BTR3_ADDHLD_1
 ((
ušt32_t
)0x00000020è

	)

4791 

	#FSMC_BTR3_ADDHLD_2
 ((
ušt32_t
)0x00000040è

	)

4792 

	#FSMC_BTR3_ADDHLD_3
 ((
ušt32_t
)0x00000080è

	)

4794 

	#FSMC_BTR3_DATAST
 ((
ušt32_t
)0x0000FF00è

	)

4795 

	#FSMC_BTR3_DATAST_0
 ((
ušt32_t
)0x00000100è

	)

4796 

	#FSMC_BTR3_DATAST_1
 ((
ušt32_t
)0x00000200è

	)

4797 

	#FSMC_BTR3_DATAST_2
 ((
ušt32_t
)0x00000400è

	)

4798 

	#FSMC_BTR3_DATAST_3
 ((
ušt32_t
)0x00000800è

	)

4799 

	#FSMC_BTR3_DATAST_4
 ((
ušt32_t
)0x00001000è

	)

4800 

	#FSMC_BTR3_DATAST_5
 ((
ušt32_t
)0x00002000è

	)

4801 

	#FSMC_BTR3_DATAST_6
 ((
ušt32_t
)0x00004000è

	)

4802 

	#FSMC_BTR3_DATAST_7
 ((
ušt32_t
)0x00008000è

	)

4804 

	#FSMC_BTR3_BUSTURN
 ((
ušt32_t
)0x000F0000è

	)

4805 

	#FSMC_BTR3_BUSTURN_0
 ((
ušt32_t
)0x00010000è

	)

4806 

	#FSMC_BTR3_BUSTURN_1
 ((
ušt32_t
)0x00020000è

	)

4807 

	#FSMC_BTR3_BUSTURN_2
 ((
ušt32_t
)0x00040000è

	)

4808 

	#FSMC_BTR3_BUSTURN_3
 ((
ušt32_t
)0x00080000è

	)

4810 

	#FSMC_BTR3_CLKDIV
 ((
ušt32_t
)0x00F00000è

	)

4811 

	#FSMC_BTR3_CLKDIV_0
 ((
ušt32_t
)0x00100000è

	)

4812 

	#FSMC_BTR3_CLKDIV_1
 ((
ušt32_t
)0x00200000è

	)

4813 

	#FSMC_BTR3_CLKDIV_2
 ((
ušt32_t
)0x00400000è

	)

4814 

	#FSMC_BTR3_CLKDIV_3
 ((
ušt32_t
)0x00800000è

	)

4816 

	#FSMC_BTR3_DATLAT
 ((
ušt32_t
)0x0F000000è

	)

4817 

	#FSMC_BTR3_DATLAT_0
 ((
ušt32_t
)0x01000000è

	)

4818 

	#FSMC_BTR3_DATLAT_1
 ((
ušt32_t
)0x02000000è

	)

4819 

	#FSMC_BTR3_DATLAT_2
 ((
ušt32_t
)0x04000000è

	)

4820 

	#FSMC_BTR3_DATLAT_3
 ((
ušt32_t
)0x08000000è

	)

4822 

	#FSMC_BTR3_ACCMOD
 ((
ušt32_t
)0x30000000è

	)

4823 

	#FSMC_BTR3_ACCMOD_0
 ((
ušt32_t
)0x10000000è

	)

4824 

	#FSMC_BTR3_ACCMOD_1
 ((
ušt32_t
)0x20000000è

	)

4827 

	#FSMC_BTR4_ADDSET
 ((
ušt32_t
)0x0000000Fè

	)

4828 

	#FSMC_BTR4_ADDSET_0
 ((
ušt32_t
)0x00000001è

	)

4829 

	#FSMC_BTR4_ADDSET_1
 ((
ušt32_t
)0x00000002è

	)

4830 

	#FSMC_BTR4_ADDSET_2
 ((
ušt32_t
)0x00000004è

	)

4831 

	#FSMC_BTR4_ADDSET_3
 ((
ušt32_t
)0x00000008è

	)

4833 

	#FSMC_BTR4_ADDHLD
 ((
ušt32_t
)0x000000F0è

	)

4834 

	#FSMC_BTR4_ADDHLD_0
 ((
ušt32_t
)0x00000010è

	)

4835 

	#FSMC_BTR4_ADDHLD_1
 ((
ušt32_t
)0x00000020è

	)

4836 

	#FSMC_BTR4_ADDHLD_2
 ((
ušt32_t
)0x00000040è

	)

4837 

	#FSMC_BTR4_ADDHLD_3
 ((
ušt32_t
)0x00000080è

	)

4839 

	#FSMC_BTR4_DATAST
 ((
ušt32_t
)0x0000FF00è

	)

4840 

	#FSMC_BTR4_DATAST_0
 ((
ušt32_t
)0x00000100è

	)

4841 

	#FSMC_BTR4_DATAST_1
 ((
ušt32_t
)0x00000200è

	)

4842 

	#FSMC_BTR4_DATAST_2
 ((
ušt32_t
)0x00000400è

	)

4843 

	#FSMC_BTR4_DATAST_3
 ((
ušt32_t
)0x00000800è

	)

4844 

	#FSMC_BTR4_DATAST_4
 ((
ušt32_t
)0x00001000è

	)

4845 

	#FSMC_BTR4_DATAST_5
 ((
ušt32_t
)0x00002000è

	)

4846 

	#FSMC_BTR4_DATAST_6
 ((
ušt32_t
)0x00004000è

	)

4847 

	#FSMC_BTR4_DATAST_7
 ((
ušt32_t
)0x00008000è

	)

4849 

	#FSMC_BTR4_BUSTURN
 ((
ušt32_t
)0x000F0000è

	)

4850 

	#FSMC_BTR4_BUSTURN_0
 ((
ušt32_t
)0x00010000è

	)

4851 

	#FSMC_BTR4_BUSTURN_1
 ((
ušt32_t
)0x00020000è

	)

4852 

	#FSMC_BTR4_BUSTURN_2
 ((
ušt32_t
)0x00040000è

	)

4853 

	#FSMC_BTR4_BUSTURN_3
 ((
ušt32_t
)0x00080000è

	)

4855 

	#FSMC_BTR4_CLKDIV
 ((
ušt32_t
)0x00F00000è

	)

4856 

	#FSMC_BTR4_CLKDIV_0
 ((
ušt32_t
)0x00100000è

	)

4857 

	#FSMC_BTR4_CLKDIV_1
 ((
ušt32_t
)0x00200000è

	)

4858 

	#FSMC_BTR4_CLKDIV_2
 ((
ušt32_t
)0x00400000è

	)

4859 

	#FSMC_BTR4_CLKDIV_3
 ((
ušt32_t
)0x00800000è

	)

4861 

	#FSMC_BTR4_DATLAT
 ((
ušt32_t
)0x0F000000è

	)

4862 

	#FSMC_BTR4_DATLAT_0
 ((
ušt32_t
)0x01000000è

	)

4863 

	#FSMC_BTR4_DATLAT_1
 ((
ušt32_t
)0x02000000è

	)

4864 

	#FSMC_BTR4_DATLAT_2
 ((
ušt32_t
)0x04000000è

	)

4865 

	#FSMC_BTR4_DATLAT_3
 ((
ušt32_t
)0x08000000è

	)

4867 

	#FSMC_BTR4_ACCMOD
 ((
ušt32_t
)0x30000000è

	)

4868 

	#FSMC_BTR4_ACCMOD_0
 ((
ušt32_t
)0x10000000è

	)

4869 

	#FSMC_BTR4_ACCMOD_1
 ((
ušt32_t
)0x20000000è

	)

4872 

	#FSMC_BWTR1_ADDSET
 ((
ušt32_t
)0x0000000Fè

	)

4873 

	#FSMC_BWTR1_ADDSET_0
 ((
ušt32_t
)0x00000001è

	)

4874 

	#FSMC_BWTR1_ADDSET_1
 ((
ušt32_t
)0x00000002è

	)

4875 

	#FSMC_BWTR1_ADDSET_2
 ((
ušt32_t
)0x00000004è

	)

4876 

	#FSMC_BWTR1_ADDSET_3
 ((
ušt32_t
)0x00000008è

	)

4878 

	#FSMC_BWTR1_ADDHLD
 ((
ušt32_t
)0x000000F0è

	)

4879 

	#FSMC_BWTR1_ADDHLD_0
 ((
ušt32_t
)0x00000010è

	)

4880 

	#FSMC_BWTR1_ADDHLD_1
 ((
ušt32_t
)0x00000020è

	)

4881 

	#FSMC_BWTR1_ADDHLD_2
 ((
ušt32_t
)0x00000040è

	)

4882 

	#FSMC_BWTR1_ADDHLD_3
 ((
ušt32_t
)0x00000080è

	)

4884 

	#FSMC_BWTR1_DATAST
 ((
ušt32_t
)0x0000FF00è

	)

4885 

	#FSMC_BWTR1_DATAST_0
 ((
ušt32_t
)0x00000100è

	)

4886 

	#FSMC_BWTR1_DATAST_1
 ((
ušt32_t
)0x00000200è

	)

4887 

	#FSMC_BWTR1_DATAST_2
 ((
ušt32_t
)0x00000400è

	)

4888 

	#FSMC_BWTR1_DATAST_3
 ((
ušt32_t
)0x00000800è

	)

4889 

	#FSMC_BWTR1_DATAST_4
 ((
ušt32_t
)0x00001000è

	)

4890 

	#FSMC_BWTR1_DATAST_5
 ((
ušt32_t
)0x00002000è

	)

4891 

	#FSMC_BWTR1_DATAST_6
 ((
ušt32_t
)0x00004000è

	)

4892 

	#FSMC_BWTR1_DATAST_7
 ((
ušt32_t
)0x00008000è

	)

4894 

	#FSMC_BWTR1_CLKDIV
 ((
ušt32_t
)0x00F00000è

	)

4895 

	#FSMC_BWTR1_CLKDIV_0
 ((
ušt32_t
)0x00100000è

	)

4896 

	#FSMC_BWTR1_CLKDIV_1
 ((
ušt32_t
)0x00200000è

	)

4897 

	#FSMC_BWTR1_CLKDIV_2
 ((
ušt32_t
)0x00400000è

	)

4898 

	#FSMC_BWTR1_CLKDIV_3
 ((
ušt32_t
)0x00800000è

	)

4900 

	#FSMC_BWTR1_DATLAT
 ((
ušt32_t
)0x0F000000è

	)

4901 

	#FSMC_BWTR1_DATLAT_0
 ((
ušt32_t
)0x01000000è

	)

4902 

	#FSMC_BWTR1_DATLAT_1
 ((
ušt32_t
)0x02000000è

	)

4903 

	#FSMC_BWTR1_DATLAT_2
 ((
ušt32_t
)0x04000000è

	)

4904 

	#FSMC_BWTR1_DATLAT_3
 ((
ušt32_t
)0x08000000è

	)

4906 

	#FSMC_BWTR1_ACCMOD
 ((
ušt32_t
)0x30000000è

	)

4907 

	#FSMC_BWTR1_ACCMOD_0
 ((
ušt32_t
)0x10000000è

	)

4908 

	#FSMC_BWTR1_ACCMOD_1
 ((
ušt32_t
)0x20000000è

	)

4911 

	#FSMC_BWTR2_ADDSET
 ((
ušt32_t
)0x0000000Fè

	)

4912 

	#FSMC_BWTR2_ADDSET_0
 ((
ušt32_t
)0x00000001è

	)

4913 

	#FSMC_BWTR2_ADDSET_1
 ((
ušt32_t
)0x00000002è

	)

4914 

	#FSMC_BWTR2_ADDSET_2
 ((
ušt32_t
)0x00000004è

	)

4915 

	#FSMC_BWTR2_ADDSET_3
 ((
ušt32_t
)0x00000008è

	)

4917 

	#FSMC_BWTR2_ADDHLD
 ((
ušt32_t
)0x000000F0è

	)

4918 

	#FSMC_BWTR2_ADDHLD_0
 ((
ušt32_t
)0x00000010è

	)

4919 

	#FSMC_BWTR2_ADDHLD_1
 ((
ušt32_t
)0x00000020è

	)

4920 

	#FSMC_BWTR2_ADDHLD_2
 ((
ušt32_t
)0x00000040è

	)

4921 

	#FSMC_BWTR2_ADDHLD_3
 ((
ušt32_t
)0x00000080è

	)

4923 

	#FSMC_BWTR2_DATAST
 ((
ušt32_t
)0x0000FF00è

	)

4924 

	#FSMC_BWTR2_DATAST_0
 ((
ušt32_t
)0x00000100è

	)

4925 

	#FSMC_BWTR2_DATAST_1
 ((
ušt32_t
)0x00000200è

	)

4926 

	#FSMC_BWTR2_DATAST_2
 ((
ušt32_t
)0x00000400è

	)

4927 

	#FSMC_BWTR2_DATAST_3
 ((
ušt32_t
)0x00000800è

	)

4928 

	#FSMC_BWTR2_DATAST_4
 ((
ušt32_t
)0x00001000è

	)

4929 

	#FSMC_BWTR2_DATAST_5
 ((
ušt32_t
)0x00002000è

	)

4930 

	#FSMC_BWTR2_DATAST_6
 ((
ušt32_t
)0x00004000è

	)

4931 

	#FSMC_BWTR2_DATAST_7
 ((
ušt32_t
)0x00008000è

	)

4933 

	#FSMC_BWTR2_CLKDIV
 ((
ušt32_t
)0x00F00000è

	)

4934 

	#FSMC_BWTR2_CLKDIV_0
 ((
ušt32_t
)0x00100000è

	)

4935 

	#FSMC_BWTR2_CLKDIV_1
 ((
ušt32_t
)0x00200000è

	)

4936 

	#FSMC_BWTR2_CLKDIV_2
 ((
ušt32_t
)0x00400000è

	)

4937 

	#FSMC_BWTR2_CLKDIV_3
 ((
ušt32_t
)0x00800000è

	)

4939 

	#FSMC_BWTR2_DATLAT
 ((
ušt32_t
)0x0F000000è

	)

4940 

	#FSMC_BWTR2_DATLAT_0
 ((
ušt32_t
)0x01000000è

	)

4941 

	#FSMC_BWTR2_DATLAT_1
 ((
ušt32_t
)0x02000000è

	)

4942 

	#FSMC_BWTR2_DATLAT_2
 ((
ušt32_t
)0x04000000è

	)

4943 

	#FSMC_BWTR2_DATLAT_3
 ((
ušt32_t
)0x08000000è

	)

4945 

	#FSMC_BWTR2_ACCMOD
 ((
ušt32_t
)0x30000000è

	)

4946 

	#FSMC_BWTR2_ACCMOD_0
 ((
ušt32_t
)0x10000000è

	)

4947 

	#FSMC_BWTR2_ACCMOD_1
 ((
ušt32_t
)0x20000000è

	)

4950 

	#FSMC_BWTR3_ADDSET
 ((
ušt32_t
)0x0000000Fè

	)

4951 

	#FSMC_BWTR3_ADDSET_0
 ((
ušt32_t
)0x00000001è

	)

4952 

	#FSMC_BWTR3_ADDSET_1
 ((
ušt32_t
)0x00000002è

	)

4953 

	#FSMC_BWTR3_ADDSET_2
 ((
ušt32_t
)0x00000004è

	)

4954 

	#FSMC_BWTR3_ADDSET_3
 ((
ušt32_t
)0x00000008è

	)

4956 

	#FSMC_BWTR3_ADDHLD
 ((
ušt32_t
)0x000000F0è

	)

4957 

	#FSMC_BWTR3_ADDHLD_0
 ((
ušt32_t
)0x00000010è

	)

4958 

	#FSMC_BWTR3_ADDHLD_1
 ((
ušt32_t
)0x00000020è

	)

4959 

	#FSMC_BWTR3_ADDHLD_2
 ((
ušt32_t
)0x00000040è

	)

4960 

	#FSMC_BWTR3_ADDHLD_3
 ((
ušt32_t
)0x00000080è

	)

4962 

	#FSMC_BWTR3_DATAST
 ((
ušt32_t
)0x0000FF00è

	)

4963 

	#FSMC_BWTR3_DATAST_0
 ((
ušt32_t
)0x00000100è

	)

4964 

	#FSMC_BWTR3_DATAST_1
 ((
ušt32_t
)0x00000200è

	)

4965 

	#FSMC_BWTR3_DATAST_2
 ((
ušt32_t
)0x00000400è

	)

4966 

	#FSMC_BWTR3_DATAST_3
 ((
ušt32_t
)0x00000800è

	)

4967 

	#FSMC_BWTR3_DATAST_4
 ((
ušt32_t
)0x00001000è

	)

4968 

	#FSMC_BWTR3_DATAST_5
 ((
ušt32_t
)0x00002000è

	)

4969 

	#FSMC_BWTR3_DATAST_6
 ((
ušt32_t
)0x00004000è

	)

4970 

	#FSMC_BWTR3_DATAST_7
 ((
ušt32_t
)0x00008000è

	)

4972 

	#FSMC_BWTR3_CLKDIV
 ((
ušt32_t
)0x00F00000è

	)

4973 

	#FSMC_BWTR3_CLKDIV_0
 ((
ušt32_t
)0x00100000è

	)

4974 

	#FSMC_BWTR3_CLKDIV_1
 ((
ušt32_t
)0x00200000è

	)

4975 

	#FSMC_BWTR3_CLKDIV_2
 ((
ušt32_t
)0x00400000è

	)

4976 

	#FSMC_BWTR3_CLKDIV_3
 ((
ušt32_t
)0x00800000è

	)

4978 

	#FSMC_BWTR3_DATLAT
 ((
ušt32_t
)0x0F000000è

	)

4979 

	#FSMC_BWTR3_DATLAT_0
 ((
ušt32_t
)0x01000000è

	)

4980 

	#FSMC_BWTR3_DATLAT_1
 ((
ušt32_t
)0x02000000è

	)

4981 

	#FSMC_BWTR3_DATLAT_2
 ((
ušt32_t
)0x04000000è

	)

4982 

	#FSMC_BWTR3_DATLAT_3
 ((
ušt32_t
)0x08000000è

	)

4984 

	#FSMC_BWTR3_ACCMOD
 ((
ušt32_t
)0x30000000è

	)

4985 

	#FSMC_BWTR3_ACCMOD_0
 ((
ušt32_t
)0x10000000è

	)

4986 

	#FSMC_BWTR3_ACCMOD_1
 ((
ušt32_t
)0x20000000è

	)

4989 

	#FSMC_BWTR4_ADDSET
 ((
ušt32_t
)0x0000000Fè

	)

4990 

	#FSMC_BWTR4_ADDSET_0
 ((
ušt32_t
)0x00000001è

	)

4991 

	#FSMC_BWTR4_ADDSET_1
 ((
ušt32_t
)0x00000002è

	)

4992 

	#FSMC_BWTR4_ADDSET_2
 ((
ušt32_t
)0x00000004è

	)

4993 

	#FSMC_BWTR4_ADDSET_3
 ((
ušt32_t
)0x00000008è

	)

4995 

	#FSMC_BWTR4_ADDHLD
 ((
ušt32_t
)0x000000F0è

	)

4996 

	#FSMC_BWTR4_ADDHLD_0
 ((
ušt32_t
)0x00000010è

	)

4997 

	#FSMC_BWTR4_ADDHLD_1
 ((
ušt32_t
)0x00000020è

	)

4998 

	#FSMC_BWTR4_ADDHLD_2
 ((
ušt32_t
)0x00000040è

	)

4999 

	#FSMC_BWTR4_ADDHLD_3
 ((
ušt32_t
)0x00000080è

	)

5001 

	#FSMC_BWTR4_DATAST
 ((
ušt32_t
)0x0000FF00è

	)

5002 

	#FSMC_BWTR4_DATAST_0
 ((
ušt32_t
)0x00000100è

	)

5003 

	#FSMC_BWTR4_DATAST_1
 ((
ušt32_t
)0x00000200è

	)

5004 

	#FSMC_BWTR4_DATAST_2
 ((
ušt32_t
)0x00000400è

	)

5005 

	#FSMC_BWTR4_DATAST_3
 ((
ušt32_t
)0x00000800è

	)

5006 

	#FSMC_BWTR4_DATAST_4
 ((
ušt32_t
)0x00001000è

	)

5007 

	#FSMC_BWTR4_DATAST_5
 ((
ušt32_t
)0x00002000è

	)

5008 

	#FSMC_BWTR4_DATAST_6
 ((
ušt32_t
)0x00004000è

	)

5009 

	#FSMC_BWTR4_DATAST_7
 ((
ušt32_t
)0x00008000è

	)

5011 

	#FSMC_BWTR4_CLKDIV
 ((
ušt32_t
)0x00F00000è

	)

5012 

	#FSMC_BWTR4_CLKDIV_0
 ((
ušt32_t
)0x00100000è

	)

5013 

	#FSMC_BWTR4_CLKDIV_1
 ((
ušt32_t
)0x00200000è

	)

5014 

	#FSMC_BWTR4_CLKDIV_2
 ((
ušt32_t
)0x00400000è

	)

5015 

	#FSMC_BWTR4_CLKDIV_3
 ((
ušt32_t
)0x00800000è

	)

5017 

	#FSMC_BWTR4_DATLAT
 ((
ušt32_t
)0x0F000000è

	)

5018 

	#FSMC_BWTR4_DATLAT_0
 ((
ušt32_t
)0x01000000è

	)

5019 

	#FSMC_BWTR4_DATLAT_1
 ((
ušt32_t
)0x02000000è

	)

5020 

	#FSMC_BWTR4_DATLAT_2
 ((
ušt32_t
)0x04000000è

	)

5021 

	#FSMC_BWTR4_DATLAT_3
 ((
ušt32_t
)0x08000000è

	)

5023 

	#FSMC_BWTR4_ACCMOD
 ((
ušt32_t
)0x30000000è

	)

5024 

	#FSMC_BWTR4_ACCMOD_0
 ((
ušt32_t
)0x10000000è

	)

5025 

	#FSMC_BWTR4_ACCMOD_1
 ((
ušt32_t
)0x20000000è

	)

5028 

	#FSMC_PCR2_PWAITEN
 ((
ušt32_t
)0x00000002è

	)

5029 

	#FSMC_PCR2_PBKEN
 ((
ušt32_t
)0x00000004è

	)

5030 

	#FSMC_PCR2_PTYP
 ((
ušt32_t
)0x00000008è

	)

5032 

	#FSMC_PCR2_PWID
 ((
ušt32_t
)0x00000030è

	)

5033 

	#FSMC_PCR2_PWID_0
 ((
ušt32_t
)0x00000010è

	)

5034 

	#FSMC_PCR2_PWID_1
 ((
ušt32_t
)0x00000020è

	)

5036 

	#FSMC_PCR2_ECCEN
 ((
ušt32_t
)0x00000040è

	)

5038 

	#FSMC_PCR2_TCLR
 ((
ušt32_t
)0x00001E00è

	)

5039 

	#FSMC_PCR2_TCLR_0
 ((
ušt32_t
)0x00000200è

	)

5040 

	#FSMC_PCR2_TCLR_1
 ((
ušt32_t
)0x00000400è

	)

5041 

	#FSMC_PCR2_TCLR_2
 ((
ušt32_t
)0x00000800è

	)

5042 

	#FSMC_PCR2_TCLR_3
 ((
ušt32_t
)0x00001000è

	)

5044 

	#FSMC_PCR2_TAR
 ((
ušt32_t
)0x0001E000è

	)

5045 

	#FSMC_PCR2_TAR_0
 ((
ušt32_t
)0x00002000è

	)

5046 

	#FSMC_PCR2_TAR_1
 ((
ušt32_t
)0x00004000è

	)

5047 

	#FSMC_PCR2_TAR_2
 ((
ušt32_t
)0x00008000è

	)

5048 

	#FSMC_PCR2_TAR_3
 ((
ušt32_t
)0x00010000è

	)

5050 

	#FSMC_PCR2_ECCPS
 ((
ušt32_t
)0x000E0000è

	)

5051 

	#FSMC_PCR2_ECCPS_0
 ((
ušt32_t
)0x00020000è

	)

5052 

	#FSMC_PCR2_ECCPS_1
 ((
ušt32_t
)0x00040000è

	)

5053 

	#FSMC_PCR2_ECCPS_2
 ((
ušt32_t
)0x00080000è

	)

5056 

	#FSMC_PCR3_PWAITEN
 ((
ušt32_t
)0x00000002è

	)

5057 

	#FSMC_PCR3_PBKEN
 ((
ušt32_t
)0x00000004è

	)

5058 

	#FSMC_PCR3_PTYP
 ((
ušt32_t
)0x00000008è

	)

5060 

	#FSMC_PCR3_PWID
 ((
ušt32_t
)0x00000030è

	)

5061 

	#FSMC_PCR3_PWID_0
 ((
ušt32_t
)0x00000010è

	)

5062 

	#FSMC_PCR3_PWID_1
 ((
ušt32_t
)0x00000020è

	)

5064 

	#FSMC_PCR3_ECCEN
 ((
ušt32_t
)0x00000040è

	)

5066 

	#FSMC_PCR3_TCLR
 ((
ušt32_t
)0x00001E00è

	)

5067 

	#FSMC_PCR3_TCLR_0
 ((
ušt32_t
)0x00000200è

	)

5068 

	#FSMC_PCR3_TCLR_1
 ((
ušt32_t
)0x00000400è

	)

5069 

	#FSMC_PCR3_TCLR_2
 ((
ušt32_t
)0x00000800è

	)

5070 

	#FSMC_PCR3_TCLR_3
 ((
ušt32_t
)0x00001000è

	)

5072 

	#FSMC_PCR3_TAR
 ((
ušt32_t
)0x0001E000è

	)

5073 

	#FSMC_PCR3_TAR_0
 ((
ušt32_t
)0x00002000è

	)

5074 

	#FSMC_PCR3_TAR_1
 ((
ušt32_t
)0x00004000è

	)

5075 

	#FSMC_PCR3_TAR_2
 ((
ušt32_t
)0x00008000è

	)

5076 

	#FSMC_PCR3_TAR_3
 ((
ušt32_t
)0x00010000è

	)

5078 

	#FSMC_PCR3_ECCPS
 ((
ušt32_t
)0x000E0000è

	)

5079 

	#FSMC_PCR3_ECCPS_0
 ((
ušt32_t
)0x00020000è

	)

5080 

	#FSMC_PCR3_ECCPS_1
 ((
ušt32_t
)0x00040000è

	)

5081 

	#FSMC_PCR3_ECCPS_2
 ((
ušt32_t
)0x00080000è

	)

5084 

	#FSMC_PCR4_PWAITEN
 ((
ušt32_t
)0x00000002è

	)

5085 

	#FSMC_PCR4_PBKEN
 ((
ušt32_t
)0x00000004è

	)

5086 

	#FSMC_PCR4_PTYP
 ((
ušt32_t
)0x00000008è

	)

5088 

	#FSMC_PCR4_PWID
 ((
ušt32_t
)0x00000030è

	)

5089 

	#FSMC_PCR4_PWID_0
 ((
ušt32_t
)0x00000010è

	)

5090 

	#FSMC_PCR4_PWID_1
 ((
ušt32_t
)0x00000020è

	)

5092 

	#FSMC_PCR4_ECCEN
 ((
ušt32_t
)0x00000040è

	)

5094 

	#FSMC_PCR4_TCLR
 ((
ušt32_t
)0x00001E00è

	)

5095 

	#FSMC_PCR4_TCLR_0
 ((
ušt32_t
)0x00000200è

	)

5096 

	#FSMC_PCR4_TCLR_1
 ((
ušt32_t
)0x00000400è

	)

5097 

	#FSMC_PCR4_TCLR_2
 ((
ušt32_t
)0x00000800è

	)

5098 

	#FSMC_PCR4_TCLR_3
 ((
ušt32_t
)0x00001000è

	)

5100 

	#FSMC_PCR4_TAR
 ((
ušt32_t
)0x0001E000è

	)

5101 

	#FSMC_PCR4_TAR_0
 ((
ušt32_t
)0x00002000è

	)

5102 

	#FSMC_PCR4_TAR_1
 ((
ušt32_t
)0x00004000è

	)

5103 

	#FSMC_PCR4_TAR_2
 ((
ušt32_t
)0x00008000è

	)

5104 

	#FSMC_PCR4_TAR_3
 ((
ušt32_t
)0x00010000è

	)

5106 

	#FSMC_PCR4_ECCPS
 ((
ušt32_t
)0x000E0000è

	)

5107 

	#FSMC_PCR4_ECCPS_0
 ((
ušt32_t
)0x00020000è

	)

5108 

	#FSMC_PCR4_ECCPS_1
 ((
ušt32_t
)0x00040000è

	)

5109 

	#FSMC_PCR4_ECCPS_2
 ((
ušt32_t
)0x00080000è

	)

5112 

	#FSMC_SR2_IRS
 ((
ušt8_t
)0x01è

	)

5113 

	#FSMC_SR2_ILS
 ((
ušt8_t
)0x02è

	)

5114 

	#FSMC_SR2_IFS
 ((
ušt8_t
)0x04è

	)

5115 

	#FSMC_SR2_IREN
 ((
ušt8_t
)0x08è

	)

5116 

	#FSMC_SR2_ILEN
 ((
ušt8_t
)0x10è

	)

5117 

	#FSMC_SR2_IFEN
 ((
ušt8_t
)0x20è

	)

5118 

	#FSMC_SR2_FEMPT
 ((
ušt8_t
)0x40è

	)

5121 

	#FSMC_SR3_IRS
 ((
ušt8_t
)0x01è

	)

5122 

	#FSMC_SR3_ILS
 ((
ušt8_t
)0x02è

	)

5123 

	#FSMC_SR3_IFS
 ((
ušt8_t
)0x04è

	)

5124 

	#FSMC_SR3_IREN
 ((
ušt8_t
)0x08è

	)

5125 

	#FSMC_SR3_ILEN
 ((
ušt8_t
)0x10è

	)

5126 

	#FSMC_SR3_IFEN
 ((
ušt8_t
)0x20è

	)

5127 

	#FSMC_SR3_FEMPT
 ((
ušt8_t
)0x40è

	)

5130 

	#FSMC_SR4_IRS
 ((
ušt8_t
)0x01è

	)

5131 

	#FSMC_SR4_ILS
 ((
ušt8_t
)0x02è

	)

5132 

	#FSMC_SR4_IFS
 ((
ušt8_t
)0x04è

	)

5133 

	#FSMC_SR4_IREN
 ((
ušt8_t
)0x08è

	)

5134 

	#FSMC_SR4_ILEN
 ((
ušt8_t
)0x10è

	)

5135 

	#FSMC_SR4_IFEN
 ((
ušt8_t
)0x20è

	)

5136 

	#FSMC_SR4_FEMPT
 ((
ušt8_t
)0x40è

	)

5139 

	#FSMC_PMEM2_MEMSET2
 ((
ušt32_t
)0x000000FFè

	)

5140 

	#FSMC_PMEM2_MEMSET2_0
 ((
ušt32_t
)0x00000001è

	)

5141 

	#FSMC_PMEM2_MEMSET2_1
 ((
ušt32_t
)0x00000002è

	)

5142 

	#FSMC_PMEM2_MEMSET2_2
 ((
ušt32_t
)0x00000004è

	)

5143 

	#FSMC_PMEM2_MEMSET2_3
 ((
ušt32_t
)0x00000008è

	)

5144 

	#FSMC_PMEM2_MEMSET2_4
 ((
ušt32_t
)0x00000010è

	)

5145 

	#FSMC_PMEM2_MEMSET2_5
 ((
ušt32_t
)0x00000020è

	)

5146 

	#FSMC_PMEM2_MEMSET2_6
 ((
ušt32_t
)0x00000040è

	)

5147 

	#FSMC_PMEM2_MEMSET2_7
 ((
ušt32_t
)0x00000080è

	)

5149 

	#FSMC_PMEM2_MEMWAIT2
 ((
ušt32_t
)0x0000FF00è

	)

5150 

	#FSMC_PMEM2_MEMWAIT2_0
 ((
ušt32_t
)0x00000100è

	)

5151 

	#FSMC_PMEM2_MEMWAIT2_1
 ((
ušt32_t
)0x00000200è

	)

5152 

	#FSMC_PMEM2_MEMWAIT2_2
 ((
ušt32_t
)0x00000400è

	)

5153 

	#FSMC_PMEM2_MEMWAIT2_3
 ((
ušt32_t
)0x00000800è

	)

5154 

	#FSMC_PMEM2_MEMWAIT2_4
 ((
ušt32_t
)0x00001000è

	)

5155 

	#FSMC_PMEM2_MEMWAIT2_5
 ((
ušt32_t
)0x00002000è

	)

5156 

	#FSMC_PMEM2_MEMWAIT2_6
 ((
ušt32_t
)0x00004000è

	)

5157 

	#FSMC_PMEM2_MEMWAIT2_7
 ((
ušt32_t
)0x00008000è

	)

5159 

	#FSMC_PMEM2_MEMHOLD2
 ((
ušt32_t
)0x00FF0000è

	)

5160 

	#FSMC_PMEM2_MEMHOLD2_0
 ((
ušt32_t
)0x00010000è

	)

5161 

	#FSMC_PMEM2_MEMHOLD2_1
 ((
ušt32_t
)0x00020000è

	)

5162 

	#FSMC_PMEM2_MEMHOLD2_2
 ((
ušt32_t
)0x00040000è

	)

5163 

	#FSMC_PMEM2_MEMHOLD2_3
 ((
ušt32_t
)0x00080000è

	)

5164 

	#FSMC_PMEM2_MEMHOLD2_4
 ((
ušt32_t
)0x00100000è

	)

5165 

	#FSMC_PMEM2_MEMHOLD2_5
 ((
ušt32_t
)0x00200000è

	)

5166 

	#FSMC_PMEM2_MEMHOLD2_6
 ((
ušt32_t
)0x00400000è

	)

5167 

	#FSMC_PMEM2_MEMHOLD2_7
 ((
ušt32_t
)0x00800000è

	)

5169 

	#FSMC_PMEM2_MEMHIZ2
 ((
ušt32_t
)0xFF000000è

	)

5170 

	#FSMC_PMEM2_MEMHIZ2_0
 ((
ušt32_t
)0x01000000è

	)

5171 

	#FSMC_PMEM2_MEMHIZ2_1
 ((
ušt32_t
)0x02000000è

	)

5172 

	#FSMC_PMEM2_MEMHIZ2_2
 ((
ušt32_t
)0x04000000è

	)

5173 

	#FSMC_PMEM2_MEMHIZ2_3
 ((
ušt32_t
)0x08000000è

	)

5174 

	#FSMC_PMEM2_MEMHIZ2_4
 ((
ušt32_t
)0x10000000è

	)

5175 

	#FSMC_PMEM2_MEMHIZ2_5
 ((
ušt32_t
)0x20000000è

	)

5176 

	#FSMC_PMEM2_MEMHIZ2_6
 ((
ušt32_t
)0x40000000è

	)

5177 

	#FSMC_PMEM2_MEMHIZ2_7
 ((
ušt32_t
)0x80000000è

	)

5180 

	#FSMC_PMEM3_MEMSET3
 ((
ušt32_t
)0x000000FFè

	)

5181 

	#FSMC_PMEM3_MEMSET3_0
 ((
ušt32_t
)0x00000001è

	)

5182 

	#FSMC_PMEM3_MEMSET3_1
 ((
ušt32_t
)0x00000002è

	)

5183 

	#FSMC_PMEM3_MEMSET3_2
 ((
ušt32_t
)0x00000004è

	)

5184 

	#FSMC_PMEM3_MEMSET3_3
 ((
ušt32_t
)0x00000008è

	)

5185 

	#FSMC_PMEM3_MEMSET3_4
 ((
ušt32_t
)0x00000010è

	)

5186 

	#FSMC_PMEM3_MEMSET3_5
 ((
ušt32_t
)0x00000020è

	)

5187 

	#FSMC_PMEM3_MEMSET3_6
 ((
ušt32_t
)0x00000040è

	)

5188 

	#FSMC_PMEM3_MEMSET3_7
 ((
ušt32_t
)0x00000080è

	)

5190 

	#FSMC_PMEM3_MEMWAIT3
 ((
ušt32_t
)0x0000FF00è

	)

5191 

	#FSMC_PMEM3_MEMWAIT3_0
 ((
ušt32_t
)0x00000100è

	)

5192 

	#FSMC_PMEM3_MEMWAIT3_1
 ((
ušt32_t
)0x00000200è

	)

5193 

	#FSMC_PMEM3_MEMWAIT3_2
 ((
ušt32_t
)0x00000400è

	)

5194 

	#FSMC_PMEM3_MEMWAIT3_3
 ((
ušt32_t
)0x00000800è

	)

5195 

	#FSMC_PMEM3_MEMWAIT3_4
 ((
ušt32_t
)0x00001000è

	)

5196 

	#FSMC_PMEM3_MEMWAIT3_5
 ((
ušt32_t
)0x00002000è

	)

5197 

	#FSMC_PMEM3_MEMWAIT3_6
 ((
ušt32_t
)0x00004000è

	)

5198 

	#FSMC_PMEM3_MEMWAIT3_7
 ((
ušt32_t
)0x00008000è

	)

5200 

	#FSMC_PMEM3_MEMHOLD3
 ((
ušt32_t
)0x00FF0000è

	)

5201 

	#FSMC_PMEM3_MEMHOLD3_0
 ((
ušt32_t
)0x00010000è

	)

5202 

	#FSMC_PMEM3_MEMHOLD3_1
 ((
ušt32_t
)0x00020000è

	)

5203 

	#FSMC_PMEM3_MEMHOLD3_2
 ((
ušt32_t
)0x00040000è

	)

5204 

	#FSMC_PMEM3_MEMHOLD3_3
 ((
ušt32_t
)0x00080000è

	)

5205 

	#FSMC_PMEM3_MEMHOLD3_4
 ((
ušt32_t
)0x00100000è

	)

5206 

	#FSMC_PMEM3_MEMHOLD3_5
 ((
ušt32_t
)0x00200000è

	)

5207 

	#FSMC_PMEM3_MEMHOLD3_6
 ((
ušt32_t
)0x00400000è

	)

5208 

	#FSMC_PMEM3_MEMHOLD3_7
 ((
ušt32_t
)0x00800000è

	)

5210 

	#FSMC_PMEM3_MEMHIZ3
 ((
ušt32_t
)0xFF000000è

	)

5211 

	#FSMC_PMEM3_MEMHIZ3_0
 ((
ušt32_t
)0x01000000è

	)

5212 

	#FSMC_PMEM3_MEMHIZ3_1
 ((
ušt32_t
)0x02000000è

	)

5213 

	#FSMC_PMEM3_MEMHIZ3_2
 ((
ušt32_t
)0x04000000è

	)

5214 

	#FSMC_PMEM3_MEMHIZ3_3
 ((
ušt32_t
)0x08000000è

	)

5215 

	#FSMC_PMEM3_MEMHIZ3_4
 ((
ušt32_t
)0x10000000è

	)

5216 

	#FSMC_PMEM3_MEMHIZ3_5
 ((
ušt32_t
)0x20000000è

	)

5217 

	#FSMC_PMEM3_MEMHIZ3_6
 ((
ušt32_t
)0x40000000è

	)

5218 

	#FSMC_PMEM3_MEMHIZ3_7
 ((
ušt32_t
)0x80000000è

	)

5221 

	#FSMC_PMEM4_MEMSET4
 ((
ušt32_t
)0x000000FFè

	)

5222 

	#FSMC_PMEM4_MEMSET4_0
 ((
ušt32_t
)0x00000001è

	)

5223 

	#FSMC_PMEM4_MEMSET4_1
 ((
ušt32_t
)0x00000002è

	)

5224 

	#FSMC_PMEM4_MEMSET4_2
 ((
ušt32_t
)0x00000004è

	)

5225 

	#FSMC_PMEM4_MEMSET4_3
 ((
ušt32_t
)0x00000008è

	)

5226 

	#FSMC_PMEM4_MEMSET4_4
 ((
ušt32_t
)0x00000010è

	)

5227 

	#FSMC_PMEM4_MEMSET4_5
 ((
ušt32_t
)0x00000020è

	)

5228 

	#FSMC_PMEM4_MEMSET4_6
 ((
ušt32_t
)0x00000040è

	)

5229 

	#FSMC_PMEM4_MEMSET4_7
 ((
ušt32_t
)0x00000080è

	)

5231 

	#FSMC_PMEM4_MEMWAIT4
 ((
ušt32_t
)0x0000FF00è

	)

5232 

	#FSMC_PMEM4_MEMWAIT4_0
 ((
ušt32_t
)0x00000100è

	)

5233 

	#FSMC_PMEM4_MEMWAIT4_1
 ((
ušt32_t
)0x00000200è

	)

5234 

	#FSMC_PMEM4_MEMWAIT4_2
 ((
ušt32_t
)0x00000400è

	)

5235 

	#FSMC_PMEM4_MEMWAIT4_3
 ((
ušt32_t
)0x00000800è

	)

5236 

	#FSMC_PMEM4_MEMWAIT4_4
 ((
ušt32_t
)0x00001000è

	)

5237 

	#FSMC_PMEM4_MEMWAIT4_5
 ((
ušt32_t
)0x00002000è

	)

5238 

	#FSMC_PMEM4_MEMWAIT4_6
 ((
ušt32_t
)0x00004000è

	)

5239 

	#FSMC_PMEM4_MEMWAIT4_7
 ((
ušt32_t
)0x00008000è

	)

5241 

	#FSMC_PMEM4_MEMHOLD4
 ((
ušt32_t
)0x00FF0000è

	)

5242 

	#FSMC_PMEM4_MEMHOLD4_0
 ((
ušt32_t
)0x00010000è

	)

5243 

	#FSMC_PMEM4_MEMHOLD4_1
 ((
ušt32_t
)0x00020000è

	)

5244 

	#FSMC_PMEM4_MEMHOLD4_2
 ((
ušt32_t
)0x00040000è

	)

5245 

	#FSMC_PMEM4_MEMHOLD4_3
 ((
ušt32_t
)0x00080000è

	)

5246 

	#FSMC_PMEM4_MEMHOLD4_4
 ((
ušt32_t
)0x00100000è

	)

5247 

	#FSMC_PMEM4_MEMHOLD4_5
 ((
ušt32_t
)0x00200000è

	)

5248 

	#FSMC_PMEM4_MEMHOLD4_6
 ((
ušt32_t
)0x00400000è

	)

5249 

	#FSMC_PMEM4_MEMHOLD4_7
 ((
ušt32_t
)0x00800000è

	)

5251 

	#FSMC_PMEM4_MEMHIZ4
 ((
ušt32_t
)0xFF000000è

	)

5252 

	#FSMC_PMEM4_MEMHIZ4_0
 ((
ušt32_t
)0x01000000è

	)

5253 

	#FSMC_PMEM4_MEMHIZ4_1
 ((
ušt32_t
)0x02000000è

	)

5254 

	#FSMC_PMEM4_MEMHIZ4_2
 ((
ušt32_t
)0x04000000è

	)

5255 

	#FSMC_PMEM4_MEMHIZ4_3
 ((
ušt32_t
)0x08000000è

	)

5256 

	#FSMC_PMEM4_MEMHIZ4_4
 ((
ušt32_t
)0x10000000è

	)

5257 

	#FSMC_PMEM4_MEMHIZ4_5
 ((
ušt32_t
)0x20000000è

	)

5258 

	#FSMC_PMEM4_MEMHIZ4_6
 ((
ušt32_t
)0x40000000è

	)

5259 

	#FSMC_PMEM4_MEMHIZ4_7
 ((
ušt32_t
)0x80000000è

	)

5262 

	#FSMC_PATT2_ATTSET2
 ((
ušt32_t
)0x000000FFè

	)

5263 

	#FSMC_PATT2_ATTSET2_0
 ((
ušt32_t
)0x00000001è

	)

5264 

	#FSMC_PATT2_ATTSET2_1
 ((
ušt32_t
)0x00000002è

	)

5265 

	#FSMC_PATT2_ATTSET2_2
 ((
ušt32_t
)0x00000004è

	)

5266 

	#FSMC_PATT2_ATTSET2_3
 ((
ušt32_t
)0x00000008è

	)

5267 

	#FSMC_PATT2_ATTSET2_4
 ((
ušt32_t
)0x00000010è

	)

5268 

	#FSMC_PATT2_ATTSET2_5
 ((
ušt32_t
)0x00000020è

	)

5269 

	#FSMC_PATT2_ATTSET2_6
 ((
ušt32_t
)0x00000040è

	)

5270 

	#FSMC_PATT2_ATTSET2_7
 ((
ušt32_t
)0x00000080è

	)

5272 

	#FSMC_PATT2_ATTWAIT2
 ((
ušt32_t
)0x0000FF00è

	)

5273 

	#FSMC_PATT2_ATTWAIT2_0
 ((
ušt32_t
)0x00000100è

	)

5274 

	#FSMC_PATT2_ATTWAIT2_1
 ((
ušt32_t
)0x00000200è

	)

5275 

	#FSMC_PATT2_ATTWAIT2_2
 ((
ušt32_t
)0x00000400è

	)

5276 

	#FSMC_PATT2_ATTWAIT2_3
 ((
ušt32_t
)0x00000800è

	)

5277 

	#FSMC_PATT2_ATTWAIT2_4
 ((
ušt32_t
)0x00001000è

	)

5278 

	#FSMC_PATT2_ATTWAIT2_5
 ((
ušt32_t
)0x00002000è

	)

5279 

	#FSMC_PATT2_ATTWAIT2_6
 ((
ušt32_t
)0x00004000è

	)

5280 

	#FSMC_PATT2_ATTWAIT2_7
 ((
ušt32_t
)0x00008000è

	)

5282 

	#FSMC_PATT2_ATTHOLD2
 ((
ušt32_t
)0x00FF0000è

	)

5283 

	#FSMC_PATT2_ATTHOLD2_0
 ((
ušt32_t
)0x00010000è

	)

5284 

	#FSMC_PATT2_ATTHOLD2_1
 ((
ušt32_t
)0x00020000è

	)

5285 

	#FSMC_PATT2_ATTHOLD2_2
 ((
ušt32_t
)0x00040000è

	)

5286 

	#FSMC_PATT2_ATTHOLD2_3
 ((
ušt32_t
)0x00080000è

	)

5287 

	#FSMC_PATT2_ATTHOLD2_4
 ((
ušt32_t
)0x00100000è

	)

5288 

	#FSMC_PATT2_ATTHOLD2_5
 ((
ušt32_t
)0x00200000è

	)

5289 

	#FSMC_PATT2_ATTHOLD2_6
 ((
ušt32_t
)0x00400000è

	)

5290 

	#FSMC_PATT2_ATTHOLD2_7
 ((
ušt32_t
)0x00800000è

	)

5292 

	#FSMC_PATT2_ATTHIZ2
 ((
ušt32_t
)0xFF000000è

	)

5293 

	#FSMC_PATT2_ATTHIZ2_0
 ((
ušt32_t
)0x01000000è

	)

5294 

	#FSMC_PATT2_ATTHIZ2_1
 ((
ušt32_t
)0x02000000è

	)

5295 

	#FSMC_PATT2_ATTHIZ2_2
 ((
ušt32_t
)0x04000000è

	)

5296 

	#FSMC_PATT2_ATTHIZ2_3
 ((
ušt32_t
)0x08000000è

	)

5297 

	#FSMC_PATT2_ATTHIZ2_4
 ((
ušt32_t
)0x10000000è

	)

5298 

	#FSMC_PATT2_ATTHIZ2_5
 ((
ušt32_t
)0x20000000è

	)

5299 

	#FSMC_PATT2_ATTHIZ2_6
 ((
ušt32_t
)0x40000000è

	)

5300 

	#FSMC_PATT2_ATTHIZ2_7
 ((
ušt32_t
)0x80000000è

	)

5303 

	#FSMC_PATT3_ATTSET3
 ((
ušt32_t
)0x000000FFè

	)

5304 

	#FSMC_PATT3_ATTSET3_0
 ((
ušt32_t
)0x00000001è

	)

5305 

	#FSMC_PATT3_ATTSET3_1
 ((
ušt32_t
)0x00000002è

	)

5306 

	#FSMC_PATT3_ATTSET3_2
 ((
ušt32_t
)0x00000004è

	)

5307 

	#FSMC_PATT3_ATTSET3_3
 ((
ušt32_t
)0x00000008è

	)

5308 

	#FSMC_PATT3_ATTSET3_4
 ((
ušt32_t
)0x00000010è

	)

5309 

	#FSMC_PATT3_ATTSET3_5
 ((
ušt32_t
)0x00000020è

	)

5310 

	#FSMC_PATT3_ATTSET3_6
 ((
ušt32_t
)0x00000040è

	)

5311 

	#FSMC_PATT3_ATTSET3_7
 ((
ušt32_t
)0x00000080è

	)

5313 

	#FSMC_PATT3_ATTWAIT3
 ((
ušt32_t
)0x0000FF00è

	)

5314 

	#FSMC_PATT3_ATTWAIT3_0
 ((
ušt32_t
)0x00000100è

	)

5315 

	#FSMC_PATT3_ATTWAIT3_1
 ((
ušt32_t
)0x00000200è

	)

5316 

	#FSMC_PATT3_ATTWAIT3_2
 ((
ušt32_t
)0x00000400è

	)

5317 

	#FSMC_PATT3_ATTWAIT3_3
 ((
ušt32_t
)0x00000800è

	)

5318 

	#FSMC_PATT3_ATTWAIT3_4
 ((
ušt32_t
)0x00001000è

	)

5319 

	#FSMC_PATT3_ATTWAIT3_5
 ((
ušt32_t
)0x00002000è

	)

5320 

	#FSMC_PATT3_ATTWAIT3_6
 ((
ušt32_t
)0x00004000è

	)

5321 

	#FSMC_PATT3_ATTWAIT3_7
 ((
ušt32_t
)0x00008000è

	)

5323 

	#FSMC_PATT3_ATTHOLD3
 ((
ušt32_t
)0x00FF0000è

	)

5324 

	#FSMC_PATT3_ATTHOLD3_0
 ((
ušt32_t
)0x00010000è

	)

5325 

	#FSMC_PATT3_ATTHOLD3_1
 ((
ušt32_t
)0x00020000è

	)

5326 

	#FSMC_PATT3_ATTHOLD3_2
 ((
ušt32_t
)0x00040000è

	)

5327 

	#FSMC_PATT3_ATTHOLD3_3
 ((
ušt32_t
)0x00080000è

	)

5328 

	#FSMC_PATT3_ATTHOLD3_4
 ((
ušt32_t
)0x00100000è

	)

5329 

	#FSMC_PATT3_ATTHOLD3_5
 ((
ušt32_t
)0x00200000è

	)

5330 

	#FSMC_PATT3_ATTHOLD3_6
 ((
ušt32_t
)0x00400000è

	)

5331 

	#FSMC_PATT3_ATTHOLD3_7
 ((
ušt32_t
)0x00800000è

	)

5333 

	#FSMC_PATT3_ATTHIZ3
 ((
ušt32_t
)0xFF000000è

	)

5334 

	#FSMC_PATT3_ATTHIZ3_0
 ((
ušt32_t
)0x01000000è

	)

5335 

	#FSMC_PATT3_ATTHIZ3_1
 ((
ušt32_t
)0x02000000è

	)

5336 

	#FSMC_PATT3_ATTHIZ3_2
 ((
ušt32_t
)0x04000000è

	)

5337 

	#FSMC_PATT3_ATTHIZ3_3
 ((
ušt32_t
)0x08000000è

	)

5338 

	#FSMC_PATT3_ATTHIZ3_4
 ((
ušt32_t
)0x10000000è

	)

5339 

	#FSMC_PATT3_ATTHIZ3_5
 ((
ušt32_t
)0x20000000è

	)

5340 

	#FSMC_PATT3_ATTHIZ3_6
 ((
ušt32_t
)0x40000000è

	)

5341 

	#FSMC_PATT3_ATTHIZ3_7
 ((
ušt32_t
)0x80000000è

	)

5344 

	#FSMC_PATT4_ATTSET4
 ((
ušt32_t
)0x000000FFè

	)

5345 

	#FSMC_PATT4_ATTSET4_0
 ((
ušt32_t
)0x00000001è

	)

5346 

	#FSMC_PATT4_ATTSET4_1
 ((
ušt32_t
)0x00000002è

	)

5347 

	#FSMC_PATT4_ATTSET4_2
 ((
ušt32_t
)0x00000004è

	)

5348 

	#FSMC_PATT4_ATTSET4_3
 ((
ušt32_t
)0x00000008è

	)

5349 

	#FSMC_PATT4_ATTSET4_4
 ((
ušt32_t
)0x00000010è

	)

5350 

	#FSMC_PATT4_ATTSET4_5
 ((
ušt32_t
)0x00000020è

	)

5351 

	#FSMC_PATT4_ATTSET4_6
 ((
ušt32_t
)0x00000040è

	)

5352 

	#FSMC_PATT4_ATTSET4_7
 ((
ušt32_t
)0x00000080è

	)

5354 

	#FSMC_PATT4_ATTWAIT4
 ((
ušt32_t
)0x0000FF00è

	)

5355 

	#FSMC_PATT4_ATTWAIT4_0
 ((
ušt32_t
)0x00000100è

	)

5356 

	#FSMC_PATT4_ATTWAIT4_1
 ((
ušt32_t
)0x00000200è

	)

5357 

	#FSMC_PATT4_ATTWAIT4_2
 ((
ušt32_t
)0x00000400è

	)

5358 

	#FSMC_PATT4_ATTWAIT4_3
 ((
ušt32_t
)0x00000800è

	)

5359 

	#FSMC_PATT4_ATTWAIT4_4
 ((
ušt32_t
)0x00001000è

	)

5360 

	#FSMC_PATT4_ATTWAIT4_5
 ((
ušt32_t
)0x00002000è

	)

5361 

	#FSMC_PATT4_ATTWAIT4_6
 ((
ušt32_t
)0x00004000è

	)

5362 

	#FSMC_PATT4_ATTWAIT4_7
 ((
ušt32_t
)0x00008000è

	)

5364 

	#FSMC_PATT4_ATTHOLD4
 ((
ušt32_t
)0x00FF0000è

	)

5365 

	#FSMC_PATT4_ATTHOLD4_0
 ((
ušt32_t
)0x00010000è

	)

5366 

	#FSMC_PATT4_ATTHOLD4_1
 ((
ušt32_t
)0x00020000è

	)

5367 

	#FSMC_PATT4_ATTHOLD4_2
 ((
ušt32_t
)0x00040000è

	)

5368 

	#FSMC_PATT4_ATTHOLD4_3
 ((
ušt32_t
)0x00080000è

	)

5369 

	#FSMC_PATT4_ATTHOLD4_4
 ((
ušt32_t
)0x00100000è

	)

5370 

	#FSMC_PATT4_ATTHOLD4_5
 ((
ušt32_t
)0x00200000è

	)

5371 

	#FSMC_PATT4_ATTHOLD4_6
 ((
ušt32_t
)0x00400000è

	)

5372 

	#FSMC_PATT4_ATTHOLD4_7
 ((
ušt32_t
)0x00800000è

	)

5374 

	#FSMC_PATT4_ATTHIZ4
 ((
ušt32_t
)0xFF000000è

	)

5375 

	#FSMC_PATT4_ATTHIZ4_0
 ((
ušt32_t
)0x01000000è

	)

5376 

	#FSMC_PATT4_ATTHIZ4_1
 ((
ušt32_t
)0x02000000è

	)

5377 

	#FSMC_PATT4_ATTHIZ4_2
 ((
ušt32_t
)0x04000000è

	)

5378 

	#FSMC_PATT4_ATTHIZ4_3
 ((
ušt32_t
)0x08000000è

	)

5379 

	#FSMC_PATT4_ATTHIZ4_4
 ((
ušt32_t
)0x10000000è

	)

5380 

	#FSMC_PATT4_ATTHIZ4_5
 ((
ušt32_t
)0x20000000è

	)

5381 

	#FSMC_PATT4_ATTHIZ4_6
 ((
ušt32_t
)0x40000000è

	)

5382 

	#FSMC_PATT4_ATTHIZ4_7
 ((
ušt32_t
)0x80000000è

	)

5385 

	#FSMC_PIO4_IOSET4
 ((
ušt32_t
)0x000000FFè

	)

5386 

	#FSMC_PIO4_IOSET4_0
 ((
ušt32_t
)0x00000001è

	)

5387 

	#FSMC_PIO4_IOSET4_1
 ((
ušt32_t
)0x00000002è

	)

5388 

	#FSMC_PIO4_IOSET4_2
 ((
ušt32_t
)0x00000004è

	)

5389 

	#FSMC_PIO4_IOSET4_3
 ((
ušt32_t
)0x00000008è

	)

5390 

	#FSMC_PIO4_IOSET4_4
 ((
ušt32_t
)0x00000010è

	)

5391 

	#FSMC_PIO4_IOSET4_5
 ((
ušt32_t
)0x00000020è

	)

5392 

	#FSMC_PIO4_IOSET4_6
 ((
ušt32_t
)0x00000040è

	)

5393 

	#FSMC_PIO4_IOSET4_7
 ((
ušt32_t
)0x00000080è

	)

5395 

	#FSMC_PIO4_IOWAIT4
 ((
ušt32_t
)0x0000FF00è

	)

5396 

	#FSMC_PIO4_IOWAIT4_0
 ((
ušt32_t
)0x00000100è

	)

5397 

	#FSMC_PIO4_IOWAIT4_1
 ((
ušt32_t
)0x00000200è

	)

5398 

	#FSMC_PIO4_IOWAIT4_2
 ((
ušt32_t
)0x00000400è

	)

5399 

	#FSMC_PIO4_IOWAIT4_3
 ((
ušt32_t
)0x00000800è

	)

5400 

	#FSMC_PIO4_IOWAIT4_4
 ((
ušt32_t
)0x00001000è

	)

5401 

	#FSMC_PIO4_IOWAIT4_5
 ((
ušt32_t
)0x00002000è

	)

5402 

	#FSMC_PIO4_IOWAIT4_6
 ((
ušt32_t
)0x00004000è

	)

5403 

	#FSMC_PIO4_IOWAIT4_7
 ((
ušt32_t
)0x00008000è

	)

5405 

	#FSMC_PIO4_IOHOLD4
 ((
ušt32_t
)0x00FF0000è

	)

5406 

	#FSMC_PIO4_IOHOLD4_0
 ((
ušt32_t
)0x00010000è

	)

5407 

	#FSMC_PIO4_IOHOLD4_1
 ((
ušt32_t
)0x00020000è

	)

5408 

	#FSMC_PIO4_IOHOLD4_2
 ((
ušt32_t
)0x00040000è

	)

5409 

	#FSMC_PIO4_IOHOLD4_3
 ((
ušt32_t
)0x00080000è

	)

5410 

	#FSMC_PIO4_IOHOLD4_4
 ((
ušt32_t
)0x00100000è

	)

5411 

	#FSMC_PIO4_IOHOLD4_5
 ((
ušt32_t
)0x00200000è

	)

5412 

	#FSMC_PIO4_IOHOLD4_6
 ((
ušt32_t
)0x00400000è

	)

5413 

	#FSMC_PIO4_IOHOLD4_7
 ((
ušt32_t
)0x00800000è

	)

5415 

	#FSMC_PIO4_IOHIZ4
 ((
ušt32_t
)0xFF000000è

	)

5416 

	#FSMC_PIO4_IOHIZ4_0
 ((
ušt32_t
)0x01000000è

	)

5417 

	#FSMC_PIO4_IOHIZ4_1
 ((
ušt32_t
)0x02000000è

	)

5418 

	#FSMC_PIO4_IOHIZ4_2
 ((
ušt32_t
)0x04000000è

	)

5419 

	#FSMC_PIO4_IOHIZ4_3
 ((
ušt32_t
)0x08000000è

	)

5420 

	#FSMC_PIO4_IOHIZ4_4
 ((
ušt32_t
)0x10000000è

	)

5421 

	#FSMC_PIO4_IOHIZ4_5
 ((
ušt32_t
)0x20000000è

	)

5422 

	#FSMC_PIO4_IOHIZ4_6
 ((
ušt32_t
)0x40000000è

	)

5423 

	#FSMC_PIO4_IOHIZ4_7
 ((
ušt32_t
)0x80000000è

	)

5426 

	#FSMC_ECCR2_ECC2
 ((
ušt32_t
)0xFFFFFFFFè

	)

5429 

	#FSMC_ECCR3_ECC3
 ((
ušt32_t
)0xFFFFFFFFè

	)

5438 

	#SDIO_POWER_PWRCTRL
 ((
ušt8_t
)0x03è

	)

5439 

	#SDIO_POWER_PWRCTRL_0
 ((
ušt8_t
)0x01è

	)

5440 

	#SDIO_POWER_PWRCTRL_1
 ((
ušt8_t
)0x02è

	)

5443 

	#SDIO_CLKCR_CLKDIV
 ((
ušt16_t
)0x00FFè

	)

5444 

	#SDIO_CLKCR_CLKEN
 ((
ušt16_t
)0x0100è

	)

5445 

	#SDIO_CLKCR_PWRSAV
 ((
ušt16_t
)0x0200è

	)

5446 

	#SDIO_CLKCR_BYPASS
 ((
ušt16_t
)0x0400è

	)

5448 

	#SDIO_CLKCR_WIDBUS
 ((
ušt16_t
)0x1800è

	)

5449 

	#SDIO_CLKCR_WIDBUS_0
 ((
ušt16_t
)0x0800è

	)

5450 

	#SDIO_CLKCR_WIDBUS_1
 ((
ušt16_t
)0x1000è

	)

5452 

	#SDIO_CLKCR_NEGEDGE
 ((
ušt16_t
)0x2000è

	)

5453 

	#SDIO_CLKCR_HWFC_EN
 ((
ušt16_t
)0x4000è

	)

5456 

	#SDIO_ARG_CMDARG
 ((
ušt32_t
)0xFFFFFFFFè

	)

5459 

	#SDIO_CMD_CMDINDEX
 ((
ušt16_t
)0x003Fè

	)

5461 

	#SDIO_CMD_WAITRESP
 ((
ušt16_t
)0x00C0è

	)

5462 

	#SDIO_CMD_WAITRESP_0
 ((
ušt16_t
)0x0040è

	)

5463 

	#SDIO_CMD_WAITRESP_1
 ((
ušt16_t
)0x0080è

	)

5465 

	#SDIO_CMD_WAITINT
 ((
ušt16_t
)0x0100è

	)

5466 

	#SDIO_CMD_WAITPEND
 ((
ušt16_t
)0x0200è

	)

5467 

	#SDIO_CMD_CPSMEN
 ((
ušt16_t
)0x0400è

	)

5468 

	#SDIO_CMD_SDIOSUSPEND
 ((
ušt16_t
)0x0800è

	)

5469 

	#SDIO_CMD_ENCMDCOMPL
 ((
ušt16_t
)0x1000è

	)

5470 

	#SDIO_CMD_NIEN
 ((
ušt16_t
)0x2000è

	)

5471 

	#SDIO_CMD_CEATACMD
 ((
ušt16_t
)0x4000è

	)

5474 

	#SDIO_RESPCMD_RESPCMD
 ((
ušt8_t
)0x3Fè

	)

5477 

	#SDIO_RESP0_CARDSTATUS0
 ((
ušt32_t
)0xFFFFFFFFè

	)

5480 

	#SDIO_RESP1_CARDSTATUS1
 ((
ušt32_t
)0xFFFFFFFFè

	)

5483 

	#SDIO_RESP2_CARDSTATUS2
 ((
ušt32_t
)0xFFFFFFFFè

	)

5486 

	#SDIO_RESP3_CARDSTATUS3
 ((
ušt32_t
)0xFFFFFFFFè

	)

5489 

	#SDIO_RESP4_CARDSTATUS4
 ((
ušt32_t
)0xFFFFFFFFè

	)

5492 

	#SDIO_DTIMER_DATATIME
 ((
ušt32_t
)0xFFFFFFFFè

	)

5495 

	#SDIO_DLEN_DATALENGTH
 ((
ušt32_t
)0x01FFFFFFè

	)

5498 

	#SDIO_DCTRL_DTEN
 ((
ušt16_t
)0x0001è

	)

5499 

	#SDIO_DCTRL_DTDIR
 ((
ušt16_t
)0x0002è

	)

5500 

	#SDIO_DCTRL_DTMODE
 ((
ušt16_t
)0x0004è

	)

5501 

	#SDIO_DCTRL_DMAEN
 ((
ušt16_t
)0x0008è

	)

5503 

	#SDIO_DCTRL_DBLOCKSIZE
 ((
ušt16_t
)0x00F0è

	)

5504 

	#SDIO_DCTRL_DBLOCKSIZE_0
 ((
ušt16_t
)0x0010è

	)

5505 

	#SDIO_DCTRL_DBLOCKSIZE_1
 ((
ušt16_t
)0x0020è

	)

5506 

	#SDIO_DCTRL_DBLOCKSIZE_2
 ((
ušt16_t
)0x0040è

	)

5507 

	#SDIO_DCTRL_DBLOCKSIZE_3
 ((
ušt16_t
)0x0080è

	)

5509 

	#SDIO_DCTRL_RWSTART
 ((
ušt16_t
)0x0100è

	)

5510 

	#SDIO_DCTRL_RWSTOP
 ((
ušt16_t
)0x0200è

	)

5511 

	#SDIO_DCTRL_RWMOD
 ((
ušt16_t
)0x0400è

	)

5512 

	#SDIO_DCTRL_SDIOEN
 ((
ušt16_t
)0x0800è

	)

5515 

	#SDIO_DCOUNT_DATACOUNT
 ((
ušt32_t
)0x01FFFFFFè

	)

5518 

	#SDIO_STA_CCRCFAIL
 ((
ušt32_t
)0x00000001è

	)

5519 

	#SDIO_STA_DCRCFAIL
 ((
ušt32_t
)0x00000002è

	)

5520 

	#SDIO_STA_CTIMEOUT
 ((
ušt32_t
)0x00000004è

	)

5521 

	#SDIO_STA_DTIMEOUT
 ((
ušt32_t
)0x00000008è

	)

5522 

	#SDIO_STA_TXUNDERR
 ((
ušt32_t
)0x00000010è

	)

5523 

	#SDIO_STA_RXOVERR
 ((
ušt32_t
)0x00000020è

	)

5524 

	#SDIO_STA_CMDREND
 ((
ušt32_t
)0x00000040è

	)

5525 

	#SDIO_STA_CMDSENT
 ((
ušt32_t
)0x00000080è

	)

5526 

	#SDIO_STA_DATAEND
 ((
ušt32_t
)0x00000100è

	)

5527 

	#SDIO_STA_STBITERR
 ((
ušt32_t
)0x00000200è

	)

5528 

	#SDIO_STA_DBCKEND
 ((
ušt32_t
)0x00000400è

	)

5529 

	#SDIO_STA_CMDACT
 ((
ušt32_t
)0x00000800è

	)

5530 

	#SDIO_STA_TXACT
 ((
ušt32_t
)0x00001000è

	)

5531 

	#SDIO_STA_RXACT
 ((
ušt32_t
)0x00002000è

	)

5532 

	#SDIO_STA_TXFIFOHE
 ((
ušt32_t
)0x00004000è

	)

5533 

	#SDIO_STA_RXFIFOHF
 ((
ušt32_t
)0x00008000è

	)

5534 

	#SDIO_STA_TXFIFOF
 ((
ušt32_t
)0x00010000è

	)

5535 

	#SDIO_STA_RXFIFOF
 ((
ušt32_t
)0x00020000è

	)

5536 

	#SDIO_STA_TXFIFOE
 ((
ušt32_t
)0x00040000è

	)

5537 

	#SDIO_STA_RXFIFOE
 ((
ušt32_t
)0x00080000è

	)

5538 

	#SDIO_STA_TXDAVL
 ((
ušt32_t
)0x00100000è

	)

5539 

	#SDIO_STA_RXDAVL
 ((
ušt32_t
)0x00200000è

	)

5540 

	#SDIO_STA_SDIOIT
 ((
ušt32_t
)0x00400000è

	)

5541 

	#SDIO_STA_CEATAEND
 ((
ušt32_t
)0x00800000è

	)

5544 

	#SDIO_ICR_CCRCFAILC
 ((
ušt32_t
)0x00000001è

	)

5545 

	#SDIO_ICR_DCRCFAILC
 ((
ušt32_t
)0x00000002è

	)

5546 

	#SDIO_ICR_CTIMEOUTC
 ((
ušt32_t
)0x00000004è

	)

5547 

	#SDIO_ICR_DTIMEOUTC
 ((
ušt32_t
)0x00000008è

	)

5548 

	#SDIO_ICR_TXUNDERRC
 ((
ušt32_t
)0x00000010è

	)

5549 

	#SDIO_ICR_RXOVERRC
 ((
ušt32_t
)0x00000020è

	)

5550 

	#SDIO_ICR_CMDRENDC
 ((
ušt32_t
)0x00000040è

	)

5551 

	#SDIO_ICR_CMDSENTC
 ((
ušt32_t
)0x00000080è

	)

5552 

	#SDIO_ICR_DATAENDC
 ((
ušt32_t
)0x00000100è

	)

5553 

	#SDIO_ICR_STBITERRC
 ((
ušt32_t
)0x00000200è

	)

5554 

	#SDIO_ICR_DBCKENDC
 ((
ušt32_t
)0x00000400è

	)

5555 

	#SDIO_ICR_SDIOITC
 ((
ušt32_t
)0x00400000è

	)

5556 

	#SDIO_ICR_CEATAENDC
 ((
ušt32_t
)0x00800000è

	)

5559 

	#SDIO_MASK_CCRCFAILIE
 ((
ušt32_t
)0x00000001è

	)

5560 

	#SDIO_MASK_DCRCFAILIE
 ((
ušt32_t
)0x00000002è

	)

5561 

	#SDIO_MASK_CTIMEOUTIE
 ((
ušt32_t
)0x00000004è

	)

5562 

	#SDIO_MASK_DTIMEOUTIE
 ((
ušt32_t
)0x00000008è

	)

5563 

	#SDIO_MASK_TXUNDERRIE
 ((
ušt32_t
)0x00000010è

	)

5564 

	#SDIO_MASK_RXOVERRIE
 ((
ušt32_t
)0x00000020è

	)

5565 

	#SDIO_MASK_CMDRENDIE
 ((
ušt32_t
)0x00000040è

	)

5566 

	#SDIO_MASK_CMDSENTIE
 ((
ušt32_t
)0x00000080è

	)

5567 

	#SDIO_MASK_DATAENDIE
 ((
ušt32_t
)0x00000100è

	)

5568 

	#SDIO_MASK_STBITERRIE
 ((
ušt32_t
)0x00000200è

	)

5569 

	#SDIO_MASK_DBCKENDIE
 ((
ušt32_t
)0x00000400è

	)

5570 

	#SDIO_MASK_CMDACTIE
 ((
ušt32_t
)0x00000800è

	)

5571 

	#SDIO_MASK_TXACTIE
 ((
ušt32_t
)0x00001000è

	)

5572 

	#SDIO_MASK_RXACTIE
 ((
ušt32_t
)0x00002000è

	)

5573 

	#SDIO_MASK_TXFIFOHEIE
 ((
ušt32_t
)0x00004000è

	)

5574 

	#SDIO_MASK_RXFIFOHFIE
 ((
ušt32_t
)0x00008000è

	)

5575 

	#SDIO_MASK_TXFIFOFIE
 ((
ušt32_t
)0x00010000è

	)

5576 

	#SDIO_MASK_RXFIFOFIE
 ((
ušt32_t
)0x00020000è

	)

5577 

	#SDIO_MASK_TXFIFOEIE
 ((
ušt32_t
)0x00040000è

	)

5578 

	#SDIO_MASK_RXFIFOEIE
 ((
ušt32_t
)0x00080000è

	)

5579 

	#SDIO_MASK_TXDAVLIE
 ((
ušt32_t
)0x00100000è

	)

5580 

	#SDIO_MASK_RXDAVLIE
 ((
ušt32_t
)0x00200000è

	)

5581 

	#SDIO_MASK_SDIOITIE
 ((
ušt32_t
)0x00400000è

	)

5582 

	#SDIO_MASK_CEATAENDIE
 ((
ušt32_t
)0x00800000è

	)

5585 

	#SDIO_FIFOCNT_FIFOCOUNT
 ((
ušt32_t
)0x00FFFFFFè

	)

5588 

	#SDIO_FIFO_FIFODATA
 ((
ušt32_t
)0xFFFFFFFFè

	)

5598 

	#USB_EP0R_EA
 ((
ušt16_t
)0x000Fè

	)

5600 

	#USB_EP0R_STAT_TX
 ((
ušt16_t
)0x0030è

	)

5601 

	#USB_EP0R_STAT_TX_0
 ((
ušt16_t
)0x0010è

	)

5602 

	#USB_EP0R_STAT_TX_1
 ((
ušt16_t
)0x0020è

	)

5604 

	#USB_EP0R_DTOG_TX
 ((
ušt16_t
)0x0040è

	)

5605 

	#USB_EP0R_CTR_TX
 ((
ušt16_t
)0x0080è

	)

5606 

	#USB_EP0R_EP_KIND
 ((
ušt16_t
)0x0100è

	)

5608 

	#USB_EP0R_EP_TYPE
 ((
ušt16_t
)0x0600è

	)

5609 

	#USB_EP0R_EP_TYPE_0
 ((
ušt16_t
)0x0200è

	)

5610 

	#USB_EP0R_EP_TYPE_1
 ((
ušt16_t
)0x0400è

	)

5612 

	#USB_EP0R_SETUP
 ((
ušt16_t
)0x0800è

	)

5614 

	#USB_EP0R_STAT_RX
 ((
ušt16_t
)0x3000è

	)

5615 

	#USB_EP0R_STAT_RX_0
 ((
ušt16_t
)0x1000è

	)

5616 

	#USB_EP0R_STAT_RX_1
 ((
ušt16_t
)0x2000è

	)

5618 

	#USB_EP0R_DTOG_RX
 ((
ušt16_t
)0x4000è

	)

5619 

	#USB_EP0R_CTR_RX
 ((
ušt16_t
)0x8000è

	)

5622 

	#USB_EP1R_EA
 ((
ušt16_t
)0x000Fè

	)

5624 

	#USB_EP1R_STAT_TX
 ((
ušt16_t
)0x0030è

	)

5625 

	#USB_EP1R_STAT_TX_0
 ((
ušt16_t
)0x0010è

	)

5626 

	#USB_EP1R_STAT_TX_1
 ((
ušt16_t
)0x0020è

	)

5628 

	#USB_EP1R_DTOG_TX
 ((
ušt16_t
)0x0040è

	)

5629 

	#USB_EP1R_CTR_TX
 ((
ušt16_t
)0x0080è

	)

5630 

	#USB_EP1R_EP_KIND
 ((
ušt16_t
)0x0100è

	)

5632 

	#USB_EP1R_EP_TYPE
 ((
ušt16_t
)0x0600è

	)

5633 

	#USB_EP1R_EP_TYPE_0
 ((
ušt16_t
)0x0200è

	)

5634 

	#USB_EP1R_EP_TYPE_1
 ((
ušt16_t
)0x0400è

	)

5636 

	#USB_EP1R_SETUP
 ((
ušt16_t
)0x0800è

	)

5638 

	#USB_EP1R_STAT_RX
 ((
ušt16_t
)0x3000è

	)

5639 

	#USB_EP1R_STAT_RX_0
 ((
ušt16_t
)0x1000è

	)

5640 

	#USB_EP1R_STAT_RX_1
 ((
ušt16_t
)0x2000è

	)

5642 

	#USB_EP1R_DTOG_RX
 ((
ušt16_t
)0x4000è

	)

5643 

	#USB_EP1R_CTR_RX
 ((
ušt16_t
)0x8000è

	)

5646 

	#USB_EP2R_EA
 ((
ušt16_t
)0x000Fè

	)

5648 

	#USB_EP2R_STAT_TX
 ((
ušt16_t
)0x0030è

	)

5649 

	#USB_EP2R_STAT_TX_0
 ((
ušt16_t
)0x0010è

	)

5650 

	#USB_EP2R_STAT_TX_1
 ((
ušt16_t
)0x0020è

	)

5652 

	#USB_EP2R_DTOG_TX
 ((
ušt16_t
)0x0040è

	)

5653 

	#USB_EP2R_CTR_TX
 ((
ušt16_t
)0x0080è

	)

5654 

	#USB_EP2R_EP_KIND
 ((
ušt16_t
)0x0100è

	)

5656 

	#USB_EP2R_EP_TYPE
 ((
ušt16_t
)0x0600è

	)

5657 

	#USB_EP2R_EP_TYPE_0
 ((
ušt16_t
)0x0200è

	)

5658 

	#USB_EP2R_EP_TYPE_1
 ((
ušt16_t
)0x0400è

	)

5660 

	#USB_EP2R_SETUP
 ((
ušt16_t
)0x0800è

	)

5662 

	#USB_EP2R_STAT_RX
 ((
ušt16_t
)0x3000è

	)

5663 

	#USB_EP2R_STAT_RX_0
 ((
ušt16_t
)0x1000è

	)

5664 

	#USB_EP2R_STAT_RX_1
 ((
ušt16_t
)0x2000è

	)

5666 

	#USB_EP2R_DTOG_RX
 ((
ušt16_t
)0x4000è

	)

5667 

	#USB_EP2R_CTR_RX
 ((
ušt16_t
)0x8000è

	)

5670 

	#USB_EP3R_EA
 ((
ušt16_t
)0x000Fè

	)

5672 

	#USB_EP3R_STAT_TX
 ((
ušt16_t
)0x0030è

	)

5673 

	#USB_EP3R_STAT_TX_0
 ((
ušt16_t
)0x0010è

	)

5674 

	#USB_EP3R_STAT_TX_1
 ((
ušt16_t
)0x0020è

	)

5676 

	#USB_EP3R_DTOG_TX
 ((
ušt16_t
)0x0040è

	)

5677 

	#USB_EP3R_CTR_TX
 ((
ušt16_t
)0x0080è

	)

5678 

	#USB_EP3R_EP_KIND
 ((
ušt16_t
)0x0100è

	)

5680 

	#USB_EP3R_EP_TYPE
 ((
ušt16_t
)0x0600è

	)

5681 

	#USB_EP3R_EP_TYPE_0
 ((
ušt16_t
)0x0200è

	)

5682 

	#USB_EP3R_EP_TYPE_1
 ((
ušt16_t
)0x0400è

	)

5684 

	#USB_EP3R_SETUP
 ((
ušt16_t
)0x0800è

	)

5686 

	#USB_EP3R_STAT_RX
 ((
ušt16_t
)0x3000è

	)

5687 

	#USB_EP3R_STAT_RX_0
 ((
ušt16_t
)0x1000è

	)

5688 

	#USB_EP3R_STAT_RX_1
 ((
ušt16_t
)0x2000è

	)

5690 

	#USB_EP3R_DTOG_RX
 ((
ušt16_t
)0x4000è

	)

5691 

	#USB_EP3R_CTR_RX
 ((
ušt16_t
)0x8000è

	)

5694 

	#USB_EP4R_EA
 ((
ušt16_t
)0x000Fè

	)

5696 

	#USB_EP4R_STAT_TX
 ((
ušt16_t
)0x0030è

	)

5697 

	#USB_EP4R_STAT_TX_0
 ((
ušt16_t
)0x0010è

	)

5698 

	#USB_EP4R_STAT_TX_1
 ((
ušt16_t
)0x0020è

	)

5700 

	#USB_EP4R_DTOG_TX
 ((
ušt16_t
)0x0040è

	)

5701 

	#USB_EP4R_CTR_TX
 ((
ušt16_t
)0x0080è

	)

5702 

	#USB_EP4R_EP_KIND
 ((
ušt16_t
)0x0100è

	)

5704 

	#USB_EP4R_EP_TYPE
 ((
ušt16_t
)0x0600è

	)

5705 

	#USB_EP4R_EP_TYPE_0
 ((
ušt16_t
)0x0200è

	)

5706 

	#USB_EP4R_EP_TYPE_1
 ((
ušt16_t
)0x0400è

	)

5708 

	#USB_EP4R_SETUP
 ((
ušt16_t
)0x0800è

	)

5710 

	#USB_EP4R_STAT_RX
 ((
ušt16_t
)0x3000è

	)

5711 

	#USB_EP4R_STAT_RX_0
 ((
ušt16_t
)0x1000è

	)

5712 

	#USB_EP4R_STAT_RX_1
 ((
ušt16_t
)0x2000è

	)

5714 

	#USB_EP4R_DTOG_RX
 ((
ušt16_t
)0x4000è

	)

5715 

	#USB_EP4R_CTR_RX
 ((
ušt16_t
)0x8000è

	)

5718 

	#USB_EP5R_EA
 ((
ušt16_t
)0x000Fè

	)

5720 

	#USB_EP5R_STAT_TX
 ((
ušt16_t
)0x0030è

	)

5721 

	#USB_EP5R_STAT_TX_0
 ((
ušt16_t
)0x0010è

	)

5722 

	#USB_EP5R_STAT_TX_1
 ((
ušt16_t
)0x0020è

	)

5724 

	#USB_EP5R_DTOG_TX
 ((
ušt16_t
)0x0040è

	)

5725 

	#USB_EP5R_CTR_TX
 ((
ušt16_t
)0x0080è

	)

5726 

	#USB_EP5R_EP_KIND
 ((
ušt16_t
)0x0100è

	)

5728 

	#USB_EP5R_EP_TYPE
 ((
ušt16_t
)0x0600è

	)

5729 

	#USB_EP5R_EP_TYPE_0
 ((
ušt16_t
)0x0200è

	)

5730 

	#USB_EP5R_EP_TYPE_1
 ((
ušt16_t
)0x0400è

	)

5732 

	#USB_EP5R_SETUP
 ((
ušt16_t
)0x0800è

	)

5734 

	#USB_EP5R_STAT_RX
 ((
ušt16_t
)0x3000è

	)

5735 

	#USB_EP5R_STAT_RX_0
 ((
ušt16_t
)0x1000è

	)

5736 

	#USB_EP5R_STAT_RX_1
 ((
ušt16_t
)0x2000è

	)

5738 

	#USB_EP5R_DTOG_RX
 ((
ušt16_t
)0x4000è

	)

5739 

	#USB_EP5R_CTR_RX
 ((
ušt16_t
)0x8000è

	)

5742 

	#USB_EP6R_EA
 ((
ušt16_t
)0x000Fè

	)

5744 

	#USB_EP6R_STAT_TX
 ((
ušt16_t
)0x0030è

	)

5745 

	#USB_EP6R_STAT_TX_0
 ((
ušt16_t
)0x0010è

	)

5746 

	#USB_EP6R_STAT_TX_1
 ((
ušt16_t
)0x0020è

	)

5748 

	#USB_EP6R_DTOG_TX
 ((
ušt16_t
)0x0040è

	)

5749 

	#USB_EP6R_CTR_TX
 ((
ušt16_t
)0x0080è

	)

5750 

	#USB_EP6R_EP_KIND
 ((
ušt16_t
)0x0100è

	)

5752 

	#USB_EP6R_EP_TYPE
 ((
ušt16_t
)0x0600è

	)

5753 

	#USB_EP6R_EP_TYPE_0
 ((
ušt16_t
)0x0200è

	)

5754 

	#USB_EP6R_EP_TYPE_1
 ((
ušt16_t
)0x0400è

	)

5756 

	#USB_EP6R_SETUP
 ((
ušt16_t
)0x0800è

	)

5758 

	#USB_EP6R_STAT_RX
 ((
ušt16_t
)0x3000è

	)

5759 

	#USB_EP6R_STAT_RX_0
 ((
ušt16_t
)0x1000è

	)

5760 

	#USB_EP6R_STAT_RX_1
 ((
ušt16_t
)0x2000è

	)

5762 

	#USB_EP6R_DTOG_RX
 ((
ušt16_t
)0x4000è

	)

5763 

	#USB_EP6R_CTR_RX
 ((
ušt16_t
)0x8000è

	)

5766 

	#USB_EP7R_EA
 ((
ušt16_t
)0x000Fè

	)

5768 

	#USB_EP7R_STAT_TX
 ((
ušt16_t
)0x0030è

	)

5769 

	#USB_EP7R_STAT_TX_0
 ((
ušt16_t
)0x0010è

	)

5770 

	#USB_EP7R_STAT_TX_1
 ((
ušt16_t
)0x0020è

	)

5772 

	#USB_EP7R_DTOG_TX
 ((
ušt16_t
)0x0040è

	)

5773 

	#USB_EP7R_CTR_TX
 ((
ušt16_t
)0x0080è

	)

5774 

	#USB_EP7R_EP_KIND
 ((
ušt16_t
)0x0100è

	)

5776 

	#USB_EP7R_EP_TYPE
 ((
ušt16_t
)0x0600è

	)

5777 

	#USB_EP7R_EP_TYPE_0
 ((
ušt16_t
)0x0200è

	)

5778 

	#USB_EP7R_EP_TYPE_1
 ((
ušt16_t
)0x0400è

	)

5780 

	#USB_EP7R_SETUP
 ((
ušt16_t
)0x0800è

	)

5782 

	#USB_EP7R_STAT_RX
 ((
ušt16_t
)0x3000è

	)

5783 

	#USB_EP7R_STAT_RX_0
 ((
ušt16_t
)0x1000è

	)

5784 

	#USB_EP7R_STAT_RX_1
 ((
ušt16_t
)0x2000è

	)

5786 

	#USB_EP7R_DTOG_RX
 ((
ušt16_t
)0x4000è

	)

5787 

	#USB_EP7R_CTR_RX
 ((
ušt16_t
)0x8000è

	)

5791 

	#USB_CNTR_FRES
 ((
ušt16_t
)0x0001è

	)

5792 

	#USB_CNTR_PDWN
 ((
ušt16_t
)0x0002è

	)

5793 

	#USB_CNTR_LP_MODE
 ((
ušt16_t
)0x0004è

	)

5794 

	#USB_CNTR_FSUSP
 ((
ušt16_t
)0x0008è

	)

5795 

	#USB_CNTR_RESUME
 ((
ušt16_t
)0x0010è

	)

5796 

	#USB_CNTR_ESOFM
 ((
ušt16_t
)0x0100è

	)

5797 

	#USB_CNTR_SOFM
 ((
ušt16_t
)0x0200è

	)

5798 

	#USB_CNTR_RESETM
 ((
ušt16_t
)0x0400è

	)

5799 

	#USB_CNTR_SUSPM
 ((
ušt16_t
)0x0800è

	)

5800 

	#USB_CNTR_WKUPM
 ((
ušt16_t
)0x1000è

	)

5801 

	#USB_CNTR_ERRM
 ((
ušt16_t
)0x2000è

	)

5802 

	#USB_CNTR_PMAOVRM
 ((
ušt16_t
)0x4000è

	)

5803 

	#USB_CNTR_CTRM
 ((
ušt16_t
)0x8000è

	)

5806 

	#USB_ISTR_EP_ID
 ((
ušt16_t
)0x000Fè

	)

5807 

	#USB_ISTR_DIR
 ((
ušt16_t
)0x0010è

	)

5808 

	#USB_ISTR_ESOF
 ((
ušt16_t
)0x0100è

	)

5809 

	#USB_ISTR_SOF
 ((
ušt16_t
)0x0200è

	)

5810 

	#USB_ISTR_RESET
 ((
ušt16_t
)0x0400è

	)

5811 

	#USB_ISTR_SUSP
 ((
ušt16_t
)0x0800è

	)

5812 

	#USB_ISTR_WKUP
 ((
ušt16_t
)0x1000è

	)

5813 

	#USB_ISTR_ERR
 ((
ušt16_t
)0x2000è

	)

5814 

	#USB_ISTR_PMAOVR
 ((
ušt16_t
)0x4000è

	)

5815 

	#USB_ISTR_CTR
 ((
ušt16_t
)0x8000è

	)

5818 

	#USB_FNR_FN
 ((
ušt16_t
)0x07FFè

	)

5819 

	#USB_FNR_LSOF
 ((
ušt16_t
)0x1800è

	)

5820 

	#USB_FNR_LCK
 ((
ušt16_t
)0x2000è

	)

5821 

	#USB_FNR_RXDM
 ((
ušt16_t
)0x4000è

	)

5822 

	#USB_FNR_RXDP
 ((
ušt16_t
)0x8000è

	)

5825 

	#USB_DADDR_ADD
 ((
ušt8_t
)0x7Fè

	)

5826 

	#USB_DADDR_ADD0
 ((
ušt8_t
)0x01è

	)

5827 

	#USB_DADDR_ADD1
 ((
ušt8_t
)0x02è

	)

5828 

	#USB_DADDR_ADD2
 ((
ušt8_t
)0x04è

	)

5829 

	#USB_DADDR_ADD3
 ((
ušt8_t
)0x08è

	)

5830 

	#USB_DADDR_ADD4
 ((
ušt8_t
)0x10è

	)

5831 

	#USB_DADDR_ADD5
 ((
ušt8_t
)0x20è

	)

5832 

	#USB_DADDR_ADD6
 ((
ušt8_t
)0x40è

	)

5834 

	#USB_DADDR_EF
 ((
ušt8_t
)0x80è

	)

5837 

	#USB_BTABLE_BTABLE
 ((
ušt16_t
)0xFFF8è

	)

5841 

	#USB_ADDR0_TX_ADDR0_TX
 ((
ušt16_t
)0xFFFEè

	)

5844 

	#USB_ADDR1_TX_ADDR1_TX
 ((
ušt16_t
)0xFFFEè

	)

5847 

	#USB_ADDR2_TX_ADDR2_TX
 ((
ušt16_t
)0xFFFEè

	)

5850 

	#USB_ADDR3_TX_ADDR3_TX
 ((
ušt16_t
)0xFFFEè

	)

5853 

	#USB_ADDR4_TX_ADDR4_TX
 ((
ušt16_t
)0xFFFEè

	)

5856 

	#USB_ADDR5_TX_ADDR5_TX
 ((
ušt16_t
)0xFFFEè

	)

5859 

	#USB_ADDR6_TX_ADDR6_TX
 ((
ušt16_t
)0xFFFEè

	)

5862 

	#USB_ADDR7_TX_ADDR7_TX
 ((
ušt16_t
)0xFFFEè

	)

5867 

	#USB_COUNT0_TX_COUNT0_TX
 ((
ušt16_t
)0x03FFè

	)

5870 

	#USB_COUNT1_TX_COUNT1_TX
 ((
ušt16_t
)0x03FFè

	)

5873 

	#USB_COUNT2_TX_COUNT2_TX
 ((
ušt16_t
)0x03FFè

	)

5876 

	#USB_COUNT3_TX_COUNT3_TX
 ((
ušt16_t
)0x03FFè

	)

5879 

	#USB_COUNT4_TX_COUNT4_TX
 ((
ušt16_t
)0x03FFè

	)

5882 

	#USB_COUNT5_TX_COUNT5_TX
 ((
ušt16_t
)0x03FFè

	)

5885 

	#USB_COUNT6_TX_COUNT6_TX
 ((
ušt16_t
)0x03FFè

	)

5888 

	#USB_COUNT7_TX_COUNT7_TX
 ((
ušt16_t
)0x03FFè

	)

5893 

	#USB_COUNT0_TX_0_COUNT0_TX_0
 ((
ušt32_t
)0x000003FFè

	)

5896 

	#USB_COUNT0_TX_1_COUNT0_TX_1
 ((
ušt32_t
)0x03FF0000è

	)

5899 

	#USB_COUNT1_TX_0_COUNT1_TX_0
 ((
ušt32_t
)0x000003FFè

	)

5902 

	#USB_COUNT1_TX_1_COUNT1_TX_1
 ((
ušt32_t
)0x03FF0000è

	)

5905 

	#USB_COUNT2_TX_0_COUNT2_TX_0
 ((
ušt32_t
)0x000003FFè

	)

5908 

	#USB_COUNT2_TX_1_COUNT2_TX_1
 ((
ušt32_t
)0x03FF0000è

	)

5911 

	#USB_COUNT3_TX_0_COUNT3_TX_0
 ((
ušt16_t
)0x000003FFè

	)

5914 

	#USB_COUNT3_TX_1_COUNT3_TX_1
 ((
ušt16_t
)0x03FF0000è

	)

5917 

	#USB_COUNT4_TX_0_COUNT4_TX_0
 ((
ušt32_t
)0x000003FFè

	)

5920 

	#USB_COUNT4_TX_1_COUNT4_TX_1
 ((
ušt32_t
)0x03FF0000è

	)

5923 

	#USB_COUNT5_TX_0_COUNT5_TX_0
 ((
ušt32_t
)0x000003FFè

	)

5926 

	#USB_COUNT5_TX_1_COUNT5_TX_1
 ((
ušt32_t
)0x03FF0000è

	)

5929 

	#USB_COUNT6_TX_0_COUNT6_TX_0
 ((
ušt32_t
)0x000003FFè

	)

5932 

	#USB_COUNT6_TX_1_COUNT6_TX_1
 ((
ušt32_t
)0x03FF0000è

	)

5935 

	#USB_COUNT7_TX_0_COUNT7_TX_0
 ((
ušt32_t
)0x000003FFè

	)

5938 

	#USB_COUNT7_TX_1_COUNT7_TX_1
 ((
ušt32_t
)0x03FF0000è

	)

5943 

	#USB_ADDR0_RX_ADDR0_RX
 ((
ušt16_t
)0xFFFEè

	)

5946 

	#USB_ADDR1_RX_ADDR1_RX
 ((
ušt16_t
)0xFFFEè

	)

5949 

	#USB_ADDR2_RX_ADDR2_RX
 ((
ušt16_t
)0xFFFEè

	)

5952 

	#USB_ADDR3_RX_ADDR3_RX
 ((
ušt16_t
)0xFFFEè

	)

5955 

	#USB_ADDR4_RX_ADDR4_RX
 ((
ušt16_t
)0xFFFEè

	)

5958 

	#USB_ADDR5_RX_ADDR5_RX
 ((
ušt16_t
)0xFFFEè

	)

5961 

	#USB_ADDR6_RX_ADDR6_RX
 ((
ušt16_t
)0xFFFEè

	)

5964 

	#USB_ADDR7_RX_ADDR7_RX
 ((
ušt16_t
)0xFFFEè

	)

5969 

	#USB_COUNT0_RX_COUNT0_RX
 ((
ušt16_t
)0x03FFè

	)

5971 

	#USB_COUNT0_RX_NUM_BLOCK
 ((
ušt16_t
)0x7C00è

	)

5972 

	#USB_COUNT0_RX_NUM_BLOCK_0
 ((
ušt16_t
)0x0400è

	)

5973 

	#USB_COUNT0_RX_NUM_BLOCK_1
 ((
ušt16_t
)0x0800è

	)

5974 

	#USB_COUNT0_RX_NUM_BLOCK_2
 ((
ušt16_t
)0x1000è

	)

5975 

	#USB_COUNT0_RX_NUM_BLOCK_3
 ((
ušt16_t
)0x2000è

	)

5976 

	#USB_COUNT0_RX_NUM_BLOCK_4
 ((
ušt16_t
)0x4000è

	)

5978 

	#USB_COUNT0_RX_BLSIZE
 ((
ušt16_t
)0x8000è

	)

5981 

	#USB_COUNT1_RX_COUNT1_RX
 ((
ušt16_t
)0x03FFè

	)

5983 

	#USB_COUNT1_RX_NUM_BLOCK
 ((
ušt16_t
)0x7C00è

	)

5984 

	#USB_COUNT1_RX_NUM_BLOCK_0
 ((
ušt16_t
)0x0400è

	)

5985 

	#USB_COUNT1_RX_NUM_BLOCK_1
 ((
ušt16_t
)0x0800è

	)

5986 

	#USB_COUNT1_RX_NUM_BLOCK_2
 ((
ušt16_t
)0x1000è

	)

5987 

	#USB_COUNT1_RX_NUM_BLOCK_3
 ((
ušt16_t
)0x2000è

	)

5988 

	#USB_COUNT1_RX_NUM_BLOCK_4
 ((
ušt16_t
)0x4000è

	)

5990 

	#USB_COUNT1_RX_BLSIZE
 ((
ušt16_t
)0x8000è

	)

5993 

	#USB_COUNT2_RX_COUNT2_RX
 ((
ušt16_t
)0x03FFè

	)

5995 

	#USB_COUNT2_RX_NUM_BLOCK
 ((
ušt16_t
)0x7C00è

	)

5996 

	#USB_COUNT2_RX_NUM_BLOCK_0
 ((
ušt16_t
)0x0400è

	)

5997 

	#USB_COUNT2_RX_NUM_BLOCK_1
 ((
ušt16_t
)0x0800è

	)

5998 

	#USB_COUNT2_RX_NUM_BLOCK_2
 ((
ušt16_t
)0x1000è

	)

5999 

	#USB_COUNT2_RX_NUM_BLOCK_3
 ((
ušt16_t
)0x2000è

	)

6000 

	#USB_COUNT2_RX_NUM_BLOCK_4
 ((
ušt16_t
)0x4000è

	)

6002 

	#USB_COUNT2_RX_BLSIZE
 ((
ušt16_t
)0x8000è

	)

6005 

	#USB_COUNT3_RX_COUNT3_RX
 ((
ušt16_t
)0x03FFè

	)

6007 

	#USB_COUNT3_RX_NUM_BLOCK
 ((
ušt16_t
)0x7C00è

	)

6008 

	#USB_COUNT3_RX_NUM_BLOCK_0
 ((
ušt16_t
)0x0400è

	)

6009 

	#USB_COUNT3_RX_NUM_BLOCK_1
 ((
ušt16_t
)0x0800è

	)

6010 

	#USB_COUNT3_RX_NUM_BLOCK_2
 ((
ušt16_t
)0x1000è

	)

6011 

	#USB_COUNT3_RX_NUM_BLOCK_3
 ((
ušt16_t
)0x2000è

	)

6012 

	#USB_COUNT3_RX_NUM_BLOCK_4
 ((
ušt16_t
)0x4000è

	)

6014 

	#USB_COUNT3_RX_BLSIZE
 ((
ušt16_t
)0x8000è

	)

6017 

	#USB_COUNT4_RX_COUNT4_RX
 ((
ušt16_t
)0x03FFè

	)

6019 

	#USB_COUNT4_RX_NUM_BLOCK
 ((
ušt16_t
)0x7C00è

	)

6020 

	#USB_COUNT4_RX_NUM_BLOCK_0
 ((
ušt16_t
)0x0400è

	)

6021 

	#USB_COUNT4_RX_NUM_BLOCK_1
 ((
ušt16_t
)0x0800è

	)

6022 

	#USB_COUNT4_RX_NUM_BLOCK_2
 ((
ušt16_t
)0x1000è

	)

6023 

	#USB_COUNT4_RX_NUM_BLOCK_3
 ((
ušt16_t
)0x2000è

	)

6024 

	#USB_COUNT4_RX_NUM_BLOCK_4
 ((
ušt16_t
)0x4000è

	)

6026 

	#USB_COUNT4_RX_BLSIZE
 ((
ušt16_t
)0x8000è

	)

6029 

	#USB_COUNT5_RX_COUNT5_RX
 ((
ušt16_t
)0x03FFè

	)

6031 

	#USB_COUNT5_RX_NUM_BLOCK
 ((
ušt16_t
)0x7C00è

	)

6032 

	#USB_COUNT5_RX_NUM_BLOCK_0
 ((
ušt16_t
)0x0400è

	)

6033 

	#USB_COUNT5_RX_NUM_BLOCK_1
 ((
ušt16_t
)0x0800è

	)

6034 

	#USB_COUNT5_RX_NUM_BLOCK_2
 ((
ušt16_t
)0x1000è

	)

6035 

	#USB_COUNT5_RX_NUM_BLOCK_3
 ((
ušt16_t
)0x2000è

	)

6036 

	#USB_COUNT5_RX_NUM_BLOCK_4
 ((
ušt16_t
)0x4000è

	)

6038 

	#USB_COUNT5_RX_BLSIZE
 ((
ušt16_t
)0x8000è

	)

6041 

	#USB_COUNT6_RX_COUNT6_RX
 ((
ušt16_t
)0x03FFè

	)

6043 

	#USB_COUNT6_RX_NUM_BLOCK
 ((
ušt16_t
)0x7C00è

	)

6044 

	#USB_COUNT6_RX_NUM_BLOCK_0
 ((
ušt16_t
)0x0400è

	)

6045 

	#USB_COUNT6_RX_NUM_BLOCK_1
 ((
ušt16_t
)0x0800è

	)

6046 

	#USB_COUNT6_RX_NUM_BLOCK_2
 ((
ušt16_t
)0x1000è

	)

6047 

	#USB_COUNT6_RX_NUM_BLOCK_3
 ((
ušt16_t
)0x2000è

	)

6048 

	#USB_COUNT6_RX_NUM_BLOCK_4
 ((
ušt16_t
)0x4000è

	)

6050 

	#USB_COUNT6_RX_BLSIZE
 ((
ušt16_t
)0x8000è

	)

6053 

	#USB_COUNT7_RX_COUNT7_RX
 ((
ušt16_t
)0x03FFè

	)

6055 

	#USB_COUNT7_RX_NUM_BLOCK
 ((
ušt16_t
)0x7C00è

	)

6056 

	#USB_COUNT7_RX_NUM_BLOCK_0
 ((
ušt16_t
)0x0400è

	)

6057 

	#USB_COUNT7_RX_NUM_BLOCK_1
 ((
ušt16_t
)0x0800è

	)

6058 

	#USB_COUNT7_RX_NUM_BLOCK_2
 ((
ušt16_t
)0x1000è

	)

6059 

	#USB_COUNT7_RX_NUM_BLOCK_3
 ((
ušt16_t
)0x2000è

	)

6060 

	#USB_COUNT7_RX_NUM_BLOCK_4
 ((
ušt16_t
)0x4000è

	)

6062 

	#USB_COUNT7_RX_BLSIZE
 ((
ušt16_t
)0x8000è

	)

6067 

	#USB_COUNT0_RX_0_COUNT0_RX_0
 ((
ušt32_t
)0x000003FFè

	)

6069 

	#USB_COUNT0_RX_0_NUM_BLOCK_0
 ((
ušt32_t
)0x00007C00è

	)

6070 

	#USB_COUNT0_RX_0_NUM_BLOCK_0_0
 ((
ušt32_t
)0x00000400è

	)

6071 

	#USB_COUNT0_RX_0_NUM_BLOCK_0_1
 ((
ušt32_t
)0x00000800è

	)

6072 

	#USB_COUNT0_RX_0_NUM_BLOCK_0_2
 ((
ušt32_t
)0x00001000è

	)

6073 

	#USB_COUNT0_RX_0_NUM_BLOCK_0_3
 ((
ušt32_t
)0x00002000è

	)

6074 

	#USB_COUNT0_RX_0_NUM_BLOCK_0_4
 ((
ušt32_t
)0x00004000è

	)

6076 

	#USB_COUNT0_RX_0_BLSIZE_0
 ((
ušt32_t
)0x00008000è

	)

6079 

	#USB_COUNT0_RX_1_COUNT0_RX_1
 ((
ušt32_t
)0x03FF0000è

	)

6081 

	#USB_COUNT0_RX_1_NUM_BLOCK_1
 ((
ušt32_t
)0x7C000000è

	)

6082 

	#USB_COUNT0_RX_1_NUM_BLOCK_1_0
 ((
ušt32_t
)0x04000000è

	)

6083 

	#USB_COUNT0_RX_1_NUM_BLOCK_1_1
 ((
ušt32_t
)0x08000000è

	)

6084 

	#USB_COUNT0_RX_1_NUM_BLOCK_1_2
 ((
ušt32_t
)0x10000000è

	)

6085 

	#USB_COUNT0_RX_1_NUM_BLOCK_1_3
 ((
ušt32_t
)0x20000000è

	)

6086 

	#USB_COUNT0_RX_1_NUM_BLOCK_1_4
 ((
ušt32_t
)0x40000000è

	)

6088 

	#USB_COUNT0_RX_1_BLSIZE_1
 ((
ušt32_t
)0x80000000è

	)

6091 

	#USB_COUNT1_RX_0_COUNT1_RX_0
 ((
ušt32_t
)0x000003FFè

	)

6093 

	#USB_COUNT1_RX_0_NUM_BLOCK_0
 ((
ušt32_t
)0x00007C00è

	)

6094 

	#USB_COUNT1_RX_0_NUM_BLOCK_0_0
 ((
ušt32_t
)0x00000400è

	)

6095 

	#USB_COUNT1_RX_0_NUM_BLOCK_0_1
 ((
ušt32_t
)0x00000800è

	)

6096 

	#USB_COUNT1_RX_0_NUM_BLOCK_0_2
 ((
ušt32_t
)0x00001000è

	)

6097 

	#USB_COUNT1_RX_0_NUM_BLOCK_0_3
 ((
ušt32_t
)0x00002000è

	)

6098 

	#USB_COUNT1_RX_0_NUM_BLOCK_0_4
 ((
ušt32_t
)0x00004000è

	)

6100 

	#USB_COUNT1_RX_0_BLSIZE_0
 ((
ušt32_t
)0x00008000è

	)

6103 

	#USB_COUNT1_RX_1_COUNT1_RX_1
 ((
ušt32_t
)0x03FF0000è

	)

6105 

	#USB_COUNT1_RX_1_NUM_BLOCK_1
 ((
ušt32_t
)0x7C000000è

	)

6106 

	#USB_COUNT1_RX_1_NUM_BLOCK_1_0
 ((
ušt32_t
)0x04000000è

	)

6107 

	#USB_COUNT1_RX_1_NUM_BLOCK_1_1
 ((
ušt32_t
)0x08000000è

	)

6108 

	#USB_COUNT1_RX_1_NUM_BLOCK_1_2
 ((
ušt32_t
)0x10000000è

	)

6109 

	#USB_COUNT1_RX_1_NUM_BLOCK_1_3
 ((
ušt32_t
)0x20000000è

	)

6110 

	#USB_COUNT1_RX_1_NUM_BLOCK_1_4
 ((
ušt32_t
)0x40000000è

	)

6112 

	#USB_COUNT1_RX_1_BLSIZE_1
 ((
ušt32_t
)0x80000000è

	)

6115 

	#USB_COUNT2_RX_0_COUNT2_RX_0
 ((
ušt32_t
)0x000003FFè

	)

6117 

	#USB_COUNT2_RX_0_NUM_BLOCK_0
 ((
ušt32_t
)0x00007C00è

	)

6118 

	#USB_COUNT2_RX_0_NUM_BLOCK_0_0
 ((
ušt32_t
)0x00000400è

	)

6119 

	#USB_COUNT2_RX_0_NUM_BLOCK_0_1
 ((
ušt32_t
)0x00000800è

	)

6120 

	#USB_COUNT2_RX_0_NUM_BLOCK_0_2
 ((
ušt32_t
)0x00001000è

	)

6121 

	#USB_COUNT2_RX_0_NUM_BLOCK_0_3
 ((
ušt32_t
)0x00002000è

	)

6122 

	#USB_COUNT2_RX_0_NUM_BLOCK_0_4
 ((
ušt32_t
)0x00004000è

	)

6124 

	#USB_COUNT2_RX_0_BLSIZE_0
 ((
ušt32_t
)0x00008000è

	)

6127 

	#USB_COUNT2_RX_1_COUNT2_RX_1
 ((
ušt32_t
)0x03FF0000è

	)

6129 

	#USB_COUNT2_RX_1_NUM_BLOCK_1
 ((
ušt32_t
)0x7C000000è

	)

6130 

	#USB_COUNT2_RX_1_NUM_BLOCK_1_0
 ((
ušt32_t
)0x04000000è

	)

6131 

	#USB_COUNT2_RX_1_NUM_BLOCK_1_1
 ((
ušt32_t
)0x08000000è

	)

6132 

	#USB_COUNT2_RX_1_NUM_BLOCK_1_2
 ((
ušt32_t
)0x10000000è

	)

6133 

	#USB_COUNT2_RX_1_NUM_BLOCK_1_3
 ((
ušt32_t
)0x20000000è

	)

6134 

	#USB_COUNT2_RX_1_NUM_BLOCK_1_4
 ((
ušt32_t
)0x40000000è

	)

6136 

	#USB_COUNT2_RX_1_BLSIZE_1
 ((
ušt32_t
)0x80000000è

	)

6139 

	#USB_COUNT3_RX_0_COUNT3_RX_0
 ((
ušt32_t
)0x000003FFè

	)

6141 

	#USB_COUNT3_RX_0_NUM_BLOCK_0
 ((
ušt32_t
)0x00007C00è

	)

6142 

	#USB_COUNT3_RX_0_NUM_BLOCK_0_0
 ((
ušt32_t
)0x00000400è

	)

6143 

	#USB_COUNT3_RX_0_NUM_BLOCK_0_1
 ((
ušt32_t
)0x00000800è

	)

6144 

	#USB_COUNT3_RX_0_NUM_BLOCK_0_2
 ((
ušt32_t
)0x00001000è

	)

6145 

	#USB_COUNT3_RX_0_NUM_BLOCK_0_3
 ((
ušt32_t
)0x00002000è

	)

6146 

	#USB_COUNT3_RX_0_NUM_BLOCK_0_4
 ((
ušt32_t
)0x00004000è

	)

6148 

	#USB_COUNT3_RX_0_BLSIZE_0
 ((
ušt32_t
)0x00008000è

	)

6151 

	#USB_COUNT3_RX_1_COUNT3_RX_1
 ((
ušt32_t
)0x03FF0000è

	)

6153 

	#USB_COUNT3_RX_1_NUM_BLOCK_1
 ((
ušt32_t
)0x7C000000è

	)

6154 

	#USB_COUNT3_RX_1_NUM_BLOCK_1_0
 ((
ušt32_t
)0x04000000è

	)

6155 

	#USB_COUNT3_RX_1_NUM_BLOCK_1_1
 ((
ušt32_t
)0x08000000è

	)

6156 

	#USB_COUNT3_RX_1_NUM_BLOCK_1_2
 ((
ušt32_t
)0x10000000è

	)

6157 

	#USB_COUNT3_RX_1_NUM_BLOCK_1_3
 ((
ušt32_t
)0x20000000è

	)

6158 

	#USB_COUNT3_RX_1_NUM_BLOCK_1_4
 ((
ušt32_t
)0x40000000è

	)

6160 

	#USB_COUNT3_RX_1_BLSIZE_1
 ((
ušt32_t
)0x80000000è

	)

6163 

	#USB_COUNT4_RX_0_COUNT4_RX_0
 ((
ušt32_t
)0x000003FFè

	)

6165 

	#USB_COUNT4_RX_0_NUM_BLOCK_0
 ((
ušt32_t
)0x00007C00è

	)

6166 

	#USB_COUNT4_RX_0_NUM_BLOCK_0_0
 ((
ušt32_t
)0x00000400è

	)

6167 

	#USB_COUNT4_RX_0_NUM_BLOCK_0_1
 ((
ušt32_t
)0x00000800è

	)

6168 

	#USB_COUNT4_RX_0_NUM_BLOCK_0_2
 ((
ušt32_t
)0x00001000è

	)

6169 

	#USB_COUNT4_RX_0_NUM_BLOCK_0_3
 ((
ušt32_t
)0x00002000è

	)

6170 

	#USB_COUNT4_RX_0_NUM_BLOCK_0_4
 ((
ušt32_t
)0x00004000è

	)

6172 

	#USB_COUNT4_RX_0_BLSIZE_0
 ((
ušt32_t
)0x00008000è

	)

6175 

	#USB_COUNT4_RX_1_COUNT4_RX_1
 ((
ušt32_t
)0x03FF0000è

	)

6177 

	#USB_COUNT4_RX_1_NUM_BLOCK_1
 ((
ušt32_t
)0x7C000000è

	)

6178 

	#USB_COUNT4_RX_1_NUM_BLOCK_1_0
 ((
ušt32_t
)0x04000000è

	)

6179 

	#USB_COUNT4_RX_1_NUM_BLOCK_1_1
 ((
ušt32_t
)0x08000000è

	)

6180 

	#USB_COUNT4_RX_1_NUM_BLOCK_1_2
 ((
ušt32_t
)0x10000000è

	)

6181 

	#USB_COUNT4_RX_1_NUM_BLOCK_1_3
 ((
ušt32_t
)0x20000000è

	)

6182 

	#USB_COUNT4_RX_1_NUM_BLOCK_1_4
 ((
ušt32_t
)0x40000000è

	)

6184 

	#USB_COUNT4_RX_1_BLSIZE_1
 ((
ušt32_t
)0x80000000è

	)

6187 

	#USB_COUNT5_RX_0_COUNT5_RX_0
 ((
ušt32_t
)0x000003FFè

	)

6189 

	#USB_COUNT5_RX_0_NUM_BLOCK_0
 ((
ušt32_t
)0x00007C00è

	)

6190 

	#USB_COUNT5_RX_0_NUM_BLOCK_0_0
 ((
ušt32_t
)0x00000400è

	)

6191 

	#USB_COUNT5_RX_0_NUM_BLOCK_0_1
 ((
ušt32_t
)0x00000800è

	)

6192 

	#USB_COUNT5_RX_0_NUM_BLOCK_0_2
 ((
ušt32_t
)0x00001000è

	)

6193 

	#USB_COUNT5_RX_0_NUM_BLOCK_0_3
 ((
ušt32_t
)0x00002000è

	)

6194 

	#USB_COUNT5_RX_0_NUM_BLOCK_0_4
 ((
ušt32_t
)0x00004000è

	)

6196 

	#USB_COUNT5_RX_0_BLSIZE_0
 ((
ušt32_t
)0x00008000è

	)

6199 

	#USB_COUNT5_RX_1_COUNT5_RX_1
 ((
ušt32_t
)0x03FF0000è

	)

6201 

	#USB_COUNT5_RX_1_NUM_BLOCK_1
 ((
ušt32_t
)0x7C000000è

	)

6202 

	#USB_COUNT5_RX_1_NUM_BLOCK_1_0
 ((
ušt32_t
)0x04000000è

	)

6203 

	#USB_COUNT5_RX_1_NUM_BLOCK_1_1
 ((
ušt32_t
)0x08000000è

	)

6204 

	#USB_COUNT5_RX_1_NUM_BLOCK_1_2
 ((
ušt32_t
)0x10000000è

	)

6205 

	#USB_COUNT5_RX_1_NUM_BLOCK_1_3
 ((
ušt32_t
)0x20000000è

	)

6206 

	#USB_COUNT5_RX_1_NUM_BLOCK_1_4
 ((
ušt32_t
)0x40000000è

	)

6208 

	#USB_COUNT5_RX_1_BLSIZE_1
 ((
ušt32_t
)0x80000000è

	)

6211 

	#USB_COUNT6_RX_0_COUNT6_RX_0
 ((
ušt32_t
)0x000003FFè

	)

6213 

	#USB_COUNT6_RX_0_NUM_BLOCK_0
 ((
ušt32_t
)0x00007C00è

	)

6214 

	#USB_COUNT6_RX_0_NUM_BLOCK_0_0
 ((
ušt32_t
)0x00000400è

	)

6215 

	#USB_COUNT6_RX_0_NUM_BLOCK_0_1
 ((
ušt32_t
)0x00000800è

	)

6216 

	#USB_COUNT6_RX_0_NUM_BLOCK_0_2
 ((
ušt32_t
)0x00001000è

	)

6217 

	#USB_COUNT6_RX_0_NUM_BLOCK_0_3
 ((
ušt32_t
)0x00002000è

	)

6218 

	#USB_COUNT6_RX_0_NUM_BLOCK_0_4
 ((
ušt32_t
)0x00004000è

	)

6220 

	#USB_COUNT6_RX_0_BLSIZE_0
 ((
ušt32_t
)0x00008000è

	)

6223 

	#USB_COUNT6_RX_1_COUNT6_RX_1
 ((
ušt32_t
)0x03FF0000è

	)

6225 

	#USB_COUNT6_RX_1_NUM_BLOCK_1
 ((
ušt32_t
)0x7C000000è

	)

6226 

	#USB_COUNT6_RX_1_NUM_BLOCK_1_0
 ((
ušt32_t
)0x04000000è

	)

6227 

	#USB_COUNT6_RX_1_NUM_BLOCK_1_1
 ((
ušt32_t
)0x08000000è

	)

6228 

	#USB_COUNT6_RX_1_NUM_BLOCK_1_2
 ((
ušt32_t
)0x10000000è

	)

6229 

	#USB_COUNT6_RX_1_NUM_BLOCK_1_3
 ((
ušt32_t
)0x20000000è

	)

6230 

	#USB_COUNT6_RX_1_NUM_BLOCK_1_4
 ((
ušt32_t
)0x40000000è

	)

6232 

	#USB_COUNT6_RX_1_BLSIZE_1
 ((
ušt32_t
)0x80000000è

	)

6235 

	#USB_COUNT7_RX_0_COUNT7_RX_0
 ((
ušt32_t
)0x000003FFè

	)

6237 

	#USB_COUNT7_RX_0_NUM_BLOCK_0
 ((
ušt32_t
)0x00007C00è

	)

6238 

	#USB_COUNT7_RX_0_NUM_BLOCK_0_0
 ((
ušt32_t
)0x00000400è

	)

6239 

	#USB_COUNT7_RX_0_NUM_BLOCK_0_1
 ((
ušt32_t
)0x00000800è

	)

6240 

	#USB_COUNT7_RX_0_NUM_BLOCK_0_2
 ((
ušt32_t
)0x00001000è

	)

6241 

	#USB_COUNT7_RX_0_NUM_BLOCK_0_3
 ((
ušt32_t
)0x00002000è

	)

6242 

	#USB_COUNT7_RX_0_NUM_BLOCK_0_4
 ((
ušt32_t
)0x00004000è

	)

6244 

	#USB_COUNT7_RX_0_BLSIZE_0
 ((
ušt32_t
)0x00008000è

	)

6247 

	#USB_COUNT7_RX_1_COUNT7_RX_1
 ((
ušt32_t
)0x03FF0000è

	)

6249 

	#USB_COUNT7_RX_1_NUM_BLOCK_1
 ((
ušt32_t
)0x7C000000è

	)

6250 

	#USB_COUNT7_RX_1_NUM_BLOCK_1_0
 ((
ušt32_t
)0x04000000è

	)

6251 

	#USB_COUNT7_RX_1_NUM_BLOCK_1_1
 ((
ušt32_t
)0x08000000è

	)

6252 

	#USB_COUNT7_RX_1_NUM_BLOCK_1_2
 ((
ušt32_t
)0x10000000è

	)

6253 

	#USB_COUNT7_RX_1_NUM_BLOCK_1_3
 ((
ušt32_t
)0x20000000è

	)

6254 

	#USB_COUNT7_RX_1_NUM_BLOCK_1_4
 ((
ušt32_t
)0x40000000è

	)

6256 

	#USB_COUNT7_RX_1_BLSIZE_1
 ((
ušt32_t
)0x80000000è

	)

6266 

	#CAN_MCR_INRQ
 ((
ušt16_t
)0x0001è

	)

6267 

	#CAN_MCR_SLEEP
 ((
ušt16_t
)0x0002è

	)

6268 

	#CAN_MCR_TXFP
 ((
ušt16_t
)0x0004è

	)

6269 

	#CAN_MCR_RFLM
 ((
ušt16_t
)0x0008è

	)

6270 

	#CAN_MCR_NART
 ((
ušt16_t
)0x0010è

	)

6271 

	#CAN_MCR_AWUM
 ((
ušt16_t
)0x0020è

	)

6272 

	#CAN_MCR_ABOM
 ((
ušt16_t
)0x0040è

	)

6273 

	#CAN_MCR_TTCM
 ((
ušt16_t
)0x0080è

	)

6274 

	#CAN_MCR_RESET
 ((
ušt16_t
)0x8000è

	)

6277 

	#CAN_MSR_INAK
 ((
ušt16_t
)0x0001è

	)

6278 

	#CAN_MSR_SLAK
 ((
ušt16_t
)0x0002è

	)

6279 

	#CAN_MSR_ERRI
 ((
ušt16_t
)0x0004è

	)

6280 

	#CAN_MSR_WKUI
 ((
ušt16_t
)0x0008è

	)

6281 

	#CAN_MSR_SLAKI
 ((
ušt16_t
)0x0010è

	)

6282 

	#CAN_MSR_TXM
 ((
ušt16_t
)0x0100è

	)

6283 

	#CAN_MSR_RXM
 ((
ušt16_t
)0x0200è

	)

6284 

	#CAN_MSR_SAMP
 ((
ušt16_t
)0x0400è

	)

6285 

	#CAN_MSR_RX
 ((
ušt16_t
)0x0800è

	)

6288 

	#CAN_TSR_RQCP0
 ((
ušt32_t
)0x00000001è

	)

6289 

	#CAN_TSR_TXOK0
 ((
ušt32_t
)0x00000002è

	)

6290 

	#CAN_TSR_ALST0
 ((
ušt32_t
)0x00000004è

	)

6291 

	#CAN_TSR_TERR0
 ((
ušt32_t
)0x00000008è

	)

6292 

	#CAN_TSR_ABRQ0
 ((
ušt32_t
)0x00000080è

	)

6293 

	#CAN_TSR_RQCP1
 ((
ušt32_t
)0x00000100è

	)

6294 

	#CAN_TSR_TXOK1
 ((
ušt32_t
)0x00000200è

	)

6295 

	#CAN_TSR_ALST1
 ((
ušt32_t
)0x00000400è

	)

6296 

	#CAN_TSR_TERR1
 ((
ušt32_t
)0x00000800è

	)

6297 

	#CAN_TSR_ABRQ1
 ((
ušt32_t
)0x00008000è

	)

6298 

	#CAN_TSR_RQCP2
 ((
ušt32_t
)0x00010000è

	)

6299 

	#CAN_TSR_TXOK2
 ((
ušt32_t
)0x00020000è

	)

6300 

	#CAN_TSR_ALST2
 ((
ušt32_t
)0x00040000è

	)

6301 

	#CAN_TSR_TERR2
 ((
ušt32_t
)0x00080000è

	)

6302 

	#CAN_TSR_ABRQ2
 ((
ušt32_t
)0x00800000è

	)

6303 

	#CAN_TSR_CODE
 ((
ušt32_t
)0x03000000è

	)

6305 

	#CAN_TSR_TME
 ((
ušt32_t
)0x1C000000è

	)

6306 

	#CAN_TSR_TME0
 ((
ušt32_t
)0x04000000è

	)

6307 

	#CAN_TSR_TME1
 ((
ušt32_t
)0x08000000è

	)

6308 

	#CAN_TSR_TME2
 ((
ušt32_t
)0x10000000è

	)

6310 

	#CAN_TSR_LOW
 ((
ušt32_t
)0xE0000000è

	)

6311 

	#CAN_TSR_LOW0
 ((
ušt32_t
)0x20000000è

	)

6312 

	#CAN_TSR_LOW1
 ((
ušt32_t
)0x40000000è

	)

6313 

	#CAN_TSR_LOW2
 ((
ušt32_t
)0x80000000è

	)

6316 

	#CAN_RF0R_FMP0
 ((
ušt8_t
)0x03è

	)

6317 

	#CAN_RF0R_FULL0
 ((
ušt8_t
)0x08è

	)

6318 

	#CAN_RF0R_FOVR0
 ((
ušt8_t
)0x10è

	)

6319 

	#CAN_RF0R_RFOM0
 ((
ušt8_t
)0x20è

	)

6322 

	#CAN_RF1R_FMP1
 ((
ušt8_t
)0x03è

	)

6323 

	#CAN_RF1R_FULL1
 ((
ušt8_t
)0x08è

	)

6324 

	#CAN_RF1R_FOVR1
 ((
ušt8_t
)0x10è

	)

6325 

	#CAN_RF1R_RFOM1
 ((
ušt8_t
)0x20è

	)

6328 

	#CAN_IER_TMEIE
 ((
ušt32_t
)0x00000001è

	)

6329 

	#CAN_IER_FMPIE0
 ((
ušt32_t
)0x00000002è

	)

6330 

	#CAN_IER_FFIE0
 ((
ušt32_t
)0x00000004è

	)

6331 

	#CAN_IER_FOVIE0
 ((
ušt32_t
)0x00000008è

	)

6332 

	#CAN_IER_FMPIE1
 ((
ušt32_t
)0x00000010è

	)

6333 

	#CAN_IER_FFIE1
 ((
ušt32_t
)0x00000020è

	)

6334 

	#CAN_IER_FOVIE1
 ((
ušt32_t
)0x00000040è

	)

6335 

	#CAN_IER_EWGIE
 ((
ušt32_t
)0x00000100è

	)

6336 

	#CAN_IER_EPVIE
 ((
ušt32_t
)0x00000200è

	)

6337 

	#CAN_IER_BOFIE
 ((
ušt32_t
)0x00000400è

	)

6338 

	#CAN_IER_LECIE
 ((
ušt32_t
)0x00000800è

	)

6339 

	#CAN_IER_ERRIE
 ((
ušt32_t
)0x00008000è

	)

6340 

	#CAN_IER_WKUIE
 ((
ušt32_t
)0x00010000è

	)

6341 

	#CAN_IER_SLKIE
 ((
ušt32_t
)0x00020000è

	)

6344 

	#CAN_ESR_EWGF
 ((
ušt32_t
)0x00000001è

	)

6345 

	#CAN_ESR_EPVF
 ((
ušt32_t
)0x00000002è

	)

6346 

	#CAN_ESR_BOFF
 ((
ušt32_t
)0x00000004è

	)

6348 

	#CAN_ESR_LEC
 ((
ušt32_t
)0x00000070è

	)

6349 

	#CAN_ESR_LEC_0
 ((
ušt32_t
)0x00000010è

	)

6350 

	#CAN_ESR_LEC_1
 ((
ušt32_t
)0x00000020è

	)

6351 

	#CAN_ESR_LEC_2
 ((
ušt32_t
)0x00000040è

	)

6353 

	#CAN_ESR_TEC
 ((
ušt32_t
)0x00FF0000è

	)

6354 

	#CAN_ESR_REC
 ((
ušt32_t
)0xFF000000è

	)

6357 

	#CAN_BTR_BRP
 ((
ušt32_t
)0x000003FFè

	)

6358 

	#CAN_BTR_TS1
 ((
ušt32_t
)0x000F0000è

	)

6359 

	#CAN_BTR_TS2
 ((
ušt32_t
)0x00700000è

	)

6360 

	#CAN_BTR_SJW
 ((
ušt32_t
)0x03000000è

	)

6361 

	#CAN_BTR_LBKM
 ((
ušt32_t
)0x40000000è

	)

6362 

	#CAN_BTR_SILM
 ((
ušt32_t
)0x80000000è

	)

6366 

	#CAN_TI0R_TXRQ
 ((
ušt32_t
)0x00000001è

	)

6367 

	#CAN_TI0R_RTR
 ((
ušt32_t
)0x00000002è

	)

6368 

	#CAN_TI0R_IDE
 ((
ušt32_t
)0x00000004è

	)

6369 

	#CAN_TI0R_EXID
 ((
ušt32_t
)0x001FFFF8è

	)

6370 

	#CAN_TI0R_STID
 ((
ušt32_t
)0xFFE00000è

	)

6373 

	#CAN_TDT0R_DLC
 ((
ušt32_t
)0x0000000Fè

	)

6374 

	#CAN_TDT0R_TGT
 ((
ušt32_t
)0x00000100è

	)

6375 

	#CAN_TDT0R_TIME
 ((
ušt32_t
)0xFFFF0000è

	)

6378 

	#CAN_TDL0R_DATA0
 ((
ušt32_t
)0x000000FFè

	)

6379 

	#CAN_TDL0R_DATA1
 ((
ušt32_t
)0x0000FF00è

	)

6380 

	#CAN_TDL0R_DATA2
 ((
ušt32_t
)0x00FF0000è

	)

6381 

	#CAN_TDL0R_DATA3
 ((
ušt32_t
)0xFF000000è

	)

6384 

	#CAN_TDH0R_DATA4
 ((
ušt32_t
)0x000000FFè

	)

6385 

	#CAN_TDH0R_DATA5
 ((
ušt32_t
)0x0000FF00è

	)

6386 

	#CAN_TDH0R_DATA6
 ((
ušt32_t
)0x00FF0000è

	)

6387 

	#CAN_TDH0R_DATA7
 ((
ušt32_t
)0xFF000000è

	)

6390 

	#CAN_TI1R_TXRQ
 ((
ušt32_t
)0x00000001è

	)

6391 

	#CAN_TI1R_RTR
 ((
ušt32_t
)0x00000002è

	)

6392 

	#CAN_TI1R_IDE
 ((
ušt32_t
)0x00000004è

	)

6393 

	#CAN_TI1R_EXID
 ((
ušt32_t
)0x001FFFF8è

	)

6394 

	#CAN_TI1R_STID
 ((
ušt32_t
)0xFFE00000è

	)

6397 

	#CAN_TDT1R_DLC
 ((
ušt32_t
)0x0000000Fè

	)

6398 

	#CAN_TDT1R_TGT
 ((
ušt32_t
)0x00000100è

	)

6399 

	#CAN_TDT1R_TIME
 ((
ušt32_t
)0xFFFF0000è

	)

6402 

	#CAN_TDL1R_DATA0
 ((
ušt32_t
)0x000000FFè

	)

6403 

	#CAN_TDL1R_DATA1
 ((
ušt32_t
)0x0000FF00è

	)

6404 

	#CAN_TDL1R_DATA2
 ((
ušt32_t
)0x00FF0000è

	)

6405 

	#CAN_TDL1R_DATA3
 ((
ušt32_t
)0xFF000000è

	)

6408 

	#CAN_TDH1R_DATA4
 ((
ušt32_t
)0x000000FFè

	)

6409 

	#CAN_TDH1R_DATA5
 ((
ušt32_t
)0x0000FF00è

	)

6410 

	#CAN_TDH1R_DATA6
 ((
ušt32_t
)0x00FF0000è

	)

6411 

	#CAN_TDH1R_DATA7
 ((
ušt32_t
)0xFF000000è

	)

6414 

	#CAN_TI2R_TXRQ
 ((
ušt32_t
)0x00000001è

	)

6415 

	#CAN_TI2R_RTR
 ((
ušt32_t
)0x00000002è

	)

6416 

	#CAN_TI2R_IDE
 ((
ušt32_t
)0x00000004è

	)

6417 

	#CAN_TI2R_EXID
 ((
ušt32_t
)0x001FFFF8è

	)

6418 

	#CAN_TI2R_STID
 ((
ušt32_t
)0xFFE00000è

	)

6421 

	#CAN_TDT2R_DLC
 ((
ušt32_t
)0x0000000Fè

	)

6422 

	#CAN_TDT2R_TGT
 ((
ušt32_t
)0x00000100è

	)

6423 

	#CAN_TDT2R_TIME
 ((
ušt32_t
)0xFFFF0000è

	)

6426 

	#CAN_TDL2R_DATA0
 ((
ušt32_t
)0x000000FFè

	)

6427 

	#CAN_TDL2R_DATA1
 ((
ušt32_t
)0x0000FF00è

	)

6428 

	#CAN_TDL2R_DATA2
 ((
ušt32_t
)0x00FF0000è

	)

6429 

	#CAN_TDL2R_DATA3
 ((
ušt32_t
)0xFF000000è

	)

6432 

	#CAN_TDH2R_DATA4
 ((
ušt32_t
)0x000000FFè

	)

6433 

	#CAN_TDH2R_DATA5
 ((
ušt32_t
)0x0000FF00è

	)

6434 

	#CAN_TDH2R_DATA6
 ((
ušt32_t
)0x00FF0000è

	)

6435 

	#CAN_TDH2R_DATA7
 ((
ušt32_t
)0xFF000000è

	)

6438 

	#CAN_RI0R_RTR
 ((
ušt32_t
)0x00000002è

	)

6439 

	#CAN_RI0R_IDE
 ((
ušt32_t
)0x00000004è

	)

6440 

	#CAN_RI0R_EXID
 ((
ušt32_t
)0x001FFFF8è

	)

6441 

	#CAN_RI0R_STID
 ((
ušt32_t
)0xFFE00000è

	)

6444 

	#CAN_RDT0R_DLC
 ((
ušt32_t
)0x0000000Fè

	)

6445 

	#CAN_RDT0R_FMI
 ((
ušt32_t
)0x0000FF00è

	)

6446 

	#CAN_RDT0R_TIME
 ((
ušt32_t
)0xFFFF0000è

	)

6449 

	#CAN_RDL0R_DATA0
 ((
ušt32_t
)0x000000FFè

	)

6450 

	#CAN_RDL0R_DATA1
 ((
ušt32_t
)0x0000FF00è

	)

6451 

	#CAN_RDL0R_DATA2
 ((
ušt32_t
)0x00FF0000è

	)

6452 

	#CAN_RDL0R_DATA3
 ((
ušt32_t
)0xFF000000è

	)

6455 

	#CAN_RDH0R_DATA4
 ((
ušt32_t
)0x000000FFè

	)

6456 

	#CAN_RDH0R_DATA5
 ((
ušt32_t
)0x0000FF00è

	)

6457 

	#CAN_RDH0R_DATA6
 ((
ušt32_t
)0x00FF0000è

	)

6458 

	#CAN_RDH0R_DATA7
 ((
ušt32_t
)0xFF000000è

	)

6461 

	#CAN_RI1R_RTR
 ((
ušt32_t
)0x00000002è

	)

6462 

	#CAN_RI1R_IDE
 ((
ušt32_t
)0x00000004è

	)

6463 

	#CAN_RI1R_EXID
 ((
ušt32_t
)0x001FFFF8è

	)

6464 

	#CAN_RI1R_STID
 ((
ušt32_t
)0xFFE00000è

	)

6467 

	#CAN_RDT1R_DLC
 ((
ušt32_t
)0x0000000Fè

	)

6468 

	#CAN_RDT1R_FMI
 ((
ušt32_t
)0x0000FF00è

	)

6469 

	#CAN_RDT1R_TIME
 ((
ušt32_t
)0xFFFF0000è

	)

6472 

	#CAN_RDL1R_DATA0
 ((
ušt32_t
)0x000000FFè

	)

6473 

	#CAN_RDL1R_DATA1
 ((
ušt32_t
)0x0000FF00è

	)

6474 

	#CAN_RDL1R_DATA2
 ((
ušt32_t
)0x00FF0000è

	)

6475 

	#CAN_RDL1R_DATA3
 ((
ušt32_t
)0xFF000000è

	)

6478 

	#CAN_RDH1R_DATA4
 ((
ušt32_t
)0x000000FFè

	)

6479 

	#CAN_RDH1R_DATA5
 ((
ušt32_t
)0x0000FF00è

	)

6480 

	#CAN_RDH1R_DATA6
 ((
ušt32_t
)0x00FF0000è

	)

6481 

	#CAN_RDH1R_DATA7
 ((
ušt32_t
)0xFF000000è

	)

6485 

	#CAN_FMR_FINIT
 ((
ušt8_t
)0x01è

	)

6488 

	#CAN_FM1R_FBM
 ((
ušt16_t
)0x3FFFè

	)

6489 

	#CAN_FM1R_FBM0
 ((
ušt16_t
)0x0001è

	)

6490 

	#CAN_FM1R_FBM1
 ((
ušt16_t
)0x0002è

	)

6491 

	#CAN_FM1R_FBM2
 ((
ušt16_t
)0x0004è

	)

6492 

	#CAN_FM1R_FBM3
 ((
ušt16_t
)0x0008è

	)

6493 

	#CAN_FM1R_FBM4
 ((
ušt16_t
)0x0010è

	)

6494 

	#CAN_FM1R_FBM5
 ((
ušt16_t
)0x0020è

	)

6495 

	#CAN_FM1R_FBM6
 ((
ušt16_t
)0x0040è

	)

6496 

	#CAN_FM1R_FBM7
 ((
ušt16_t
)0x0080è

	)

6497 

	#CAN_FM1R_FBM8
 ((
ušt16_t
)0x0100è

	)

6498 

	#CAN_FM1R_FBM9
 ((
ušt16_t
)0x0200è

	)

6499 

	#CAN_FM1R_FBM10
 ((
ušt16_t
)0x0400è

	)

6500 

	#CAN_FM1R_FBM11
 ((
ušt16_t
)0x0800è

	)

6501 

	#CAN_FM1R_FBM12
 ((
ušt16_t
)0x1000è

	)

6502 

	#CAN_FM1R_FBM13
 ((
ušt16_t
)0x2000è

	)

6505 

	#CAN_FS1R_FSC
 ((
ušt16_t
)0x3FFFè

	)

6506 

	#CAN_FS1R_FSC0
 ((
ušt16_t
)0x0001è

	)

6507 

	#CAN_FS1R_FSC1
 ((
ušt16_t
)0x0002è

	)

6508 

	#CAN_FS1R_FSC2
 ((
ušt16_t
)0x0004è

	)

6509 

	#CAN_FS1R_FSC3
 ((
ušt16_t
)0x0008è

	)

6510 

	#CAN_FS1R_FSC4
 ((
ušt16_t
)0x0010è

	)

6511 

	#CAN_FS1R_FSC5
 ((
ušt16_t
)0x0020è

	)

6512 

	#CAN_FS1R_FSC6
 ((
ušt16_t
)0x0040è

	)

6513 

	#CAN_FS1R_FSC7
 ((
ušt16_t
)0x0080è

	)

6514 

	#CAN_FS1R_FSC8
 ((
ušt16_t
)0x0100è

	)

6515 

	#CAN_FS1R_FSC9
 ((
ušt16_t
)0x0200è

	)

6516 

	#CAN_FS1R_FSC10
 ((
ušt16_t
)0x0400è

	)

6517 

	#CAN_FS1R_FSC11
 ((
ušt16_t
)0x0800è

	)

6518 

	#CAN_FS1R_FSC12
 ((
ušt16_t
)0x1000è

	)

6519 

	#CAN_FS1R_FSC13
 ((
ušt16_t
)0x2000è

	)

6522 

	#CAN_FFA1R_FFA
 ((
ušt16_t
)0x3FFFè

	)

6523 

	#CAN_FFA1R_FFA0
 ((
ušt16_t
)0x0001è

	)

6524 

	#CAN_FFA1R_FFA1
 ((
ušt16_t
)0x0002è

	)

6525 

	#CAN_FFA1R_FFA2
 ((
ušt16_t
)0x0004è

	)

6526 

	#CAN_FFA1R_FFA3
 ((
ušt16_t
)0x0008è

	)

6527 

	#CAN_FFA1R_FFA4
 ((
ušt16_t
)0x0010è

	)

6528 

	#CAN_FFA1R_FFA5
 ((
ušt16_t
)0x0020è

	)

6529 

	#CAN_FFA1R_FFA6
 ((
ušt16_t
)0x0040è

	)

6530 

	#CAN_FFA1R_FFA7
 ((
ušt16_t
)0x0080è

	)

6531 

	#CAN_FFA1R_FFA8
 ((
ušt16_t
)0x0100è

	)

6532 

	#CAN_FFA1R_FFA9
 ((
ušt16_t
)0x0200è

	)

6533 

	#CAN_FFA1R_FFA10
 ((
ušt16_t
)0x0400è

	)

6534 

	#CAN_FFA1R_FFA11
 ((
ušt16_t
)0x0800è

	)

6535 

	#CAN_FFA1R_FFA12
 ((
ušt16_t
)0x1000è

	)

6536 

	#CAN_FFA1R_FFA13
 ((
ušt16_t
)0x2000è

	)

6539 

	#CAN_FA1R_FACT
 ((
ušt16_t
)0x3FFFè

	)

6540 

	#CAN_FA1R_FACT0
 ((
ušt16_t
)0x0001è

	)

6541 

	#CAN_FA1R_FACT1
 ((
ušt16_t
)0x0002è

	)

6542 

	#CAN_FA1R_FACT2
 ((
ušt16_t
)0x0004è

	)

6543 

	#CAN_FA1R_FACT3
 ((
ušt16_t
)0x0008è

	)

6544 

	#CAN_FA1R_FACT4
 ((
ušt16_t
)0x0010è

	)

6545 

	#CAN_FA1R_FACT5
 ((
ušt16_t
)0x0020è

	)

6546 

	#CAN_FA1R_FACT6
 ((
ušt16_t
)0x0040è

	)

6547 

	#CAN_FA1R_FACT7
 ((
ušt16_t
)0x0080è

	)

6548 

	#CAN_FA1R_FACT8
 ((
ušt16_t
)0x0100è

	)

6549 

	#CAN_FA1R_FACT9
 ((
ušt16_t
)0x0200è

	)

6550 

	#CAN_FA1R_FACT10
 ((
ušt16_t
)0x0400è

	)

6551 

	#CAN_FA1R_FACT11
 ((
ušt16_t
)0x0800è

	)

6552 

	#CAN_FA1R_FACT12
 ((
ušt16_t
)0x1000è

	)

6553 

	#CAN_FA1R_FACT13
 ((
ušt16_t
)0x2000è

	)

6556 

	#CAN_F0R1_FB0
 ((
ušt32_t
)0x00000001è

	)

6557 

	#CAN_F0R1_FB1
 ((
ušt32_t
)0x00000002è

	)

6558 

	#CAN_F0R1_FB2
 ((
ušt32_t
)0x00000004è

	)

6559 

	#CAN_F0R1_FB3
 ((
ušt32_t
)0x00000008è

	)

6560 

	#CAN_F0R1_FB4
 ((
ušt32_t
)0x00000010è

	)

6561 

	#CAN_F0R1_FB5
 ((
ušt32_t
)0x00000020è

	)

6562 

	#CAN_F0R1_FB6
 ((
ušt32_t
)0x00000040è

	)

6563 

	#CAN_F0R1_FB7
 ((
ušt32_t
)0x00000080è

	)

6564 

	#CAN_F0R1_FB8
 ((
ušt32_t
)0x00000100è

	)

6565 

	#CAN_F0R1_FB9
 ((
ušt32_t
)0x00000200è

	)

6566 

	#CAN_F0R1_FB10
 ((
ušt32_t
)0x00000400è

	)

6567 

	#CAN_F0R1_FB11
 ((
ušt32_t
)0x00000800è

	)

6568 

	#CAN_F0R1_FB12
 ((
ušt32_t
)0x00001000è

	)

6569 

	#CAN_F0R1_FB13
 ((
ušt32_t
)0x00002000è

	)

6570 

	#CAN_F0R1_FB14
 ((
ušt32_t
)0x00004000è

	)

6571 

	#CAN_F0R1_FB15
 ((
ušt32_t
)0x00008000è

	)

6572 

	#CAN_F0R1_FB16
 ((
ušt32_t
)0x00010000è

	)

6573 

	#CAN_F0R1_FB17
 ((
ušt32_t
)0x00020000è

	)

6574 

	#CAN_F0R1_FB18
 ((
ušt32_t
)0x00040000è

	)

6575 

	#CAN_F0R1_FB19
 ((
ušt32_t
)0x00080000è

	)

6576 

	#CAN_F0R1_FB20
 ((
ušt32_t
)0x00100000è

	)

6577 

	#CAN_F0R1_FB21
 ((
ušt32_t
)0x00200000è

	)

6578 

	#CAN_F0R1_FB22
 ((
ušt32_t
)0x00400000è

	)

6579 

	#CAN_F0R1_FB23
 ((
ušt32_t
)0x00800000è

	)

6580 

	#CAN_F0R1_FB24
 ((
ušt32_t
)0x01000000è

	)

6581 

	#CAN_F0R1_FB25
 ((
ušt32_t
)0x02000000è

	)

6582 

	#CAN_F0R1_FB26
 ((
ušt32_t
)0x04000000è

	)

6583 

	#CAN_F0R1_FB27
 ((
ušt32_t
)0x08000000è

	)

6584 

	#CAN_F0R1_FB28
 ((
ušt32_t
)0x10000000è

	)

6585 

	#CAN_F0R1_FB29
 ((
ušt32_t
)0x20000000è

	)

6586 

	#CAN_F0R1_FB30
 ((
ušt32_t
)0x40000000è

	)

6587 

	#CAN_F0R1_FB31
 ((
ušt32_t
)0x80000000è

	)

6590 

	#CAN_F1R1_FB0
 ((
ušt32_t
)0x00000001è

	)

6591 

	#CAN_F1R1_FB1
 ((
ušt32_t
)0x00000002è

	)

6592 

	#CAN_F1R1_FB2
 ((
ušt32_t
)0x00000004è

	)

6593 

	#CAN_F1R1_FB3
 ((
ušt32_t
)0x00000008è

	)

6594 

	#CAN_F1R1_FB4
 ((
ušt32_t
)0x00000010è

	)

6595 

	#CAN_F1R1_FB5
 ((
ušt32_t
)0x00000020è

	)

6596 

	#CAN_F1R1_FB6
 ((
ušt32_t
)0x00000040è

	)

6597 

	#CAN_F1R1_FB7
 ((
ušt32_t
)0x00000080è

	)

6598 

	#CAN_F1R1_FB8
 ((
ušt32_t
)0x00000100è

	)

6599 

	#CAN_F1R1_FB9
 ((
ušt32_t
)0x00000200è

	)

6600 

	#CAN_F1R1_FB10
 ((
ušt32_t
)0x00000400è

	)

6601 

	#CAN_F1R1_FB11
 ((
ušt32_t
)0x00000800è

	)

6602 

	#CAN_F1R1_FB12
 ((
ušt32_t
)0x00001000è

	)

6603 

	#CAN_F1R1_FB13
 ((
ušt32_t
)0x00002000è

	)

6604 

	#CAN_F1R1_FB14
 ((
ušt32_t
)0x00004000è

	)

6605 

	#CAN_F1R1_FB15
 ((
ušt32_t
)0x00008000è

	)

6606 

	#CAN_F1R1_FB16
 ((
ušt32_t
)0x00010000è

	)

6607 

	#CAN_F1R1_FB17
 ((
ušt32_t
)0x00020000è

	)

6608 

	#CAN_F1R1_FB18
 ((
ušt32_t
)0x00040000è

	)

6609 

	#CAN_F1R1_FB19
 ((
ušt32_t
)0x00080000è

	)

6610 

	#CAN_F1R1_FB20
 ((
ušt32_t
)0x00100000è

	)

6611 

	#CAN_F1R1_FB21
 ((
ušt32_t
)0x00200000è

	)

6612 

	#CAN_F1R1_FB22
 ((
ušt32_t
)0x00400000è

	)

6613 

	#CAN_F1R1_FB23
 ((
ušt32_t
)0x00800000è

	)

6614 

	#CAN_F1R1_FB24
 ((
ušt32_t
)0x01000000è

	)

6615 

	#CAN_F1R1_FB25
 ((
ušt32_t
)0x02000000è

	)

6616 

	#CAN_F1R1_FB26
 ((
ušt32_t
)0x04000000è

	)

6617 

	#CAN_F1R1_FB27
 ((
ušt32_t
)0x08000000è

	)

6618 

	#CAN_F1R1_FB28
 ((
ušt32_t
)0x10000000è

	)

6619 

	#CAN_F1R1_FB29
 ((
ušt32_t
)0x20000000è

	)

6620 

	#CAN_F1R1_FB30
 ((
ušt32_t
)0x40000000è

	)

6621 

	#CAN_F1R1_FB31
 ((
ušt32_t
)0x80000000è

	)

6624 

	#CAN_F2R1_FB0
 ((
ušt32_t
)0x00000001è

	)

6625 

	#CAN_F2R1_FB1
 ((
ušt32_t
)0x00000002è

	)

6626 

	#CAN_F2R1_FB2
 ((
ušt32_t
)0x00000004è

	)

6627 

	#CAN_F2R1_FB3
 ((
ušt32_t
)0x00000008è

	)

6628 

	#CAN_F2R1_FB4
 ((
ušt32_t
)0x00000010è

	)

6629 

	#CAN_F2R1_FB5
 ((
ušt32_t
)0x00000020è

	)

6630 

	#CAN_F2R1_FB6
 ((
ušt32_t
)0x00000040è

	)

6631 

	#CAN_F2R1_FB7
 ((
ušt32_t
)0x00000080è

	)

6632 

	#CAN_F2R1_FB8
 ((
ušt32_t
)0x00000100è

	)

6633 

	#CAN_F2R1_FB9
 ((
ušt32_t
)0x00000200è

	)

6634 

	#CAN_F2R1_FB10
 ((
ušt32_t
)0x00000400è

	)

6635 

	#CAN_F2R1_FB11
 ((
ušt32_t
)0x00000800è

	)

6636 

	#CAN_F2R1_FB12
 ((
ušt32_t
)0x00001000è

	)

6637 

	#CAN_F2R1_FB13
 ((
ušt32_t
)0x00002000è

	)

6638 

	#CAN_F2R1_FB14
 ((
ušt32_t
)0x00004000è

	)

6639 

	#CAN_F2R1_FB15
 ((
ušt32_t
)0x00008000è

	)

6640 

	#CAN_F2R1_FB16
 ((
ušt32_t
)0x00010000è

	)

6641 

	#CAN_F2R1_FB17
 ((
ušt32_t
)0x00020000è

	)

6642 

	#CAN_F2R1_FB18
 ((
ušt32_t
)0x00040000è

	)

6643 

	#CAN_F2R1_FB19
 ((
ušt32_t
)0x00080000è

	)

6644 

	#CAN_F2R1_FB20
 ((
ušt32_t
)0x00100000è

	)

6645 

	#CAN_F2R1_FB21
 ((
ušt32_t
)0x00200000è

	)

6646 

	#CAN_F2R1_FB22
 ((
ušt32_t
)0x00400000è

	)

6647 

	#CAN_F2R1_FB23
 ((
ušt32_t
)0x00800000è

	)

6648 

	#CAN_F2R1_FB24
 ((
ušt32_t
)0x01000000è

	)

6649 

	#CAN_F2R1_FB25
 ((
ušt32_t
)0x02000000è

	)

6650 

	#CAN_F2R1_FB26
 ((
ušt32_t
)0x04000000è

	)

6651 

	#CAN_F2R1_FB27
 ((
ušt32_t
)0x08000000è

	)

6652 

	#CAN_F2R1_FB28
 ((
ušt32_t
)0x10000000è

	)

6653 

	#CAN_F2R1_FB29
 ((
ušt32_t
)0x20000000è

	)

6654 

	#CAN_F2R1_FB30
 ((
ušt32_t
)0x40000000è

	)

6655 

	#CAN_F2R1_FB31
 ((
ušt32_t
)0x80000000è

	)

6658 

	#CAN_F3R1_FB0
 ((
ušt32_t
)0x00000001è

	)

6659 

	#CAN_F3R1_FB1
 ((
ušt32_t
)0x00000002è

	)

6660 

	#CAN_F3R1_FB2
 ((
ušt32_t
)0x00000004è

	)

6661 

	#CAN_F3R1_FB3
 ((
ušt32_t
)0x00000008è

	)

6662 

	#CAN_F3R1_FB4
 ((
ušt32_t
)0x00000010è

	)

6663 

	#CAN_F3R1_FB5
 ((
ušt32_t
)0x00000020è

	)

6664 

	#CAN_F3R1_FB6
 ((
ušt32_t
)0x00000040è

	)

6665 

	#CAN_F3R1_FB7
 ((
ušt32_t
)0x00000080è

	)

6666 

	#CAN_F3R1_FB8
 ((
ušt32_t
)0x00000100è

	)

6667 

	#CAN_F3R1_FB9
 ((
ušt32_t
)0x00000200è

	)

6668 

	#CAN_F3R1_FB10
 ((
ušt32_t
)0x00000400è

	)

6669 

	#CAN_F3R1_FB11
 ((
ušt32_t
)0x00000800è

	)

6670 

	#CAN_F3R1_FB12
 ((
ušt32_t
)0x00001000è

	)

6671 

	#CAN_F3R1_FB13
 ((
ušt32_t
)0x00002000è

	)

6672 

	#CAN_F3R1_FB14
 ((
ušt32_t
)0x00004000è

	)

6673 

	#CAN_F3R1_FB15
 ((
ušt32_t
)0x00008000è

	)

6674 

	#CAN_F3R1_FB16
 ((
ušt32_t
)0x00010000è

	)

6675 

	#CAN_F3R1_FB17
 ((
ušt32_t
)0x00020000è

	)

6676 

	#CAN_F3R1_FB18
 ((
ušt32_t
)0x00040000è

	)

6677 

	#CAN_F3R1_FB19
 ((
ušt32_t
)0x00080000è

	)

6678 

	#CAN_F3R1_FB20
 ((
ušt32_t
)0x00100000è

	)

6679 

	#CAN_F3R1_FB21
 ((
ušt32_t
)0x00200000è

	)

6680 

	#CAN_F3R1_FB22
 ((
ušt32_t
)0x00400000è

	)

6681 

	#CAN_F3R1_FB23
 ((
ušt32_t
)0x00800000è

	)

6682 

	#CAN_F3R1_FB24
 ((
ušt32_t
)0x01000000è

	)

6683 

	#CAN_F3R1_FB25
 ((
ušt32_t
)0x02000000è

	)

6684 

	#CAN_F3R1_FB26
 ((
ušt32_t
)0x04000000è

	)

6685 

	#CAN_F3R1_FB27
 ((
ušt32_t
)0x08000000è

	)

6686 

	#CAN_F3R1_FB28
 ((
ušt32_t
)0x10000000è

	)

6687 

	#CAN_F3R1_FB29
 ((
ušt32_t
)0x20000000è

	)

6688 

	#CAN_F3R1_FB30
 ((
ušt32_t
)0x40000000è

	)

6689 

	#CAN_F3R1_FB31
 ((
ušt32_t
)0x80000000è

	)

6692 

	#CAN_F4R1_FB0
 ((
ušt32_t
)0x00000001è

	)

6693 

	#CAN_F4R1_FB1
 ((
ušt32_t
)0x00000002è

	)

6694 

	#CAN_F4R1_FB2
 ((
ušt32_t
)0x00000004è

	)

6695 

	#CAN_F4R1_FB3
 ((
ušt32_t
)0x00000008è

	)

6696 

	#CAN_F4R1_FB4
 ((
ušt32_t
)0x00000010è

	)

6697 

	#CAN_F4R1_FB5
 ((
ušt32_t
)0x00000020è

	)

6698 

	#CAN_F4R1_FB6
 ((
ušt32_t
)0x00000040è

	)

6699 

	#CAN_F4R1_FB7
 ((
ušt32_t
)0x00000080è

	)

6700 

	#CAN_F4R1_FB8
 ((
ušt32_t
)0x00000100è

	)

6701 

	#CAN_F4R1_FB9
 ((
ušt32_t
)0x00000200è

	)

6702 

	#CAN_F4R1_FB10
 ((
ušt32_t
)0x00000400è

	)

6703 

	#CAN_F4R1_FB11
 ((
ušt32_t
)0x00000800è

	)

6704 

	#CAN_F4R1_FB12
 ((
ušt32_t
)0x00001000è

	)

6705 

	#CAN_F4R1_FB13
 ((
ušt32_t
)0x00002000è

	)

6706 

	#CAN_F4R1_FB14
 ((
ušt32_t
)0x00004000è

	)

6707 

	#CAN_F4R1_FB15
 ((
ušt32_t
)0x00008000è

	)

6708 

	#CAN_F4R1_FB16
 ((
ušt32_t
)0x00010000è

	)

6709 

	#CAN_F4R1_FB17
 ((
ušt32_t
)0x00020000è

	)

6710 

	#CAN_F4R1_FB18
 ((
ušt32_t
)0x00040000è

	)

6711 

	#CAN_F4R1_FB19
 ((
ušt32_t
)0x00080000è

	)

6712 

	#CAN_F4R1_FB20
 ((
ušt32_t
)0x00100000è

	)

6713 

	#CAN_F4R1_FB21
 ((
ušt32_t
)0x00200000è

	)

6714 

	#CAN_F4R1_FB22
 ((
ušt32_t
)0x00400000è

	)

6715 

	#CAN_F4R1_FB23
 ((
ušt32_t
)0x00800000è

	)

6716 

	#CAN_F4R1_FB24
 ((
ušt32_t
)0x01000000è

	)

6717 

	#CAN_F4R1_FB25
 ((
ušt32_t
)0x02000000è

	)

6718 

	#CAN_F4R1_FB26
 ((
ušt32_t
)0x04000000è

	)

6719 

	#CAN_F4R1_FB27
 ((
ušt32_t
)0x08000000è

	)

6720 

	#CAN_F4R1_FB28
 ((
ušt32_t
)0x10000000è

	)

6721 

	#CAN_F4R1_FB29
 ((
ušt32_t
)0x20000000è

	)

6722 

	#CAN_F4R1_FB30
 ((
ušt32_t
)0x40000000è

	)

6723 

	#CAN_F4R1_FB31
 ((
ušt32_t
)0x80000000è

	)

6726 

	#CAN_F5R1_FB0
 ((
ušt32_t
)0x00000001è

	)

6727 

	#CAN_F5R1_FB1
 ((
ušt32_t
)0x00000002è

	)

6728 

	#CAN_F5R1_FB2
 ((
ušt32_t
)0x00000004è

	)

6729 

	#CAN_F5R1_FB3
 ((
ušt32_t
)0x00000008è

	)

6730 

	#CAN_F5R1_FB4
 ((
ušt32_t
)0x00000010è

	)

6731 

	#CAN_F5R1_FB5
 ((
ušt32_t
)0x00000020è

	)

6732 

	#CAN_F5R1_FB6
 ((
ušt32_t
)0x00000040è

	)

6733 

	#CAN_F5R1_FB7
 ((
ušt32_t
)0x00000080è

	)

6734 

	#CAN_F5R1_FB8
 ((
ušt32_t
)0x00000100è

	)

6735 

	#CAN_F5R1_FB9
 ((
ušt32_t
)0x00000200è

	)

6736 

	#CAN_F5R1_FB10
 ((
ušt32_t
)0x00000400è

	)

6737 

	#CAN_F5R1_FB11
 ((
ušt32_t
)0x00000800è

	)

6738 

	#CAN_F5R1_FB12
 ((
ušt32_t
)0x00001000è

	)

6739 

	#CAN_F5R1_FB13
 ((
ušt32_t
)0x00002000è

	)

6740 

	#CAN_F5R1_FB14
 ((
ušt32_t
)0x00004000è

	)

6741 

	#CAN_F5R1_FB15
 ((
ušt32_t
)0x00008000è

	)

6742 

	#CAN_F5R1_FB16
 ((
ušt32_t
)0x00010000è

	)

6743 

	#CAN_F5R1_FB17
 ((
ušt32_t
)0x00020000è

	)

6744 

	#CAN_F5R1_FB18
 ((
ušt32_t
)0x00040000è

	)

6745 

	#CAN_F5R1_FB19
 ((
ušt32_t
)0x00080000è

	)

6746 

	#CAN_F5R1_FB20
 ((
ušt32_t
)0x00100000è

	)

6747 

	#CAN_F5R1_FB21
 ((
ušt32_t
)0x00200000è

	)

6748 

	#CAN_F5R1_FB22
 ((
ušt32_t
)0x00400000è

	)

6749 

	#CAN_F5R1_FB23
 ((
ušt32_t
)0x00800000è

	)

6750 

	#CAN_F5R1_FB24
 ((
ušt32_t
)0x01000000è

	)

6751 

	#CAN_F5R1_FB25
 ((
ušt32_t
)0x02000000è

	)

6752 

	#CAN_F5R1_FB26
 ((
ušt32_t
)0x04000000è

	)

6753 

	#CAN_F5R1_FB27
 ((
ušt32_t
)0x08000000è

	)

6754 

	#CAN_F5R1_FB28
 ((
ušt32_t
)0x10000000è

	)

6755 

	#CAN_F5R1_FB29
 ((
ušt32_t
)0x20000000è

	)

6756 

	#CAN_F5R1_FB30
 ((
ušt32_t
)0x40000000è

	)

6757 

	#CAN_F5R1_FB31
 ((
ušt32_t
)0x80000000è

	)

6760 

	#CAN_F6R1_FB0
 ((
ušt32_t
)0x00000001è

	)

6761 

	#CAN_F6R1_FB1
 ((
ušt32_t
)0x00000002è

	)

6762 

	#CAN_F6R1_FB2
 ((
ušt32_t
)0x00000004è

	)

6763 

	#CAN_F6R1_FB3
 ((
ušt32_t
)0x00000008è

	)

6764 

	#CAN_F6R1_FB4
 ((
ušt32_t
)0x00000010è

	)

6765 

	#CAN_F6R1_FB5
 ((
ušt32_t
)0x00000020è

	)

6766 

	#CAN_F6R1_FB6
 ((
ušt32_t
)0x00000040è

	)

6767 

	#CAN_F6R1_FB7
 ((
ušt32_t
)0x00000080è

	)

6768 

	#CAN_F6R1_FB8
 ((
ušt32_t
)0x00000100è

	)

6769 

	#CAN_F6R1_FB9
 ((
ušt32_t
)0x00000200è

	)

6770 

	#CAN_F6R1_FB10
 ((
ušt32_t
)0x00000400è

	)

6771 

	#CAN_F6R1_FB11
 ((
ušt32_t
)0x00000800è

	)

6772 

	#CAN_F6R1_FB12
 ((
ušt32_t
)0x00001000è

	)

6773 

	#CAN_F6R1_FB13
 ((
ušt32_t
)0x00002000è

	)

6774 

	#CAN_F6R1_FB14
 ((
ušt32_t
)0x00004000è

	)

6775 

	#CAN_F6R1_FB15
 ((
ušt32_t
)0x00008000è

	)

6776 

	#CAN_F6R1_FB16
 ((
ušt32_t
)0x00010000è

	)

6777 

	#CAN_F6R1_FB17
 ((
ušt32_t
)0x00020000è

	)

6778 

	#CAN_F6R1_FB18
 ((
ušt32_t
)0x00040000è

	)

6779 

	#CAN_F6R1_FB19
 ((
ušt32_t
)0x00080000è

	)

6780 

	#CAN_F6R1_FB20
 ((
ušt32_t
)0x00100000è

	)

6781 

	#CAN_F6R1_FB21
 ((
ušt32_t
)0x00200000è

	)

6782 

	#CAN_F6R1_FB22
 ((
ušt32_t
)0x00400000è

	)

6783 

	#CAN_F6R1_FB23
 ((
ušt32_t
)0x00800000è

	)

6784 

	#CAN_F6R1_FB24
 ((
ušt32_t
)0x01000000è

	)

6785 

	#CAN_F6R1_FB25
 ((
ušt32_t
)0x02000000è

	)

6786 

	#CAN_F6R1_FB26
 ((
ušt32_t
)0x04000000è

	)

6787 

	#CAN_F6R1_FB27
 ((
ušt32_t
)0x08000000è

	)

6788 

	#CAN_F6R1_FB28
 ((
ušt32_t
)0x10000000è

	)

6789 

	#CAN_F6R1_FB29
 ((
ušt32_t
)0x20000000è

	)

6790 

	#CAN_F6R1_FB30
 ((
ušt32_t
)0x40000000è

	)

6791 

	#CAN_F6R1_FB31
 ((
ušt32_t
)0x80000000è

	)

6794 

	#CAN_F7R1_FB0
 ((
ušt32_t
)0x00000001è

	)

6795 

	#CAN_F7R1_FB1
 ((
ušt32_t
)0x00000002è

	)

6796 

	#CAN_F7R1_FB2
 ((
ušt32_t
)0x00000004è

	)

6797 

	#CAN_F7R1_FB3
 ((
ušt32_t
)0x00000008è

	)

6798 

	#CAN_F7R1_FB4
 ((
ušt32_t
)0x00000010è

	)

6799 

	#CAN_F7R1_FB5
 ((
ušt32_t
)0x00000020è

	)

6800 

	#CAN_F7R1_FB6
 ((
ušt32_t
)0x00000040è

	)

6801 

	#CAN_F7R1_FB7
 ((
ušt32_t
)0x00000080è

	)

6802 

	#CAN_F7R1_FB8
 ((
ušt32_t
)0x00000100è

	)

6803 

	#CAN_F7R1_FB9
 ((
ušt32_t
)0x00000200è

	)

6804 

	#CAN_F7R1_FB10
 ((
ušt32_t
)0x00000400è

	)

6805 

	#CAN_F7R1_FB11
 ((
ušt32_t
)0x00000800è

	)

6806 

	#CAN_F7R1_FB12
 ((
ušt32_t
)0x00001000è

	)

6807 

	#CAN_F7R1_FB13
 ((
ušt32_t
)0x00002000è

	)

6808 

	#CAN_F7R1_FB14
 ((
ušt32_t
)0x00004000è

	)

6809 

	#CAN_F7R1_FB15
 ((
ušt32_t
)0x00008000è

	)

6810 

	#CAN_F7R1_FB16
 ((
ušt32_t
)0x00010000è

	)

6811 

	#CAN_F7R1_FB17
 ((
ušt32_t
)0x00020000è

	)

6812 

	#CAN_F7R1_FB18
 ((
ušt32_t
)0x00040000è

	)

6813 

	#CAN_F7R1_FB19
 ((
ušt32_t
)0x00080000è

	)

6814 

	#CAN_F7R1_FB20
 ((
ušt32_t
)0x00100000è

	)

6815 

	#CAN_F7R1_FB21
 ((
ušt32_t
)0x00200000è

	)

6816 

	#CAN_F7R1_FB22
 ((
ušt32_t
)0x00400000è

	)

6817 

	#CAN_F7R1_FB23
 ((
ušt32_t
)0x00800000è

	)

6818 

	#CAN_F7R1_FB24
 ((
ušt32_t
)0x01000000è

	)

6819 

	#CAN_F7R1_FB25
 ((
ušt32_t
)0x02000000è

	)

6820 

	#CAN_F7R1_FB26
 ((
ušt32_t
)0x04000000è

	)

6821 

	#CAN_F7R1_FB27
 ((
ušt32_t
)0x08000000è

	)

6822 

	#CAN_F7R1_FB28
 ((
ušt32_t
)0x10000000è

	)

6823 

	#CAN_F7R1_FB29
 ((
ušt32_t
)0x20000000è

	)

6824 

	#CAN_F7R1_FB30
 ((
ušt32_t
)0x40000000è

	)

6825 

	#CAN_F7R1_FB31
 ((
ušt32_t
)0x80000000è

	)

6828 

	#CAN_F8R1_FB0
 ((
ušt32_t
)0x00000001è

	)

6829 

	#CAN_F8R1_FB1
 ((
ušt32_t
)0x00000002è

	)

6830 

	#CAN_F8R1_FB2
 ((
ušt32_t
)0x00000004è

	)

6831 

	#CAN_F8R1_FB3
 ((
ušt32_t
)0x00000008è

	)

6832 

	#CAN_F8R1_FB4
 ((
ušt32_t
)0x00000010è

	)

6833 

	#CAN_F8R1_FB5
 ((
ušt32_t
)0x00000020è

	)

6834 

	#CAN_F8R1_FB6
 ((
ušt32_t
)0x00000040è

	)

6835 

	#CAN_F8R1_FB7
 ((
ušt32_t
)0x00000080è

	)

6836 

	#CAN_F8R1_FB8
 ((
ušt32_t
)0x00000100è

	)

6837 

	#CAN_F8R1_FB9
 ((
ušt32_t
)0x00000200è

	)

6838 

	#CAN_F8R1_FB10
 ((
ušt32_t
)0x00000400è

	)

6839 

	#CAN_F8R1_FB11
 ((
ušt32_t
)0x00000800è

	)

6840 

	#CAN_F8R1_FB12
 ((
ušt32_t
)0x00001000è

	)

6841 

	#CAN_F8R1_FB13
 ((
ušt32_t
)0x00002000è

	)

6842 

	#CAN_F8R1_FB14
 ((
ušt32_t
)0x00004000è

	)

6843 

	#CAN_F8R1_FB15
 ((
ušt32_t
)0x00008000è

	)

6844 

	#CAN_F8R1_FB16
 ((
ušt32_t
)0x00010000è

	)

6845 

	#CAN_F8R1_FB17
 ((
ušt32_t
)0x00020000è

	)

6846 

	#CAN_F8R1_FB18
 ((
ušt32_t
)0x00040000è

	)

6847 

	#CAN_F8R1_FB19
 ((
ušt32_t
)0x00080000è

	)

6848 

	#CAN_F8R1_FB20
 ((
ušt32_t
)0x00100000è

	)

6849 

	#CAN_F8R1_FB21
 ((
ušt32_t
)0x00200000è

	)

6850 

	#CAN_F8R1_FB22
 ((
ušt32_t
)0x00400000è

	)

6851 

	#CAN_F8R1_FB23
 ((
ušt32_t
)0x00800000è

	)

6852 

	#CAN_F8R1_FB24
 ((
ušt32_t
)0x01000000è

	)

6853 

	#CAN_F8R1_FB25
 ((
ušt32_t
)0x02000000è

	)

6854 

	#CAN_F8R1_FB26
 ((
ušt32_t
)0x04000000è

	)

6855 

	#CAN_F8R1_FB27
 ((
ušt32_t
)0x08000000è

	)

6856 

	#CAN_F8R1_FB28
 ((
ušt32_t
)0x10000000è

	)

6857 

	#CAN_F8R1_FB29
 ((
ušt32_t
)0x20000000è

	)

6858 

	#CAN_F8R1_FB30
 ((
ušt32_t
)0x40000000è

	)

6859 

	#CAN_F8R1_FB31
 ((
ušt32_t
)0x80000000è

	)

6862 

	#CAN_F9R1_FB0
 ((
ušt32_t
)0x00000001è

	)

6863 

	#CAN_F9R1_FB1
 ((
ušt32_t
)0x00000002è

	)

6864 

	#CAN_F9R1_FB2
 ((
ušt32_t
)0x00000004è

	)

6865 

	#CAN_F9R1_FB3
 ((
ušt32_t
)0x00000008è

	)

6866 

	#CAN_F9R1_FB4
 ((
ušt32_t
)0x00000010è

	)

6867 

	#CAN_F9R1_FB5
 ((
ušt32_t
)0x00000020è

	)

6868 

	#CAN_F9R1_FB6
 ((
ušt32_t
)0x00000040è

	)

6869 

	#CAN_F9R1_FB7
 ((
ušt32_t
)0x00000080è

	)

6870 

	#CAN_F9R1_FB8
 ((
ušt32_t
)0x00000100è

	)

6871 

	#CAN_F9R1_FB9
 ((
ušt32_t
)0x00000200è

	)

6872 

	#CAN_F9R1_FB10
 ((
ušt32_t
)0x00000400è

	)

6873 

	#CAN_F9R1_FB11
 ((
ušt32_t
)0x00000800è

	)

6874 

	#CAN_F9R1_FB12
 ((
ušt32_t
)0x00001000è

	)

6875 

	#CAN_F9R1_FB13
 ((
ušt32_t
)0x00002000è

	)

6876 

	#CAN_F9R1_FB14
 ((
ušt32_t
)0x00004000è

	)

6877 

	#CAN_F9R1_FB15
 ((
ušt32_t
)0x00008000è

	)

6878 

	#CAN_F9R1_FB16
 ((
ušt32_t
)0x00010000è

	)

6879 

	#CAN_F9R1_FB17
 ((
ušt32_t
)0x00020000è

	)

6880 

	#CAN_F9R1_FB18
 ((
ušt32_t
)0x00040000è

	)

6881 

	#CAN_F9R1_FB19
 ((
ušt32_t
)0x00080000è

	)

6882 

	#CAN_F9R1_FB20
 ((
ušt32_t
)0x00100000è

	)

6883 

	#CAN_F9R1_FB21
 ((
ušt32_t
)0x00200000è

	)

6884 

	#CAN_F9R1_FB22
 ((
ušt32_t
)0x00400000è

	)

6885 

	#CAN_F9R1_FB23
 ((
ušt32_t
)0x00800000è

	)

6886 

	#CAN_F9R1_FB24
 ((
ušt32_t
)0x01000000è

	)

6887 

	#CAN_F9R1_FB25
 ((
ušt32_t
)0x02000000è

	)

6888 

	#CAN_F9R1_FB26
 ((
ušt32_t
)0x04000000è

	)

6889 

	#CAN_F9R1_FB27
 ((
ušt32_t
)0x08000000è

	)

6890 

	#CAN_F9R1_FB28
 ((
ušt32_t
)0x10000000è

	)

6891 

	#CAN_F9R1_FB29
 ((
ušt32_t
)0x20000000è

	)

6892 

	#CAN_F9R1_FB30
 ((
ušt32_t
)0x40000000è

	)

6893 

	#CAN_F9R1_FB31
 ((
ušt32_t
)0x80000000è

	)

6896 

	#CAN_F10R1_FB0
 ((
ušt32_t
)0x00000001è

	)

6897 

	#CAN_F10R1_FB1
 ((
ušt32_t
)0x00000002è

	)

6898 

	#CAN_F10R1_FB2
 ((
ušt32_t
)0x00000004è

	)

6899 

	#CAN_F10R1_FB3
 ((
ušt32_t
)0x00000008è

	)

6900 

	#CAN_F10R1_FB4
 ((
ušt32_t
)0x00000010è

	)

6901 

	#CAN_F10R1_FB5
 ((
ušt32_t
)0x00000020è

	)

6902 

	#CAN_F10R1_FB6
 ((
ušt32_t
)0x00000040è

	)

6903 

	#CAN_F10R1_FB7
 ((
ušt32_t
)0x00000080è

	)

6904 

	#CAN_F10R1_FB8
 ((
ušt32_t
)0x00000100è

	)

6905 

	#CAN_F10R1_FB9
 ((
ušt32_t
)0x00000200è

	)

6906 

	#CAN_F10R1_FB10
 ((
ušt32_t
)0x00000400è

	)

6907 

	#CAN_F10R1_FB11
 ((
ušt32_t
)0x00000800è

	)

6908 

	#CAN_F10R1_FB12
 ((
ušt32_t
)0x00001000è

	)

6909 

	#CAN_F10R1_FB13
 ((
ušt32_t
)0x00002000è

	)

6910 

	#CAN_F10R1_FB14
 ((
ušt32_t
)0x00004000è

	)

6911 

	#CAN_F10R1_FB15
 ((
ušt32_t
)0x00008000è

	)

6912 

	#CAN_F10R1_FB16
 ((
ušt32_t
)0x00010000è

	)

6913 

	#CAN_F10R1_FB17
 ((
ušt32_t
)0x00020000è

	)

6914 

	#CAN_F10R1_FB18
 ((
ušt32_t
)0x00040000è

	)

6915 

	#CAN_F10R1_FB19
 ((
ušt32_t
)0x00080000è

	)

6916 

	#CAN_F10R1_FB20
 ((
ušt32_t
)0x00100000è

	)

6917 

	#CAN_F10R1_FB21
 ((
ušt32_t
)0x00200000è

	)

6918 

	#CAN_F10R1_FB22
 ((
ušt32_t
)0x00400000è

	)

6919 

	#CAN_F10R1_FB23
 ((
ušt32_t
)0x00800000è

	)

6920 

	#CAN_F10R1_FB24
 ((
ušt32_t
)0x01000000è

	)

6921 

	#CAN_F10R1_FB25
 ((
ušt32_t
)0x02000000è

	)

6922 

	#CAN_F10R1_FB26
 ((
ušt32_t
)0x04000000è

	)

6923 

	#CAN_F10R1_FB27
 ((
ušt32_t
)0x08000000è

	)

6924 

	#CAN_F10R1_FB28
 ((
ušt32_t
)0x10000000è

	)

6925 

	#CAN_F10R1_FB29
 ((
ušt32_t
)0x20000000è

	)

6926 

	#CAN_F10R1_FB30
 ((
ušt32_t
)0x40000000è

	)

6927 

	#CAN_F10R1_FB31
 ((
ušt32_t
)0x80000000è

	)

6930 

	#CAN_F11R1_FB0
 ((
ušt32_t
)0x00000001è

	)

6931 

	#CAN_F11R1_FB1
 ((
ušt32_t
)0x00000002è

	)

6932 

	#CAN_F11R1_FB2
 ((
ušt32_t
)0x00000004è

	)

6933 

	#CAN_F11R1_FB3
 ((
ušt32_t
)0x00000008è

	)

6934 

	#CAN_F11R1_FB4
 ((
ušt32_t
)0x00000010è

	)

6935 

	#CAN_F11R1_FB5
 ((
ušt32_t
)0x00000020è

	)

6936 

	#CAN_F11R1_FB6
 ((
ušt32_t
)0x00000040è

	)

6937 

	#CAN_F11R1_FB7
 ((
ušt32_t
)0x00000080è

	)

6938 

	#CAN_F11R1_FB8
 ((
ušt32_t
)0x00000100è

	)

6939 

	#CAN_F11R1_FB9
 ((
ušt32_t
)0x00000200è

	)

6940 

	#CAN_F11R1_FB10
 ((
ušt32_t
)0x00000400è

	)

6941 

	#CAN_F11R1_FB11
 ((
ušt32_t
)0x00000800è

	)

6942 

	#CAN_F11R1_FB12
 ((
ušt32_t
)0x00001000è

	)

6943 

	#CAN_F11R1_FB13
 ((
ušt32_t
)0x00002000è

	)

6944 

	#CAN_F11R1_FB14
 ((
ušt32_t
)0x00004000è

	)

6945 

	#CAN_F11R1_FB15
 ((
ušt32_t
)0x00008000è

	)

6946 

	#CAN_F11R1_FB16
 ((
ušt32_t
)0x00010000è

	)

6947 

	#CAN_F11R1_FB17
 ((
ušt32_t
)0x00020000è

	)

6948 

	#CAN_F11R1_FB18
 ((
ušt32_t
)0x00040000è

	)

6949 

	#CAN_F11R1_FB19
 ((
ušt32_t
)0x00080000è

	)

6950 

	#CAN_F11R1_FB20
 ((
ušt32_t
)0x00100000è

	)

6951 

	#CAN_F11R1_FB21
 ((
ušt32_t
)0x00200000è

	)

6952 

	#CAN_F11R1_FB22
 ((
ušt32_t
)0x00400000è

	)

6953 

	#CAN_F11R1_FB23
 ((
ušt32_t
)0x00800000è

	)

6954 

	#CAN_F11R1_FB24
 ((
ušt32_t
)0x01000000è

	)

6955 

	#CAN_F11R1_FB25
 ((
ušt32_t
)0x02000000è

	)

6956 

	#CAN_F11R1_FB26
 ((
ušt32_t
)0x04000000è

	)

6957 

	#CAN_F11R1_FB27
 ((
ušt32_t
)0x08000000è

	)

6958 

	#CAN_F11R1_FB28
 ((
ušt32_t
)0x10000000è

	)

6959 

	#CAN_F11R1_FB29
 ((
ušt32_t
)0x20000000è

	)

6960 

	#CAN_F11R1_FB30
 ((
ušt32_t
)0x40000000è

	)

6961 

	#CAN_F11R1_FB31
 ((
ušt32_t
)0x80000000è

	)

6964 

	#CAN_F12R1_FB0
 ((
ušt32_t
)0x00000001è

	)

6965 

	#CAN_F12R1_FB1
 ((
ušt32_t
)0x00000002è

	)

6966 

	#CAN_F12R1_FB2
 ((
ušt32_t
)0x00000004è

	)

6967 

	#CAN_F12R1_FB3
 ((
ušt32_t
)0x00000008è

	)

6968 

	#CAN_F12R1_FB4
 ((
ušt32_t
)0x00000010è

	)

6969 

	#CAN_F12R1_FB5
 ((
ušt32_t
)0x00000020è

	)

6970 

	#CAN_F12R1_FB6
 ((
ušt32_t
)0x00000040è

	)

6971 

	#CAN_F12R1_FB7
 ((
ušt32_t
)0x00000080è

	)

6972 

	#CAN_F12R1_FB8
 ((
ušt32_t
)0x00000100è

	)

6973 

	#CAN_F12R1_FB9
 ((
ušt32_t
)0x00000200è

	)

6974 

	#CAN_F12R1_FB10
 ((
ušt32_t
)0x00000400è

	)

6975 

	#CAN_F12R1_FB11
 ((
ušt32_t
)0x00000800è

	)

6976 

	#CAN_F12R1_FB12
 ((
ušt32_t
)0x00001000è

	)

6977 

	#CAN_F12R1_FB13
 ((
ušt32_t
)0x00002000è

	)

6978 

	#CAN_F12R1_FB14
 ((
ušt32_t
)0x00004000è

	)

6979 

	#CAN_F12R1_FB15
 ((
ušt32_t
)0x00008000è

	)

6980 

	#CAN_F12R1_FB16
 ((
ušt32_t
)0x00010000è

	)

6981 

	#CAN_F12R1_FB17
 ((
ušt32_t
)0x00020000è

	)

6982 

	#CAN_F12R1_FB18
 ((
ušt32_t
)0x00040000è

	)

6983 

	#CAN_F12R1_FB19
 ((
ušt32_t
)0x00080000è

	)

6984 

	#CAN_F12R1_FB20
 ((
ušt32_t
)0x00100000è

	)

6985 

	#CAN_F12R1_FB21
 ((
ušt32_t
)0x00200000è

	)

6986 

	#CAN_F12R1_FB22
 ((
ušt32_t
)0x00400000è

	)

6987 

	#CAN_F12R1_FB23
 ((
ušt32_t
)0x00800000è

	)

6988 

	#CAN_F12R1_FB24
 ((
ušt32_t
)0x01000000è

	)

6989 

	#CAN_F12R1_FB25
 ((
ušt32_t
)0x02000000è

	)

6990 

	#CAN_F12R1_FB26
 ((
ušt32_t
)0x04000000è

	)

6991 

	#CAN_F12R1_FB27
 ((
ušt32_t
)0x08000000è

	)

6992 

	#CAN_F12R1_FB28
 ((
ušt32_t
)0x10000000è

	)

6993 

	#CAN_F12R1_FB29
 ((
ušt32_t
)0x20000000è

	)

6994 

	#CAN_F12R1_FB30
 ((
ušt32_t
)0x40000000è

	)

6995 

	#CAN_F12R1_FB31
 ((
ušt32_t
)0x80000000è

	)

6998 

	#CAN_F13R1_FB0
 ((
ušt32_t
)0x00000001è

	)

6999 

	#CAN_F13R1_FB1
 ((
ušt32_t
)0x00000002è

	)

7000 

	#CAN_F13R1_FB2
 ((
ušt32_t
)0x00000004è

	)

7001 

	#CAN_F13R1_FB3
 ((
ušt32_t
)0x00000008è

	)

7002 

	#CAN_F13R1_FB4
 ((
ušt32_t
)0x00000010è

	)

7003 

	#CAN_F13R1_FB5
 ((
ušt32_t
)0x00000020è

	)

7004 

	#CAN_F13R1_FB6
 ((
ušt32_t
)0x00000040è

	)

7005 

	#CAN_F13R1_FB7
 ((
ušt32_t
)0x00000080è

	)

7006 

	#CAN_F13R1_FB8
 ((
ušt32_t
)0x00000100è

	)

7007 

	#CAN_F13R1_FB9
 ((
ušt32_t
)0x00000200è

	)

7008 

	#CAN_F13R1_FB10
 ((
ušt32_t
)0x00000400è

	)

7009 

	#CAN_F13R1_FB11
 ((
ušt32_t
)0x00000800è

	)

7010 

	#CAN_F13R1_FB12
 ((
ušt32_t
)0x00001000è

	)

7011 

	#CAN_F13R1_FB13
 ((
ušt32_t
)0x00002000è

	)

7012 

	#CAN_F13R1_FB14
 ((
ušt32_t
)0x00004000è

	)

7013 

	#CAN_F13R1_FB15
 ((
ušt32_t
)0x00008000è

	)

7014 

	#CAN_F13R1_FB16
 ((
ušt32_t
)0x00010000è

	)

7015 

	#CAN_F13R1_FB17
 ((
ušt32_t
)0x00020000è

	)

7016 

	#CAN_F13R1_FB18
 ((
ušt32_t
)0x00040000è

	)

7017 

	#CAN_F13R1_FB19
 ((
ušt32_t
)0x00080000è

	)

7018 

	#CAN_F13R1_FB20
 ((
ušt32_t
)0x00100000è

	)

7019 

	#CAN_F13R1_FB21
 ((
ušt32_t
)0x00200000è

	)

7020 

	#CAN_F13R1_FB22
 ((
ušt32_t
)0x00400000è

	)

7021 

	#CAN_F13R1_FB23
 ((
ušt32_t
)0x00800000è

	)

7022 

	#CAN_F13R1_FB24
 ((
ušt32_t
)0x01000000è

	)

7023 

	#CAN_F13R1_FB25
 ((
ušt32_t
)0x02000000è

	)

7024 

	#CAN_F13R1_FB26
 ((
ušt32_t
)0x04000000è

	)

7025 

	#CAN_F13R1_FB27
 ((
ušt32_t
)0x08000000è

	)

7026 

	#CAN_F13R1_FB28
 ((
ušt32_t
)0x10000000è

	)

7027 

	#CAN_F13R1_FB29
 ((
ušt32_t
)0x20000000è

	)

7028 

	#CAN_F13R1_FB30
 ((
ušt32_t
)0x40000000è

	)

7029 

	#CAN_F13R1_FB31
 ((
ušt32_t
)0x80000000è

	)

7032 

	#CAN_F0R2_FB0
 ((
ušt32_t
)0x00000001è

	)

7033 

	#CAN_F0R2_FB1
 ((
ušt32_t
)0x00000002è

	)

7034 

	#CAN_F0R2_FB2
 ((
ušt32_t
)0x00000004è

	)

7035 

	#CAN_F0R2_FB3
 ((
ušt32_t
)0x00000008è

	)

7036 

	#CAN_F0R2_FB4
 ((
ušt32_t
)0x00000010è

	)

7037 

	#CAN_F0R2_FB5
 ((
ušt32_t
)0x00000020è

	)

7038 

	#CAN_F0R2_FB6
 ((
ušt32_t
)0x00000040è

	)

7039 

	#CAN_F0R2_FB7
 ((
ušt32_t
)0x00000080è

	)

7040 

	#CAN_F0R2_FB8
 ((
ušt32_t
)0x00000100è

	)

7041 

	#CAN_F0R2_FB9
 ((
ušt32_t
)0x00000200è

	)

7042 

	#CAN_F0R2_FB10
 ((
ušt32_t
)0x00000400è

	)

7043 

	#CAN_F0R2_FB11
 ((
ušt32_t
)0x00000800è

	)

7044 

	#CAN_F0R2_FB12
 ((
ušt32_t
)0x00001000è

	)

7045 

	#CAN_F0R2_FB13
 ((
ušt32_t
)0x00002000è

	)

7046 

	#CAN_F0R2_FB14
 ((
ušt32_t
)0x00004000è

	)

7047 

	#CAN_F0R2_FB15
 ((
ušt32_t
)0x00008000è

	)

7048 

	#CAN_F0R2_FB16
 ((
ušt32_t
)0x00010000è

	)

7049 

	#CAN_F0R2_FB17
 ((
ušt32_t
)0x00020000è

	)

7050 

	#CAN_F0R2_FB18
 ((
ušt32_t
)0x00040000è

	)

7051 

	#CAN_F0R2_FB19
 ((
ušt32_t
)0x00080000è

	)

7052 

	#CAN_F0R2_FB20
 ((
ušt32_t
)0x00100000è

	)

7053 

	#CAN_F0R2_FB21
 ((
ušt32_t
)0x00200000è

	)

7054 

	#CAN_F0R2_FB22
 ((
ušt32_t
)0x00400000è

	)

7055 

	#CAN_F0R2_FB23
 ((
ušt32_t
)0x00800000è

	)

7056 

	#CAN_F0R2_FB24
 ((
ušt32_t
)0x01000000è

	)

7057 

	#CAN_F0R2_FB25
 ((
ušt32_t
)0x02000000è

	)

7058 

	#CAN_F0R2_FB26
 ((
ušt32_t
)0x04000000è

	)

7059 

	#CAN_F0R2_FB27
 ((
ušt32_t
)0x08000000è

	)

7060 

	#CAN_F0R2_FB28
 ((
ušt32_t
)0x10000000è

	)

7061 

	#CAN_F0R2_FB29
 ((
ušt32_t
)0x20000000è

	)

7062 

	#CAN_F0R2_FB30
 ((
ušt32_t
)0x40000000è

	)

7063 

	#CAN_F0R2_FB31
 ((
ušt32_t
)0x80000000è

	)

7066 

	#CAN_F1R2_FB0
 ((
ušt32_t
)0x00000001è

	)

7067 

	#CAN_F1R2_FB1
 ((
ušt32_t
)0x00000002è

	)

7068 

	#CAN_F1R2_FB2
 ((
ušt32_t
)0x00000004è

	)

7069 

	#CAN_F1R2_FB3
 ((
ušt32_t
)0x00000008è

	)

7070 

	#CAN_F1R2_FB4
 ((
ušt32_t
)0x00000010è

	)

7071 

	#CAN_F1R2_FB5
 ((
ušt32_t
)0x00000020è

	)

7072 

	#CAN_F1R2_FB6
 ((
ušt32_t
)0x00000040è

	)

7073 

	#CAN_F1R2_FB7
 ((
ušt32_t
)0x00000080è

	)

7074 

	#CAN_F1R2_FB8
 ((
ušt32_t
)0x00000100è

	)

7075 

	#CAN_F1R2_FB9
 ((
ušt32_t
)0x00000200è

	)

7076 

	#CAN_F1R2_FB10
 ((
ušt32_t
)0x00000400è

	)

7077 

	#CAN_F1R2_FB11
 ((
ušt32_t
)0x00000800è

	)

7078 

	#CAN_F1R2_FB12
 ((
ušt32_t
)0x00001000è

	)

7079 

	#CAN_F1R2_FB13
 ((
ušt32_t
)0x00002000è

	)

7080 

	#CAN_F1R2_FB14
 ((
ušt32_t
)0x00004000è

	)

7081 

	#CAN_F1R2_FB15
 ((
ušt32_t
)0x00008000è

	)

7082 

	#CAN_F1R2_FB16
 ((
ušt32_t
)0x00010000è

	)

7083 

	#CAN_F1R2_FB17
 ((
ušt32_t
)0x00020000è

	)

7084 

	#CAN_F1R2_FB18
 ((
ušt32_t
)0x00040000è

	)

7085 

	#CAN_F1R2_FB19
 ((
ušt32_t
)0x00080000è

	)

7086 

	#CAN_F1R2_FB20
 ((
ušt32_t
)0x00100000è

	)

7087 

	#CAN_F1R2_FB21
 ((
ušt32_t
)0x00200000è

	)

7088 

	#CAN_F1R2_FB22
 ((
ušt32_t
)0x00400000è

	)

7089 

	#CAN_F1R2_FB23
 ((
ušt32_t
)0x00800000è

	)

7090 

	#CAN_F1R2_FB24
 ((
ušt32_t
)0x01000000è

	)

7091 

	#CAN_F1R2_FB25
 ((
ušt32_t
)0x02000000è

	)

7092 

	#CAN_F1R2_FB26
 ((
ušt32_t
)0x04000000è

	)

7093 

	#CAN_F1R2_FB27
 ((
ušt32_t
)0x08000000è

	)

7094 

	#CAN_F1R2_FB28
 ((
ušt32_t
)0x10000000è

	)

7095 

	#CAN_F1R2_FB29
 ((
ušt32_t
)0x20000000è

	)

7096 

	#CAN_F1R2_FB30
 ((
ušt32_t
)0x40000000è

	)

7097 

	#CAN_F1R2_FB31
 ((
ušt32_t
)0x80000000è

	)

7100 

	#CAN_F2R2_FB0
 ((
ušt32_t
)0x00000001è

	)

7101 

	#CAN_F2R2_FB1
 ((
ušt32_t
)0x00000002è

	)

7102 

	#CAN_F2R2_FB2
 ((
ušt32_t
)0x00000004è

	)

7103 

	#CAN_F2R2_FB3
 ((
ušt32_t
)0x00000008è

	)

7104 

	#CAN_F2R2_FB4
 ((
ušt32_t
)0x00000010è

	)

7105 

	#CAN_F2R2_FB5
 ((
ušt32_t
)0x00000020è

	)

7106 

	#CAN_F2R2_FB6
 ((
ušt32_t
)0x00000040è

	)

7107 

	#CAN_F2R2_FB7
 ((
ušt32_t
)0x00000080è

	)

7108 

	#CAN_F2R2_FB8
 ((
ušt32_t
)0x00000100è

	)

7109 

	#CAN_F2R2_FB9
 ((
ušt32_t
)0x00000200è

	)

7110 

	#CAN_F2R2_FB10
 ((
ušt32_t
)0x00000400è

	)

7111 

	#CAN_F2R2_FB11
 ((
ušt32_t
)0x00000800è

	)

7112 

	#CAN_F2R2_FB12
 ((
ušt32_t
)0x00001000è

	)

7113 

	#CAN_F2R2_FB13
 ((
ušt32_t
)0x00002000è

	)

7114 

	#CAN_F2R2_FB14
 ((
ušt32_t
)0x00004000è

	)

7115 

	#CAN_F2R2_FB15
 ((
ušt32_t
)0x00008000è

	)

7116 

	#CAN_F2R2_FB16
 ((
ušt32_t
)0x00010000è

	)

7117 

	#CAN_F2R2_FB17
 ((
ušt32_t
)0x00020000è

	)

7118 

	#CAN_F2R2_FB18
 ((
ušt32_t
)0x00040000è

	)

7119 

	#CAN_F2R2_FB19
 ((
ušt32_t
)0x00080000è

	)

7120 

	#CAN_F2R2_FB20
 ((
ušt32_t
)0x00100000è

	)

7121 

	#CAN_F2R2_FB21
 ((
ušt32_t
)0x00200000è

	)

7122 

	#CAN_F2R2_FB22
 ((
ušt32_t
)0x00400000è

	)

7123 

	#CAN_F2R2_FB23
 ((
ušt32_t
)0x00800000è

	)

7124 

	#CAN_F2R2_FB24
 ((
ušt32_t
)0x01000000è

	)

7125 

	#CAN_F2R2_FB25
 ((
ušt32_t
)0x02000000è

	)

7126 

	#CAN_F2R2_FB26
 ((
ušt32_t
)0x04000000è

	)

7127 

	#CAN_F2R2_FB27
 ((
ušt32_t
)0x08000000è

	)

7128 

	#CAN_F2R2_FB28
 ((
ušt32_t
)0x10000000è

	)

7129 

	#CAN_F2R2_FB29
 ((
ušt32_t
)0x20000000è

	)

7130 

	#CAN_F2R2_FB30
 ((
ušt32_t
)0x40000000è

	)

7131 

	#CAN_F2R2_FB31
 ((
ušt32_t
)0x80000000è

	)

7134 

	#CAN_F3R2_FB0
 ((
ušt32_t
)0x00000001è

	)

7135 

	#CAN_F3R2_FB1
 ((
ušt32_t
)0x00000002è

	)

7136 

	#CAN_F3R2_FB2
 ((
ušt32_t
)0x00000004è

	)

7137 

	#CAN_F3R2_FB3
 ((
ušt32_t
)0x00000008è

	)

7138 

	#CAN_F3R2_FB4
 ((
ušt32_t
)0x00000010è

	)

7139 

	#CAN_F3R2_FB5
 ((
ušt32_t
)0x00000020è

	)

7140 

	#CAN_F3R2_FB6
 ((
ušt32_t
)0x00000040è

	)

7141 

	#CAN_F3R2_FB7
 ((
ušt32_t
)0x00000080è

	)

7142 

	#CAN_F3R2_FB8
 ((
ušt32_t
)0x00000100è

	)

7143 

	#CAN_F3R2_FB9
 ((
ušt32_t
)0x00000200è

	)

7144 

	#CAN_F3R2_FB10
 ((
ušt32_t
)0x00000400è

	)

7145 

	#CAN_F3R2_FB11
 ((
ušt32_t
)0x00000800è

	)

7146 

	#CAN_F3R2_FB12
 ((
ušt32_t
)0x00001000è

	)

7147 

	#CAN_F3R2_FB13
 ((
ušt32_t
)0x00002000è

	)

7148 

	#CAN_F3R2_FB14
 ((
ušt32_t
)0x00004000è

	)

7149 

	#CAN_F3R2_FB15
 ((
ušt32_t
)0x00008000è

	)

7150 

	#CAN_F3R2_FB16
 ((
ušt32_t
)0x00010000è

	)

7151 

	#CAN_F3R2_FB17
 ((
ušt32_t
)0x00020000è

	)

7152 

	#CAN_F3R2_FB18
 ((
ušt32_t
)0x00040000è

	)

7153 

	#CAN_F3R2_FB19
 ((
ušt32_t
)0x00080000è

	)

7154 

	#CAN_F3R2_FB20
 ((
ušt32_t
)0x00100000è

	)

7155 

	#CAN_F3R2_FB21
 ((
ušt32_t
)0x00200000è

	)

7156 

	#CAN_F3R2_FB22
 ((
ušt32_t
)0x00400000è

	)

7157 

	#CAN_F3R2_FB23
 ((
ušt32_t
)0x00800000è

	)

7158 

	#CAN_F3R2_FB24
 ((
ušt32_t
)0x01000000è

	)

7159 

	#CAN_F3R2_FB25
 ((
ušt32_t
)0x02000000è

	)

7160 

	#CAN_F3R2_FB26
 ((
ušt32_t
)0x04000000è

	)

7161 

	#CAN_F3R2_FB27
 ((
ušt32_t
)0x08000000è

	)

7162 

	#CAN_F3R2_FB28
 ((
ušt32_t
)0x10000000è

	)

7163 

	#CAN_F3R2_FB29
 ((
ušt32_t
)0x20000000è

	)

7164 

	#CAN_F3R2_FB30
 ((
ušt32_t
)0x40000000è

	)

7165 

	#CAN_F3R2_FB31
 ((
ušt32_t
)0x80000000è

	)

7168 

	#CAN_F4R2_FB0
 ((
ušt32_t
)0x00000001è

	)

7169 

	#CAN_F4R2_FB1
 ((
ušt32_t
)0x00000002è

	)

7170 

	#CAN_F4R2_FB2
 ((
ušt32_t
)0x00000004è

	)

7171 

	#CAN_F4R2_FB3
 ((
ušt32_t
)0x00000008è

	)

7172 

	#CAN_F4R2_FB4
 ((
ušt32_t
)0x00000010è

	)

7173 

	#CAN_F4R2_FB5
 ((
ušt32_t
)0x00000020è

	)

7174 

	#CAN_F4R2_FB6
 ((
ušt32_t
)0x00000040è

	)

7175 

	#CAN_F4R2_FB7
 ((
ušt32_t
)0x00000080è

	)

7176 

	#CAN_F4R2_FB8
 ((
ušt32_t
)0x00000100è

	)

7177 

	#CAN_F4R2_FB9
 ((
ušt32_t
)0x00000200è

	)

7178 

	#CAN_F4R2_FB10
 ((
ušt32_t
)0x00000400è

	)

7179 

	#CAN_F4R2_FB11
 ((
ušt32_t
)0x00000800è

	)

7180 

	#CAN_F4R2_FB12
 ((
ušt32_t
)0x00001000è

	)

7181 

	#CAN_F4R2_FB13
 ((
ušt32_t
)0x00002000è

	)

7182 

	#CAN_F4R2_FB14
 ((
ušt32_t
)0x00004000è

	)

7183 

	#CAN_F4R2_FB15
 ((
ušt32_t
)0x00008000è

	)

7184 

	#CAN_F4R2_FB16
 ((
ušt32_t
)0x00010000è

	)

7185 

	#CAN_F4R2_FB17
 ((
ušt32_t
)0x00020000è

	)

7186 

	#CAN_F4R2_FB18
 ((
ušt32_t
)0x00040000è

	)

7187 

	#CAN_F4R2_FB19
 ((
ušt32_t
)0x00080000è

	)

7188 

	#CAN_F4R2_FB20
 ((
ušt32_t
)0x00100000è

	)

7189 

	#CAN_F4R2_FB21
 ((
ušt32_t
)0x00200000è

	)

7190 

	#CAN_F4R2_FB22
 ((
ušt32_t
)0x00400000è

	)

7191 

	#CAN_F4R2_FB23
 ((
ušt32_t
)0x00800000è

	)

7192 

	#CAN_F4R2_FB24
 ((
ušt32_t
)0x01000000è

	)

7193 

	#CAN_F4R2_FB25
 ((
ušt32_t
)0x02000000è

	)

7194 

	#CAN_F4R2_FB26
 ((
ušt32_t
)0x04000000è

	)

7195 

	#CAN_F4R2_FB27
 ((
ušt32_t
)0x08000000è

	)

7196 

	#CAN_F4R2_FB28
 ((
ušt32_t
)0x10000000è

	)

7197 

	#CAN_F4R2_FB29
 ((
ušt32_t
)0x20000000è

	)

7198 

	#CAN_F4R2_FB30
 ((
ušt32_t
)0x40000000è

	)

7199 

	#CAN_F4R2_FB31
 ((
ušt32_t
)0x80000000è

	)

7202 

	#CAN_F5R2_FB0
 ((
ušt32_t
)0x00000001è

	)

7203 

	#CAN_F5R2_FB1
 ((
ušt32_t
)0x00000002è

	)

7204 

	#CAN_F5R2_FB2
 ((
ušt32_t
)0x00000004è

	)

7205 

	#CAN_F5R2_FB3
 ((
ušt32_t
)0x00000008è

	)

7206 

	#CAN_F5R2_FB4
 ((
ušt32_t
)0x00000010è

	)

7207 

	#CAN_F5R2_FB5
 ((
ušt32_t
)0x00000020è

	)

7208 

	#CAN_F5R2_FB6
 ((
ušt32_t
)0x00000040è

	)

7209 

	#CAN_F5R2_FB7
 ((
ušt32_t
)0x00000080è

	)

7210 

	#CAN_F5R2_FB8
 ((
ušt32_t
)0x00000100è

	)

7211 

	#CAN_F5R2_FB9
 ((
ušt32_t
)0x00000200è

	)

7212 

	#CAN_F5R2_FB10
 ((
ušt32_t
)0x00000400è

	)

7213 

	#CAN_F5R2_FB11
 ((
ušt32_t
)0x00000800è

	)

7214 

	#CAN_F5R2_FB12
 ((
ušt32_t
)0x00001000è

	)

7215 

	#CAN_F5R2_FB13
 ((
ušt32_t
)0x00002000è

	)

7216 

	#CAN_F5R2_FB14
 ((
ušt32_t
)0x00004000è

	)

7217 

	#CAN_F5R2_FB15
 ((
ušt32_t
)0x00008000è

	)

7218 

	#CAN_F5R2_FB16
 ((
ušt32_t
)0x00010000è

	)

7219 

	#CAN_F5R2_FB17
 ((
ušt32_t
)0x00020000è

	)

7220 

	#CAN_F5R2_FB18
 ((
ušt32_t
)0x00040000è

	)

7221 

	#CAN_F5R2_FB19
 ((
ušt32_t
)0x00080000è

	)

7222 

	#CAN_F5R2_FB20
 ((
ušt32_t
)0x00100000è

	)

7223 

	#CAN_F5R2_FB21
 ((
ušt32_t
)0x00200000è

	)

7224 

	#CAN_F5R2_FB22
 ((
ušt32_t
)0x00400000è

	)

7225 

	#CAN_F5R2_FB23
 ((
ušt32_t
)0x00800000è

	)

7226 

	#CAN_F5R2_FB24
 ((
ušt32_t
)0x01000000è

	)

7227 

	#CAN_F5R2_FB25
 ((
ušt32_t
)0x02000000è

	)

7228 

	#CAN_F5R2_FB26
 ((
ušt32_t
)0x04000000è

	)

7229 

	#CAN_F5R2_FB27
 ((
ušt32_t
)0x08000000è

	)

7230 

	#CAN_F5R2_FB28
 ((
ušt32_t
)0x10000000è

	)

7231 

	#CAN_F5R2_FB29
 ((
ušt32_t
)0x20000000è

	)

7232 

	#CAN_F5R2_FB30
 ((
ušt32_t
)0x40000000è

	)

7233 

	#CAN_F5R2_FB31
 ((
ušt32_t
)0x80000000è

	)

7236 

	#CAN_F6R2_FB0
 ((
ušt32_t
)0x00000001è

	)

7237 

	#CAN_F6R2_FB1
 ((
ušt32_t
)0x00000002è

	)

7238 

	#CAN_F6R2_FB2
 ((
ušt32_t
)0x00000004è

	)

7239 

	#CAN_F6R2_FB3
 ((
ušt32_t
)0x00000008è

	)

7240 

	#CAN_F6R2_FB4
 ((
ušt32_t
)0x00000010è

	)

7241 

	#CAN_F6R2_FB5
 ((
ušt32_t
)0x00000020è

	)

7242 

	#CAN_F6R2_FB6
 ((
ušt32_t
)0x00000040è

	)

7243 

	#CAN_F6R2_FB7
 ((
ušt32_t
)0x00000080è

	)

7244 

	#CAN_F6R2_FB8
 ((
ušt32_t
)0x00000100è

	)

7245 

	#CAN_F6R2_FB9
 ((
ušt32_t
)0x00000200è

	)

7246 

	#CAN_F6R2_FB10
 ((
ušt32_t
)0x00000400è

	)

7247 

	#CAN_F6R2_FB11
 ((
ušt32_t
)0x00000800è

	)

7248 

	#CAN_F6R2_FB12
 ((
ušt32_t
)0x00001000è

	)

7249 

	#CAN_F6R2_FB13
 ((
ušt32_t
)0x00002000è

	)

7250 

	#CAN_F6R2_FB14
 ((
ušt32_t
)0x00004000è

	)

7251 

	#CAN_F6R2_FB15
 ((
ušt32_t
)0x00008000è

	)

7252 

	#CAN_F6R2_FB16
 ((
ušt32_t
)0x00010000è

	)

7253 

	#CAN_F6R2_FB17
 ((
ušt32_t
)0x00020000è

	)

7254 

	#CAN_F6R2_FB18
 ((
ušt32_t
)0x00040000è

	)

7255 

	#CAN_F6R2_FB19
 ((
ušt32_t
)0x00080000è

	)

7256 

	#CAN_F6R2_FB20
 ((
ušt32_t
)0x00100000è

	)

7257 

	#CAN_F6R2_FB21
 ((
ušt32_t
)0x00200000è

	)

7258 

	#CAN_F6R2_FB22
 ((
ušt32_t
)0x00400000è

	)

7259 

	#CAN_F6R2_FB23
 ((
ušt32_t
)0x00800000è

	)

7260 

	#CAN_F6R2_FB24
 ((
ušt32_t
)0x01000000è

	)

7261 

	#CAN_F6R2_FB25
 ((
ušt32_t
)0x02000000è

	)

7262 

	#CAN_F6R2_FB26
 ((
ušt32_t
)0x04000000è

	)

7263 

	#CAN_F6R2_FB27
 ((
ušt32_t
)0x08000000è

	)

7264 

	#CAN_F6R2_FB28
 ((
ušt32_t
)0x10000000è

	)

7265 

	#CAN_F6R2_FB29
 ((
ušt32_t
)0x20000000è

	)

7266 

	#CAN_F6R2_FB30
 ((
ušt32_t
)0x40000000è

	)

7267 

	#CAN_F6R2_FB31
 ((
ušt32_t
)0x80000000è

	)

7270 

	#CAN_F7R2_FB0
 ((
ušt32_t
)0x00000001è

	)

7271 

	#CAN_F7R2_FB1
 ((
ušt32_t
)0x00000002è

	)

7272 

	#CAN_F7R2_FB2
 ((
ušt32_t
)0x00000004è

	)

7273 

	#CAN_F7R2_FB3
 ((
ušt32_t
)0x00000008è

	)

7274 

	#CAN_F7R2_FB4
 ((
ušt32_t
)0x00000010è

	)

7275 

	#CAN_F7R2_FB5
 ((
ušt32_t
)0x00000020è

	)

7276 

	#CAN_F7R2_FB6
 ((
ušt32_t
)0x00000040è

	)

7277 

	#CAN_F7R2_FB7
 ((
ušt32_t
)0x00000080è

	)

7278 

	#CAN_F7R2_FB8
 ((
ušt32_t
)0x00000100è

	)

7279 

	#CAN_F7R2_FB9
 ((
ušt32_t
)0x00000200è

	)

7280 

	#CAN_F7R2_FB10
 ((
ušt32_t
)0x00000400è

	)

7281 

	#CAN_F7R2_FB11
 ((
ušt32_t
)0x00000800è

	)

7282 

	#CAN_F7R2_FB12
 ((
ušt32_t
)0x00001000è

	)

7283 

	#CAN_F7R2_FB13
 ((
ušt32_t
)0x00002000è

	)

7284 

	#CAN_F7R2_FB14
 ((
ušt32_t
)0x00004000è

	)

7285 

	#CAN_F7R2_FB15
 ((
ušt32_t
)0x00008000è

	)

7286 

	#CAN_F7R2_FB16
 ((
ušt32_t
)0x00010000è

	)

7287 

	#CAN_F7R2_FB17
 ((
ušt32_t
)0x00020000è

	)

7288 

	#CAN_F7R2_FB18
 ((
ušt32_t
)0x00040000è

	)

7289 

	#CAN_F7R2_FB19
 ((
ušt32_t
)0x00080000è

	)

7290 

	#CAN_F7R2_FB20
 ((
ušt32_t
)0x00100000è

	)

7291 

	#CAN_F7R2_FB21
 ((
ušt32_t
)0x00200000è

	)

7292 

	#CAN_F7R2_FB22
 ((
ušt32_t
)0x00400000è

	)

7293 

	#CAN_F7R2_FB23
 ((
ušt32_t
)0x00800000è

	)

7294 

	#CAN_F7R2_FB24
 ((
ušt32_t
)0x01000000è

	)

7295 

	#CAN_F7R2_FB25
 ((
ušt32_t
)0x02000000è

	)

7296 

	#CAN_F7R2_FB26
 ((
ušt32_t
)0x04000000è

	)

7297 

	#CAN_F7R2_FB27
 ((
ušt32_t
)0x08000000è

	)

7298 

	#CAN_F7R2_FB28
 ((
ušt32_t
)0x10000000è

	)

7299 

	#CAN_F7R2_FB29
 ((
ušt32_t
)0x20000000è

	)

7300 

	#CAN_F7R2_FB30
 ((
ušt32_t
)0x40000000è

	)

7301 

	#CAN_F7R2_FB31
 ((
ušt32_t
)0x80000000è

	)

7304 

	#CAN_F8R2_FB0
 ((
ušt32_t
)0x00000001è

	)

7305 

	#CAN_F8R2_FB1
 ((
ušt32_t
)0x00000002è

	)

7306 

	#CAN_F8R2_FB2
 ((
ušt32_t
)0x00000004è

	)

7307 

	#CAN_F8R2_FB3
 ((
ušt32_t
)0x00000008è

	)

7308 

	#CAN_F8R2_FB4
 ((
ušt32_t
)0x00000010è

	)

7309 

	#CAN_F8R2_FB5
 ((
ušt32_t
)0x00000020è

	)

7310 

	#CAN_F8R2_FB6
 ((
ušt32_t
)0x00000040è

	)

7311 

	#CAN_F8R2_FB7
 ((
ušt32_t
)0x00000080è

	)

7312 

	#CAN_F8R2_FB8
 ((
ušt32_t
)0x00000100è

	)

7313 

	#CAN_F8R2_FB9
 ((
ušt32_t
)0x00000200è

	)

7314 

	#CAN_F8R2_FB10
 ((
ušt32_t
)0x00000400è

	)

7315 

	#CAN_F8R2_FB11
 ((
ušt32_t
)0x00000800è

	)

7316 

	#CAN_F8R2_FB12
 ((
ušt32_t
)0x00001000è

	)

7317 

	#CAN_F8R2_FB13
 ((
ušt32_t
)0x00002000è

	)

7318 

	#CAN_F8R2_FB14
 ((
ušt32_t
)0x00004000è

	)

7319 

	#CAN_F8R2_FB15
 ((
ušt32_t
)0x00008000è

	)

7320 

	#CAN_F8R2_FB16
 ((
ušt32_t
)0x00010000è

	)

7321 

	#CAN_F8R2_FB17
 ((
ušt32_t
)0x00020000è

	)

7322 

	#CAN_F8R2_FB18
 ((
ušt32_t
)0x00040000è

	)

7323 

	#CAN_F8R2_FB19
 ((
ušt32_t
)0x00080000è

	)

7324 

	#CAN_F8R2_FB20
 ((
ušt32_t
)0x00100000è

	)

7325 

	#CAN_F8R2_FB21
 ((
ušt32_t
)0x00200000è

	)

7326 

	#CAN_F8R2_FB22
 ((
ušt32_t
)0x00400000è

	)

7327 

	#CAN_F8R2_FB23
 ((
ušt32_t
)0x00800000è

	)

7328 

	#CAN_F8R2_FB24
 ((
ušt32_t
)0x01000000è

	)

7329 

	#CAN_F8R2_FB25
 ((
ušt32_t
)0x02000000è

	)

7330 

	#CAN_F8R2_FB26
 ((
ušt32_t
)0x04000000è

	)

7331 

	#CAN_F8R2_FB27
 ((
ušt32_t
)0x08000000è

	)

7332 

	#CAN_F8R2_FB28
 ((
ušt32_t
)0x10000000è

	)

7333 

	#CAN_F8R2_FB29
 ((
ušt32_t
)0x20000000è

	)

7334 

	#CAN_F8R2_FB30
 ((
ušt32_t
)0x40000000è

	)

7335 

	#CAN_F8R2_FB31
 ((
ušt32_t
)0x80000000è

	)

7338 

	#CAN_F9R2_FB0
 ((
ušt32_t
)0x00000001è

	)

7339 

	#CAN_F9R2_FB1
 ((
ušt32_t
)0x00000002è

	)

7340 

	#CAN_F9R2_FB2
 ((
ušt32_t
)0x00000004è

	)

7341 

	#CAN_F9R2_FB3
 ((
ušt32_t
)0x00000008è

	)

7342 

	#CAN_F9R2_FB4
 ((
ušt32_t
)0x00000010è

	)

7343 

	#CAN_F9R2_FB5
 ((
ušt32_t
)0x00000020è

	)

7344 

	#CAN_F9R2_FB6
 ((
ušt32_t
)0x00000040è

	)

7345 

	#CAN_F9R2_FB7
 ((
ušt32_t
)0x00000080è

	)

7346 

	#CAN_F9R2_FB8
 ((
ušt32_t
)0x00000100è

	)

7347 

	#CAN_F9R2_FB9
 ((
ušt32_t
)0x00000200è

	)

7348 

	#CAN_F9R2_FB10
 ((
ušt32_t
)0x00000400è

	)

7349 

	#CAN_F9R2_FB11
 ((
ušt32_t
)0x00000800è

	)

7350 

	#CAN_F9R2_FB12
 ((
ušt32_t
)0x00001000è

	)

7351 

	#CAN_F9R2_FB13
 ((
ušt32_t
)0x00002000è

	)

7352 

	#CAN_F9R2_FB14
 ((
ušt32_t
)0x00004000è

	)

7353 

	#CAN_F9R2_FB15
 ((
ušt32_t
)0x00008000è

	)

7354 

	#CAN_F9R2_FB16
 ((
ušt32_t
)0x00010000è

	)

7355 

	#CAN_F9R2_FB17
 ((
ušt32_t
)0x00020000è

	)

7356 

	#CAN_F9R2_FB18
 ((
ušt32_t
)0x00040000è

	)

7357 

	#CAN_F9R2_FB19
 ((
ušt32_t
)0x00080000è

	)

7358 

	#CAN_F9R2_FB20
 ((
ušt32_t
)0x00100000è

	)

7359 

	#CAN_F9R2_FB21
 ((
ušt32_t
)0x00200000è

	)

7360 

	#CAN_F9R2_FB22
 ((
ušt32_t
)0x00400000è

	)

7361 

	#CAN_F9R2_FB23
 ((
ušt32_t
)0x00800000è

	)

7362 

	#CAN_F9R2_FB24
 ((
ušt32_t
)0x01000000è

	)

7363 

	#CAN_F9R2_FB25
 ((
ušt32_t
)0x02000000è

	)

7364 

	#CAN_F9R2_FB26
 ((
ušt32_t
)0x04000000è

	)

7365 

	#CAN_F9R2_FB27
 ((
ušt32_t
)0x08000000è

	)

7366 

	#CAN_F9R2_FB28
 ((
ušt32_t
)0x10000000è

	)

7367 

	#CAN_F9R2_FB29
 ((
ušt32_t
)0x20000000è

	)

7368 

	#CAN_F9R2_FB30
 ((
ušt32_t
)0x40000000è

	)

7369 

	#CAN_F9R2_FB31
 ((
ušt32_t
)0x80000000è

	)

7372 

	#CAN_F10R2_FB0
 ((
ušt32_t
)0x00000001è

	)

7373 

	#CAN_F10R2_FB1
 ((
ušt32_t
)0x00000002è

	)

7374 

	#CAN_F10R2_FB2
 ((
ušt32_t
)0x00000004è

	)

7375 

	#CAN_F10R2_FB3
 ((
ušt32_t
)0x00000008è

	)

7376 

	#CAN_F10R2_FB4
 ((
ušt32_t
)0x00000010è

	)

7377 

	#CAN_F10R2_FB5
 ((
ušt32_t
)0x00000020è

	)

7378 

	#CAN_F10R2_FB6
 ((
ušt32_t
)0x00000040è

	)

7379 

	#CAN_F10R2_FB7
 ((
ušt32_t
)0x00000080è

	)

7380 

	#CAN_F10R2_FB8
 ((
ušt32_t
)0x00000100è

	)

7381 

	#CAN_F10R2_FB9
 ((
ušt32_t
)0x00000200è

	)

7382 

	#CAN_F10R2_FB10
 ((
ušt32_t
)0x00000400è

	)

7383 

	#CAN_F10R2_FB11
 ((
ušt32_t
)0x00000800è

	)

7384 

	#CAN_F10R2_FB12
 ((
ušt32_t
)0x00001000è

	)

7385 

	#CAN_F10R2_FB13
 ((
ušt32_t
)0x00002000è

	)

7386 

	#CAN_F10R2_FB14
 ((
ušt32_t
)0x00004000è

	)

7387 

	#CAN_F10R2_FB15
 ((
ušt32_t
)0x00008000è

	)

7388 

	#CAN_F10R2_FB16
 ((
ušt32_t
)0x00010000è

	)

7389 

	#CAN_F10R2_FB17
 ((
ušt32_t
)0x00020000è

	)

7390 

	#CAN_F10R2_FB18
 ((
ušt32_t
)0x00040000è

	)

7391 

	#CAN_F10R2_FB19
 ((
ušt32_t
)0x00080000è

	)

7392 

	#CAN_F10R2_FB20
 ((
ušt32_t
)0x00100000è

	)

7393 

	#CAN_F10R2_FB21
 ((
ušt32_t
)0x00200000è

	)

7394 

	#CAN_F10R2_FB22
 ((
ušt32_t
)0x00400000è

	)

7395 

	#CAN_F10R2_FB23
 ((
ušt32_t
)0x00800000è

	)

7396 

	#CAN_F10R2_FB24
 ((
ušt32_t
)0x01000000è

	)

7397 

	#CAN_F10R2_FB25
 ((
ušt32_t
)0x02000000è

	)

7398 

	#CAN_F10R2_FB26
 ((
ušt32_t
)0x04000000è

	)

7399 

	#CAN_F10R2_FB27
 ((
ušt32_t
)0x08000000è

	)

7400 

	#CAN_F10R2_FB28
 ((
ušt32_t
)0x10000000è

	)

7401 

	#CAN_F10R2_FB29
 ((
ušt32_t
)0x20000000è

	)

7402 

	#CAN_F10R2_FB30
 ((
ušt32_t
)0x40000000è

	)

7403 

	#CAN_F10R2_FB31
 ((
ušt32_t
)0x80000000è

	)

7406 

	#CAN_F11R2_FB0
 ((
ušt32_t
)0x00000001è

	)

7407 

	#CAN_F11R2_FB1
 ((
ušt32_t
)0x00000002è

	)

7408 

	#CAN_F11R2_FB2
 ((
ušt32_t
)0x00000004è

	)

7409 

	#CAN_F11R2_FB3
 ((
ušt32_t
)0x00000008è

	)

7410 

	#CAN_F11R2_FB4
 ((
ušt32_t
)0x00000010è

	)

7411 

	#CAN_F11R2_FB5
 ((
ušt32_t
)0x00000020è

	)

7412 

	#CAN_F11R2_FB6
 ((
ušt32_t
)0x00000040è

	)

7413 

	#CAN_F11R2_FB7
 ((
ušt32_t
)0x00000080è

	)

7414 

	#CAN_F11R2_FB8
 ((
ušt32_t
)0x00000100è

	)

7415 

	#CAN_F11R2_FB9
 ((
ušt32_t
)0x00000200è

	)

7416 

	#CAN_F11R2_FB10
 ((
ušt32_t
)0x00000400è

	)

7417 

	#CAN_F11R2_FB11
 ((
ušt32_t
)0x00000800è

	)

7418 

	#CAN_F11R2_FB12
 ((
ušt32_t
)0x00001000è

	)

7419 

	#CAN_F11R2_FB13
 ((
ušt32_t
)0x00002000è

	)

7420 

	#CAN_F11R2_FB14
 ((
ušt32_t
)0x00004000è

	)

7421 

	#CAN_F11R2_FB15
 ((
ušt32_t
)0x00008000è

	)

7422 

	#CAN_F11R2_FB16
 ((
ušt32_t
)0x00010000è

	)

7423 

	#CAN_F11R2_FB17
 ((
ušt32_t
)0x00020000è

	)

7424 

	#CAN_F11R2_FB18
 ((
ušt32_t
)0x00040000è

	)

7425 

	#CAN_F11R2_FB19
 ((
ušt32_t
)0x00080000è

	)

7426 

	#CAN_F11R2_FB20
 ((
ušt32_t
)0x00100000è

	)

7427 

	#CAN_F11R2_FB21
 ((
ušt32_t
)0x00200000è

	)

7428 

	#CAN_F11R2_FB22
 ((
ušt32_t
)0x00400000è

	)

7429 

	#CAN_F11R2_FB23
 ((
ušt32_t
)0x00800000è

	)

7430 

	#CAN_F11R2_FB24
 ((
ušt32_t
)0x01000000è

	)

7431 

	#CAN_F11R2_FB25
 ((
ušt32_t
)0x02000000è

	)

7432 

	#CAN_F11R2_FB26
 ((
ušt32_t
)0x04000000è

	)

7433 

	#CAN_F11R2_FB27
 ((
ušt32_t
)0x08000000è

	)

7434 

	#CAN_F11R2_FB28
 ((
ušt32_t
)0x10000000è

	)

7435 

	#CAN_F11R2_FB29
 ((
ušt32_t
)0x20000000è

	)

7436 

	#CAN_F11R2_FB30
 ((
ušt32_t
)0x40000000è

	)

7437 

	#CAN_F11R2_FB31
 ((
ušt32_t
)0x80000000è

	)

7440 

	#CAN_F12R2_FB0
 ((
ušt32_t
)0x00000001è

	)

7441 

	#CAN_F12R2_FB1
 ((
ušt32_t
)0x00000002è

	)

7442 

	#CAN_F12R2_FB2
 ((
ušt32_t
)0x00000004è

	)

7443 

	#CAN_F12R2_FB3
 ((
ušt32_t
)0x00000008è

	)

7444 

	#CAN_F12R2_FB4
 ((
ušt32_t
)0x00000010è

	)

7445 

	#CAN_F12R2_FB5
 ((
ušt32_t
)0x00000020è

	)

7446 

	#CAN_F12R2_FB6
 ((
ušt32_t
)0x00000040è

	)

7447 

	#CAN_F12R2_FB7
 ((
ušt32_t
)0x00000080è

	)

7448 

	#CAN_F12R2_FB8
 ((
ušt32_t
)0x00000100è

	)

7449 

	#CAN_F12R2_FB9
 ((
ušt32_t
)0x00000200è

	)

7450 

	#CAN_F12R2_FB10
 ((
ušt32_t
)0x00000400è

	)

7451 

	#CAN_F12R2_FB11
 ((
ušt32_t
)0x00000800è

	)

7452 

	#CAN_F12R2_FB12
 ((
ušt32_t
)0x00001000è

	)

7453 

	#CAN_F12R2_FB13
 ((
ušt32_t
)0x00002000è

	)

7454 

	#CAN_F12R2_FB14
 ((
ušt32_t
)0x00004000è

	)

7455 

	#CAN_F12R2_FB15
 ((
ušt32_t
)0x00008000è

	)

7456 

	#CAN_F12R2_FB16
 ((
ušt32_t
)0x00010000è

	)

7457 

	#CAN_F12R2_FB17
 ((
ušt32_t
)0x00020000è

	)

7458 

	#CAN_F12R2_FB18
 ((
ušt32_t
)0x00040000è

	)

7459 

	#CAN_F12R2_FB19
 ((
ušt32_t
)0x00080000è

	)

7460 

	#CAN_F12R2_FB20
 ((
ušt32_t
)0x00100000è

	)

7461 

	#CAN_F12R2_FB21
 ((
ušt32_t
)0x00200000è

	)

7462 

	#CAN_F12R2_FB22
 ((
ušt32_t
)0x00400000è

	)

7463 

	#CAN_F12R2_FB23
 ((
ušt32_t
)0x00800000è

	)

7464 

	#CAN_F12R2_FB24
 ((
ušt32_t
)0x01000000è

	)

7465 

	#CAN_F12R2_FB25
 ((
ušt32_t
)0x02000000è

	)

7466 

	#CAN_F12R2_FB26
 ((
ušt32_t
)0x04000000è

	)

7467 

	#CAN_F12R2_FB27
 ((
ušt32_t
)0x08000000è

	)

7468 

	#CAN_F12R2_FB28
 ((
ušt32_t
)0x10000000è

	)

7469 

	#CAN_F12R2_FB29
 ((
ušt32_t
)0x20000000è

	)

7470 

	#CAN_F12R2_FB30
 ((
ušt32_t
)0x40000000è

	)

7471 

	#CAN_F12R2_FB31
 ((
ušt32_t
)0x80000000è

	)

7474 

	#CAN_F13R2_FB0
 ((
ušt32_t
)0x00000001è

	)

7475 

	#CAN_F13R2_FB1
 ((
ušt32_t
)0x00000002è

	)

7476 

	#CAN_F13R2_FB2
 ((
ušt32_t
)0x00000004è

	)

7477 

	#CAN_F13R2_FB3
 ((
ušt32_t
)0x00000008è

	)

7478 

	#CAN_F13R2_FB4
 ((
ušt32_t
)0x00000010è

	)

7479 

	#CAN_F13R2_FB5
 ((
ušt32_t
)0x00000020è

	)

7480 

	#CAN_F13R2_FB6
 ((
ušt32_t
)0x00000040è

	)

7481 

	#CAN_F13R2_FB7
 ((
ušt32_t
)0x00000080è

	)

7482 

	#CAN_F13R2_FB8
 ((
ušt32_t
)0x00000100è

	)

7483 

	#CAN_F13R2_FB9
 ((
ušt32_t
)0x00000200è

	)

7484 

	#CAN_F13R2_FB10
 ((
ušt32_t
)0x00000400è

	)

7485 

	#CAN_F13R2_FB11
 ((
ušt32_t
)0x00000800è

	)

7486 

	#CAN_F13R2_FB12
 ((
ušt32_t
)0x00001000è

	)

7487 

	#CAN_F13R2_FB13
 ((
ušt32_t
)0x00002000è

	)

7488 

	#CAN_F13R2_FB14
 ((
ušt32_t
)0x00004000è

	)

7489 

	#CAN_F13R2_FB15
 ((
ušt32_t
)0x00008000è

	)

7490 

	#CAN_F13R2_FB16
 ((
ušt32_t
)0x00010000è

	)

7491 

	#CAN_F13R2_FB17
 ((
ušt32_t
)0x00020000è

	)

7492 

	#CAN_F13R2_FB18
 ((
ušt32_t
)0x00040000è

	)

7493 

	#CAN_F13R2_FB19
 ((
ušt32_t
)0x00080000è

	)

7494 

	#CAN_F13R2_FB20
 ((
ušt32_t
)0x00100000è

	)

7495 

	#CAN_F13R2_FB21
 ((
ušt32_t
)0x00200000è

	)

7496 

	#CAN_F13R2_FB22
 ((
ušt32_t
)0x00400000è

	)

7497 

	#CAN_F13R2_FB23
 ((
ušt32_t
)0x00800000è

	)

7498 

	#CAN_F13R2_FB24
 ((
ušt32_t
)0x01000000è

	)

7499 

	#CAN_F13R2_FB25
 ((
ušt32_t
)0x02000000è

	)

7500 

	#CAN_F13R2_FB26
 ((
ušt32_t
)0x04000000è

	)

7501 

	#CAN_F13R2_FB27
 ((
ušt32_t
)0x08000000è

	)

7502 

	#CAN_F13R2_FB28
 ((
ušt32_t
)0x10000000è

	)

7503 

	#CAN_F13R2_FB29
 ((
ušt32_t
)0x20000000è

	)

7504 

	#CAN_F13R2_FB30
 ((
ušt32_t
)0x40000000è

	)

7505 

	#CAN_F13R2_FB31
 ((
ušt32_t
)0x80000000è

	)

7514 

	#SPI_CR1_CPHA
 ((
ušt16_t
)0x0001è

	)

7515 

	#SPI_CR1_CPOL
 ((
ušt16_t
)0x0002è

	)

7516 

	#SPI_CR1_MSTR
 ((
ušt16_t
)0x0004è

	)

7518 

	#SPI_CR1_BR
 ((
ušt16_t
)0x0038è

	)

7519 

	#SPI_CR1_BR_0
 ((
ušt16_t
)0x0008è

	)

7520 

	#SPI_CR1_BR_1
 ((
ušt16_t
)0x0010è

	)

7521 

	#SPI_CR1_BR_2
 ((
ušt16_t
)0x0020è

	)

7523 

	#SPI_CR1_SPE
 ((
ušt16_t
)0x0040è

	)

7524 

	#SPI_CR1_LSBFIRST
 ((
ušt16_t
)0x0080è

	)

7525 

	#SPI_CR1_SSI
 ((
ušt16_t
)0x0100è

	)

7526 

	#SPI_CR1_SSM
 ((
ušt16_t
)0x0200è

	)

7527 

	#SPI_CR1_RXONLY
 ((
ušt16_t
)0x0400è

	)

7528 

	#SPI_CR1_DFF
 ((
ušt16_t
)0x0800è

	)

7529 

	#SPI_CR1_CRCNEXT
 ((
ušt16_t
)0x1000è

	)

7530 

	#SPI_CR1_CRCEN
 ((
ušt16_t
)0x2000è

	)

7531 

	#SPI_CR1_BIDIOE
 ((
ušt16_t
)0x4000è

	)

7532 

	#SPI_CR1_BIDIMODE
 ((
ušt16_t
)0x8000è

	)

7535 

	#SPI_CR2_RXDMAEN
 ((
ušt8_t
)0x01è

	)

7536 

	#SPI_CR2_TXDMAEN
 ((
ušt8_t
)0x02è

	)

7537 

	#SPI_CR2_SSOE
 ((
ušt8_t
)0x04è

	)

7538 

	#SPI_CR2_ERRIE
 ((
ušt8_t
)0x20è

	)

7539 

	#SPI_CR2_RXNEIE
 ((
ušt8_t
)0x40è

	)

7540 

	#SPI_CR2_TXEIE
 ((
ušt8_t
)0x80è

	)

7543 

	#SPI_SR_RXNE
 ((
ušt8_t
)0x01è

	)

7544 

	#SPI_SR_TXE
 ((
ušt8_t
)0x02è

	)

7545 

	#SPI_SR_CHSIDE
 ((
ušt8_t
)0x04è

	)

7546 

	#SPI_SR_UDR
 ((
ušt8_t
)0x08è

	)

7547 

	#SPI_SR_CRCERR
 ((
ušt8_t
)0x10è

	)

7548 

	#SPI_SR_MODF
 ((
ušt8_t
)0x20è

	)

7549 

	#SPI_SR_OVR
 ((
ušt8_t
)0x40è

	)

7550 

	#SPI_SR_BSY
 ((
ušt8_t
)0x80è

	)

7553 

	#SPI_DR_DR
 ((
ušt16_t
)0xFFFFè

	)

7556 

	#SPI_CRCPR_CRCPOLY
 ((
ušt16_t
)0xFFFFè

	)

7559 

	#SPI_RXCRCR_RXCRC
 ((
ušt16_t
)0xFFFFè

	)

7562 

	#SPI_TXCRCR_TXCRC
 ((
ušt16_t
)0xFFFFè

	)

7565 

	#SPI_I2SCFGR_CHLEN
 ((
ušt16_t
)0x0001è

	)

7567 

	#SPI_I2SCFGR_DATLEN
 ((
ušt16_t
)0x0006è

	)

7568 

	#SPI_I2SCFGR_DATLEN_0
 ((
ušt16_t
)0x0002è

	)

7569 

	#SPI_I2SCFGR_DATLEN_1
 ((
ušt16_t
)0x0004è

	)

7571 

	#SPI_I2SCFGR_CKPOL
 ((
ušt16_t
)0x0008è

	)

7573 

	#SPI_I2SCFGR_I2SSTD
 ((
ušt16_t
)0x0030è

	)

7574 

	#SPI_I2SCFGR_I2SSTD_0
 ((
ušt16_t
)0x0010è

	)

7575 

	#SPI_I2SCFGR_I2SSTD_1
 ((
ušt16_t
)0x0020è

	)

7577 

	#SPI_I2SCFGR_PCMSYNC
 ((
ušt16_t
)0x0080è

	)

7579 

	#SPI_I2SCFGR_I2SCFG
 ((
ušt16_t
)0x0300è

	)

7580 

	#SPI_I2SCFGR_I2SCFG_0
 ((
ušt16_t
)0x0100è

	)

7581 

	#SPI_I2SCFGR_I2SCFG_1
 ((
ušt16_t
)0x0200è

	)

7583 

	#SPI_I2SCFGR_I2SE
 ((
ušt16_t
)0x0400è

	)

7584 

	#SPI_I2SCFGR_I2SMOD
 ((
ušt16_t
)0x0800è

	)

7587 

	#SPI_I2SPR_I2SDIV
 ((
ušt16_t
)0x00FFè

	)

7588 

	#SPI_I2SPR_ODD
 ((
ušt16_t
)0x0100è

	)

7589 

	#SPI_I2SPR_MCKOE
 ((
ušt16_t
)0x0200è

	)

7598 

	#I2C_CR1_PE
 ((
ušt16_t
)0x0001è

	)

7599 

	#I2C_CR1_SMBUS
 ((
ušt16_t
)0x0002è

	)

7600 

	#I2C_CR1_SMBTYPE
 ((
ušt16_t
)0x0008è

	)

7601 

	#I2C_CR1_ENARP
 ((
ušt16_t
)0x0010è

	)

7602 

	#I2C_CR1_ENPEC
 ((
ušt16_t
)0x0020è

	)

7603 

	#I2C_CR1_ENGC
 ((
ušt16_t
)0x0040è

	)

7604 

	#I2C_CR1_NOSTRETCH
 ((
ušt16_t
)0x0080è

	)

7605 

	#I2C_CR1_START
 ((
ušt16_t
)0x0100è

	)

7606 

	#I2C_CR1_STOP
 ((
ušt16_t
)0x0200è

	)

7607 

	#I2C_CR1_ACK
 ((
ušt16_t
)0x0400è

	)

7608 

	#I2C_CR1_POS
 ((
ušt16_t
)0x0800è

	)

7609 

	#I2C_CR1_PEC
 ((
ušt16_t
)0x1000è

	)

7610 

	#I2C_CR1_ALERT
 ((
ušt16_t
)0x2000è

	)

7611 

	#I2C_CR1_SWRST
 ((
ušt16_t
)0x8000è

	)

7614 

	#I2C_CR2_FREQ
 ((
ušt16_t
)0x003Fè

	)

7615 

	#I2C_CR2_FREQ_0
 ((
ušt16_t
)0x0001è

	)

7616 

	#I2C_CR2_FREQ_1
 ((
ušt16_t
)0x0002è

	)

7617 

	#I2C_CR2_FREQ_2
 ((
ušt16_t
)0x0004è

	)

7618 

	#I2C_CR2_FREQ_3
 ((
ušt16_t
)0x0008è

	)

7619 

	#I2C_CR2_FREQ_4
 ((
ušt16_t
)0x0010è

	)

7620 

	#I2C_CR2_FREQ_5
 ((
ušt16_t
)0x0020è

	)

7622 

	#I2C_CR2_ITERREN
 ((
ušt16_t
)0x0100è

	)

7623 

	#I2C_CR2_ITEVTEN
 ((
ušt16_t
)0x0200è

	)

7624 

	#I2C_CR2_ITBUFEN
 ((
ušt16_t
)0x0400è

	)

7625 

	#I2C_CR2_DMAEN
 ((
ušt16_t
)0x0800è

	)

7626 

	#I2C_CR2_LAST
 ((
ušt16_t
)0x1000è

	)

7629 

	#I2C_OAR1_ADD1_7
 ((
ušt16_t
)0x00FEè

	)

7630 

	#I2C_OAR1_ADD8_9
 ((
ušt16_t
)0x0300è

	)

7632 

	#I2C_OAR1_ADD0
 ((
ušt16_t
)0x0001è

	)

7633 

	#I2C_OAR1_ADD1
 ((
ušt16_t
)0x0002è

	)

7634 

	#I2C_OAR1_ADD2
 ((
ušt16_t
)0x0004è

	)

7635 

	#I2C_OAR1_ADD3
 ((
ušt16_t
)0x0008è

	)

7636 

	#I2C_OAR1_ADD4
 ((
ušt16_t
)0x0010è

	)

7637 

	#I2C_OAR1_ADD5
 ((
ušt16_t
)0x0020è

	)

7638 

	#I2C_OAR1_ADD6
 ((
ušt16_t
)0x0040è

	)

7639 

	#I2C_OAR1_ADD7
 ((
ušt16_t
)0x0080è

	)

7640 

	#I2C_OAR1_ADD8
 ((
ušt16_t
)0x0100è

	)

7641 

	#I2C_OAR1_ADD9
 ((
ušt16_t
)0x0200è

	)

7643 

	#I2C_OAR1_ADDMODE
 ((
ušt16_t
)0x8000è

	)

7646 

	#I2C_OAR2_ENDUAL
 ((
ušt8_t
)0x01è

	)

7647 

	#I2C_OAR2_ADD2
 ((
ušt8_t
)0xFEè

	)

7650 

	#I2C_DR_DR
 ((
ušt8_t
)0xFFè

	)

7653 

	#I2C_SR1_SB
 ((
ušt16_t
)0x0001è

	)

7654 

	#I2C_SR1_ADDR
 ((
ušt16_t
)0x0002è

	)

7655 

	#I2C_SR1_BTF
 ((
ušt16_t
)0x0004è

	)

7656 

	#I2C_SR1_ADD10
 ((
ušt16_t
)0x0008è

	)

7657 

	#I2C_SR1_STOPF
 ((
ušt16_t
)0x0010è

	)

7658 

	#I2C_SR1_RXNE
 ((
ušt16_t
)0x0040è

	)

7659 

	#I2C_SR1_TXE
 ((
ušt16_t
)0x0080è

	)

7660 

	#I2C_SR1_BERR
 ((
ušt16_t
)0x0100è

	)

7661 

	#I2C_SR1_ARLO
 ((
ušt16_t
)0x0200è

	)

7662 

	#I2C_SR1_AF
 ((
ušt16_t
)0x0400è

	)

7663 

	#I2C_SR1_OVR
 ((
ušt16_t
)0x0800è

	)

7664 

	#I2C_SR1_PECERR
 ((
ušt16_t
)0x1000è

	)

7665 

	#I2C_SR1_TIMEOUT
 ((
ušt16_t
)0x4000è

	)

7666 

	#I2C_SR1_SMBALERT
 ((
ušt16_t
)0x8000è

	)

7669 

	#I2C_SR2_MSL
 ((
ušt16_t
)0x0001è

	)

7670 

	#I2C_SR2_BUSY
 ((
ušt16_t
)0x0002è

	)

7671 

	#I2C_SR2_TRA
 ((
ušt16_t
)0x0004è

	)

7672 

	#I2C_SR2_GENCALL
 ((
ušt16_t
)0x0010è

	)

7673 

	#I2C_SR2_SMBDEFAULT
 ((
ušt16_t
)0x0020è

	)

7674 

	#I2C_SR2_SMBHOST
 ((
ušt16_t
)0x0040è

	)

7675 

	#I2C_SR2_DUALF
 ((
ušt16_t
)0x0080è

	)

7676 

	#I2C_SR2_PEC
 ((
ušt16_t
)0xFF00è

	)

7679 

	#I2C_CCR_CCR
 ((
ušt16_t
)0x0FFFè

	)

7680 

	#I2C_CCR_DUTY
 ((
ušt16_t
)0x4000è

	)

7681 

	#I2C_CCR_FS
 ((
ušt16_t
)0x8000è

	)

7684 

	#I2C_TRISE_TRISE
 ((
ušt8_t
)0x3Fè

	)

7693 

	#USART_SR_PE
 ((
ušt16_t
)0x0001è

	)

7694 

	#USART_SR_FE
 ((
ušt16_t
)0x0002è

	)

7695 

	#USART_SR_NE
 ((
ušt16_t
)0x0004è

	)

7696 

	#USART_SR_ORE
 ((
ušt16_t
)0x0008è

	)

7697 

	#USART_SR_IDLE
 ((
ušt16_t
)0x0010è

	)

7698 

	#USART_SR_RXNE
 ((
ušt16_t
)0x0020è

	)

7699 

	#USART_SR_TC
 ((
ušt16_t
)0x0040è

	)

7700 

	#USART_SR_TXE
 ((
ušt16_t
)0x0080è

	)

7701 

	#USART_SR_LBD
 ((
ušt16_t
)0x0100è

	)

7702 

	#USART_SR_CTS
 ((
ušt16_t
)0x0200è

	)

7705 

	#USART_DR_DR
 ((
ušt16_t
)0x01FFè

	)

7708 

	#USART_BRR_DIV_F¿ùiÚ
 ((
ušt16_t
)0x000Fè

	)

7709 

	#USART_BRR_DIV_Mªtis§
 ((
ušt16_t
)0xFFF0è

	)

7712 

	#USART_CR1_SBK
 ((
ušt16_t
)0x0001è

	)

7713 

	#USART_CR1_RWU
 ((
ušt16_t
)0x0002è

	)

7714 

	#USART_CR1_RE
 ((
ušt16_t
)0x0004è

	)

7715 

	#USART_CR1_TE
 ((
ušt16_t
)0x0008è

	)

7716 

	#USART_CR1_IDLEIE
 ((
ušt16_t
)0x0010è

	)

7717 

	#USART_CR1_RXNEIE
 ((
ušt16_t
)0x0020è

	)

7718 

	#USART_CR1_TCIE
 ((
ušt16_t
)0x0040è

	)

7719 

	#USART_CR1_TXEIE
 ((
ušt16_t
)0x0080è

	)

7720 

	#USART_CR1_PEIE
 ((
ušt16_t
)0x0100è

	)

7721 

	#USART_CR1_PS
 ((
ušt16_t
)0x0200è

	)

7722 

	#USART_CR1_PCE
 ((
ušt16_t
)0x0400è

	)

7723 

	#USART_CR1_WAKE
 ((
ušt16_t
)0x0800è

	)

7724 

	#USART_CR1_M
 ((
ušt16_t
)0x1000è

	)

7725 

	#USART_CR1_UE
 ((
ušt16_t
)0x2000è

	)

7726 

	#USART_CR1_OVER8
 ((
ušt16_t
)0x8000è

	)

7729 

	#USART_CR2_ADD
 ((
ušt16_t
)0x000Fè

	)

7730 

	#USART_CR2_LBDL
 ((
ušt16_t
)0x0020è

	)

7731 

	#USART_CR2_LBDIE
 ((
ušt16_t
)0x0040è

	)

7732 

	#USART_CR2_LBCL
 ((
ušt16_t
)0x0100è

	)

7733 

	#USART_CR2_CPHA
 ((
ušt16_t
)0x0200è

	)

7734 

	#USART_CR2_CPOL
 ((
ušt16_t
)0x0400è

	)

7735 

	#USART_CR2_CLKEN
 ((
ušt16_t
)0x0800è

	)

7737 

	#USART_CR2_STOP
 ((
ušt16_t
)0x3000è

	)

7738 

	#USART_CR2_STOP_0
 ((
ušt16_t
)0x1000è

	)

7739 

	#USART_CR2_STOP_1
 ((
ušt16_t
)0x2000è

	)

7741 

	#USART_CR2_LINEN
 ((
ušt16_t
)0x4000è

	)

7744 

	#USART_CR3_EIE
 ((
ušt16_t
)0x0001è

	)

7745 

	#USART_CR3_IREN
 ((
ušt16_t
)0x0002è

	)

7746 

	#USART_CR3_IRLP
 ((
ušt16_t
)0x0004è

	)

7747 

	#USART_CR3_HDSEL
 ((
ušt16_t
)0x0008è

	)

7748 

	#USART_CR3_NACK
 ((
ušt16_t
)0x0010è

	)

7749 

	#USART_CR3_SCEN
 ((
ušt16_t
)0x0020è

	)

7750 

	#USART_CR3_DMAR
 ((
ušt16_t
)0x0040è

	)

7751 

	#USART_CR3_DMAT
 ((
ušt16_t
)0x0080è

	)

7752 

	#USART_CR3_RTSE
 ((
ušt16_t
)0x0100è

	)

7753 

	#USART_CR3_CTSE
 ((
ušt16_t
)0x0200è

	)

7754 

	#USART_CR3_CTSIE
 ((
ušt16_t
)0x0400è

	)

7755 

	#USART_CR3_ONEBIT
 ((
ušt16_t
)0x0800è

	)

7758 

	#USART_GTPR_PSC
 ((
ušt16_t
)0x00FFè

	)

7759 

	#USART_GTPR_PSC_0
 ((
ušt16_t
)0x0001è

	)

7760 

	#USART_GTPR_PSC_1
 ((
ušt16_t
)0x0002è

	)

7761 

	#USART_GTPR_PSC_2
 ((
ušt16_t
)0x0004è

	)

7762 

	#USART_GTPR_PSC_3
 ((
ušt16_t
)0x0008è

	)

7763 

	#USART_GTPR_PSC_4
 ((
ušt16_t
)0x0010è

	)

7764 

	#USART_GTPR_PSC_5
 ((
ušt16_t
)0x0020è

	)

7765 

	#USART_GTPR_PSC_6
 ((
ušt16_t
)0x0040è

	)

7766 

	#USART_GTPR_PSC_7
 ((
ušt16_t
)0x0080è

	)

7768 

	#USART_GTPR_GT
 ((
ušt16_t
)0xFF00è

	)

7777 

	#DBGMCU_IDCODE_DEV_ID
 ((
ušt32_t
)0x00000FFFè

	)

7779 

	#DBGMCU_IDCODE_REV_ID
 ((
ušt32_t
)0xFFFF0000è

	)

7780 

	#DBGMCU_IDCODE_REV_ID_0
 ((
ušt32_t
)0x00010000è

	)

7781 

	#DBGMCU_IDCODE_REV_ID_1
 ((
ušt32_t
)0x00020000è

	)

7782 

	#DBGMCU_IDCODE_REV_ID_2
 ((
ušt32_t
)0x00040000è

	)

7783 

	#DBGMCU_IDCODE_REV_ID_3
 ((
ušt32_t
)0x00080000è

	)

7784 

	#DBGMCU_IDCODE_REV_ID_4
 ((
ušt32_t
)0x00100000è

	)

7785 

	#DBGMCU_IDCODE_REV_ID_5
 ((
ušt32_t
)0x00200000è

	)

7786 

	#DBGMCU_IDCODE_REV_ID_6
 ((
ušt32_t
)0x00400000è

	)

7787 

	#DBGMCU_IDCODE_REV_ID_7
 ((
ušt32_t
)0x00800000è

	)

7788 

	#DBGMCU_IDCODE_REV_ID_8
 ((
ušt32_t
)0x01000000è

	)

7789 

	#DBGMCU_IDCODE_REV_ID_9
 ((
ušt32_t
)0x02000000è

	)

7790 

	#DBGMCU_IDCODE_REV_ID_10
 ((
ušt32_t
)0x04000000è

	)

7791 

	#DBGMCU_IDCODE_REV_ID_11
 ((
ušt32_t
)0x08000000è

	)

7792 

	#DBGMCU_IDCODE_REV_ID_12
 ((
ušt32_t
)0x10000000è

	)

7793 

	#DBGMCU_IDCODE_REV_ID_13
 ((
ušt32_t
)0x20000000è

	)

7794 

	#DBGMCU_IDCODE_REV_ID_14
 ((
ušt32_t
)0x40000000è

	)

7795 

	#DBGMCU_IDCODE_REV_ID_15
 ((
ušt32_t
)0x80000000è

	)

7798 

	#DBGMCU_CR_DBG_SLEEP
 ((
ušt32_t
)0x00000001è

	)

7799 

	#DBGMCU_CR_DBG_STOP
 ((
ušt32_t
)0x00000002è

	)

7800 

	#DBGMCU_CR_DBG_STANDBY
 ((
ušt32_t
)0x00000004è

	)

7801 

	#DBGMCU_CR_TRACE_IOEN
 ((
ušt32_t
)0x00000020è

	)

7803 

	#DBGMCU_CR_TRACE_MODE
 ((
ušt32_t
)0x000000C0è

	)

7804 

	#DBGMCU_CR_TRACE_MODE_0
 ((
ušt32_t
)0x00000040è

	)

7805 

	#DBGMCU_CR_TRACE_MODE_1
 ((
ušt32_t
)0x00000080è

	)

7807 

	#DBGMCU_CR_DBG_IWDG_STOP
 ((
ušt32_t
)0x00000100è

	)

7808 

	#DBGMCU_CR_DBG_WWDG_STOP
 ((
ušt32_t
)0x00000200è

	)

7809 

	#DBGMCU_CR_DBG_TIM1_STOP
 ((
ušt32_t
)0x00000400è

	)

7810 

	#DBGMCU_CR_DBG_TIM2_STOP
 ((
ušt32_t
)0x00000800è

	)

7811 

	#DBGMCU_CR_DBG_TIM3_STOP
 ((
ušt32_t
)0x00001000è

	)

7812 

	#DBGMCU_CR_DBG_TIM4_STOP
 ((
ušt32_t
)0x00002000è

	)

7813 

	#DBGMCU_CR_DBG_CAN1_STOP
 ((
ušt32_t
)0x00004000è

	)

7814 

	#DBGMCU_CR_DBG_I2C1_SMBUS_TIMEOUT
 ((
ušt32_t
)0x00008000è

	)

7815 

	#DBGMCU_CR_DBG_I2C2_SMBUS_TIMEOUT
 ((
ušt32_t
)0x00010000è

	)

7816 

	#DBGMCU_CR_DBG_TIM8_STOP
 ((
ušt32_t
)0x00020000è

	)

7817 

	#DBGMCU_CR_DBG_TIM5_STOP
 ((
ušt32_t
)0x00040000è

	)

7818 

	#DBGMCU_CR_DBG_TIM6_STOP
 ((
ušt32_t
)0x00080000è

	)

7819 

	#DBGMCU_CR_DBG_TIM7_STOP
 ((
ušt32_t
)0x00100000è

	)

7820 

	#DBGMCU_CR_DBG_CAN2_STOP
 ((
ušt32_t
)0x00200000è

	)

7821 

	#DBGMCU_CR_DBG_TIM15_STOP
 ((
ušt32_t
)0x00400000è

	)

7822 

	#DBGMCU_CR_DBG_TIM16_STOP
 ((
ušt32_t
)0x00800000è

	)

7823 

	#DBGMCU_CR_DBG_TIM17_STOP
 ((
ušt32_t
)0x01000000è

	)

7824 

	#DBGMCU_CR_DBG_TIM12_STOP
 ((
ušt32_t
)0x02000000è

	)

7825 

	#DBGMCU_CR_DBG_TIM13_STOP
 ((
ušt32_t
)0x04000000è

	)

7826 

	#DBGMCU_CR_DBG_TIM14_STOP
 ((
ušt32_t
)0x08000000è

	)

7827 

	#DBGMCU_CR_DBG_TIM9_STOP
 ((
ušt32_t
)0x10000000è

	)

7828 

	#DBGMCU_CR_DBG_TIM10_STOP
 ((
ušt32_t
)0x20000000è

	)

7829 

	#DBGMCU_CR_DBG_TIM11_STOP
 ((
ušt32_t
)0x40000000è

	)

7838 

	#FLASH_ACR_LATENCY
 ((
ušt8_t
)0x03è

	)

7839 

	#FLASH_ACR_LATENCY_0
 ((
ušt8_t
)0x00è

	)

7840 

	#FLASH_ACR_LATENCY_1
 ((
ušt8_t
)0x01è

	)

7841 

	#FLASH_ACR_LATENCY_2
 ((
ušt8_t
)0x02è

	)

7843 

	#FLASH_ACR_HLFCYA
 ((
ušt8_t
)0x08è

	)

7844 

	#FLASH_ACR_PRFTBE
 ((
ušt8_t
)0x10è

	)

7845 

	#FLASH_ACR_PRFTBS
 ((
ušt8_t
)0x20è

	)

7848 

	#FLASH_KEYR_FKEYR
 ((
ušt32_t
)0xFFFFFFFFè

	)

7851 

	#RDP_Key
 ((
ušt16_t
)0x00A5)

	)

7852 

	#FLASH_KEY1
 ((
ušt32_t
)0x45670123)

	)

7853 

	#FLASH_KEY2
 ((
ušt32_t
)0xCDEF89AB)

	)

7856 

	#FLASH_OPTKEYR_OPTKEYR
 ((
ušt32_t
)0xFFFFFFFFè

	)

7859 

	#FLASH_SR_BSY
 ((
ušt8_t
)0x01è

	)

7860 

	#FLASH_SR_PGERR
 ((
ušt8_t
)0x04è

	)

7861 

	#FLASH_SR_WRPRTERR
 ((
ušt8_t
)0x10è

	)

7862 

	#FLASH_SR_EOP
 ((
ušt8_t
)0x20è

	)

7865 

	#FLASH_CR_PG
 ((
ušt16_t
)0x0001è

	)

7866 

	#FLASH_CR_PER
 ((
ušt16_t
)0x0002è

	)

7867 

	#FLASH_CR_MER
 ((
ušt16_t
)0x0004è

	)

7868 

	#FLASH_CR_OPTPG
 ((
ušt16_t
)0x0010è

	)

7869 

	#FLASH_CR_OPTER
 ((
ušt16_t
)0x0020è

	)

7870 

	#FLASH_CR_STRT
 ((
ušt16_t
)0x0040è

	)

7871 

	#FLASH_CR_LOCK
 ((
ušt16_t
)0x0080è

	)

7872 

	#FLASH_CR_OPTWRE
 ((
ušt16_t
)0x0200è

	)

7873 

	#FLASH_CR_ERRIE
 ((
ušt16_t
)0x0400è

	)

7874 

	#FLASH_CR_EOPIE
 ((
ušt16_t
)0x1000è

	)

7877 

	#FLASH_AR_FAR
 ((
ušt32_t
)0xFFFFFFFFè

	)

7880 

	#FLASH_OBR_OPTERR
 ((
ušt16_t
)0x0001è

	)

7881 

	#FLASH_OBR_RDPRT
 ((
ušt16_t
)0x0002è

	)

7883 

	#FLASH_OBR_USER
 ((
ušt16_t
)0x03FCè

	)

7884 

	#FLASH_OBR_WDG_SW
 ((
ušt16_t
)0x0004è

	)

7885 

	#FLASH_OBR_nRST_STOP
 ((
ušt16_t
)0x0008è

	)

7886 

	#FLASH_OBR_nRST_STDBY
 ((
ušt16_t
)0x0010è

	)

7887 

	#FLASH_OBR_BFB2
 ((
ušt16_t
)0x0020è

	)

7890 

	#FLASH_WRPR_WRP
 ((
ušt32_t
)0xFFFFFFFFè

	)

7895 

	#FLASH_RDP_RDP
 ((
ušt32_t
)0x000000FFè

	)

7896 

	#FLASH_RDP_nRDP
 ((
ušt32_t
)0x0000FF00è

	)

7899 

	#FLASH_USER_USER
 ((
ušt32_t
)0x00FF0000è

	)

7900 

	#FLASH_USER_nUSER
 ((
ušt32_t
)0xFF000000è

	)

7903 

	#FLASH_D©a0_D©a0
 ((
ušt32_t
)0x000000FFè

	)

7904 

	#FLASH_D©a0_nD©a0
 ((
ušt32_t
)0x0000FF00è

	)

7907 

	#FLASH_D©a1_D©a1
 ((
ušt32_t
)0x00FF0000è

	)

7908 

	#FLASH_D©a1_nD©a1
 ((
ušt32_t
)0xFF000000è

	)

7911 

	#FLASH_WRP0_WRP0
 ((
ušt32_t
)0x000000FFè

	)

7912 

	#FLASH_WRP0_nWRP0
 ((
ušt32_t
)0x0000FF00è

	)

7915 

	#FLASH_WRP1_WRP1
 ((
ušt32_t
)0x00FF0000è

	)

7916 

	#FLASH_WRP1_nWRP1
 ((
ušt32_t
)0xFF000000è

	)

7919 

	#FLASH_WRP2_WRP2
 ((
ušt32_t
)0x000000FFè

	)

7920 

	#FLASH_WRP2_nWRP2
 ((
ušt32_t
)0x0000FF00è

	)

7923 

	#FLASH_WRP3_WRP3
 ((
ušt32_t
)0x00FF0000è

	)

7924 

	#FLASH_WRP3_nWRP3
 ((
ušt32_t
)0xFF000000è

	)

7926 #ifdeà
STM32F10X_CL


7931 

	#ETH_MACCR_WD
 ((
ušt32_t
)0x00800000è

	)

7932 

	#ETH_MACCR_JD
 ((
ušt32_t
)0x00400000è

	)

7933 

	#ETH_MACCR_IFG
 ((
ušt32_t
)0x000E0000è

	)

7934 

	#ETH_MACCR_IFG_96B™
 ((
ušt32_t
)0x00000000è

	)

7935 

	#ETH_MACCR_IFG_88B™
 ((
ušt32_t
)0x00020000è

	)

7936 

	#ETH_MACCR_IFG_80B™
 ((
ušt32_t
)0x00040000è

	)

7937 

	#ETH_MACCR_IFG_72B™
 ((
ušt32_t
)0x00060000è

	)

7938 

	#ETH_MACCR_IFG_64B™
 ((
ušt32_t
)0x00080000è

	)

7939 

	#ETH_MACCR_IFG_56B™
 ((
ušt32_t
)0x000A0000è

	)

7940 

	#ETH_MACCR_IFG_48B™
 ((
ušt32_t
)0x000C0000è

	)

7941 

	#ETH_MACCR_IFG_40B™
 ((
ušt32_t
)0x000E0000è

	)

7942 

	#ETH_MACCR_CSD
 ((
ušt32_t
)0x00010000è

	)

7943 

	#ETH_MACCR_FES
 ((
ušt32_t
)0x00004000è

	)

7944 

	#ETH_MACCR_ROD
 ((
ušt32_t
)0x00002000è

	)

7945 

	#ETH_MACCR_LM
 ((
ušt32_t
)0x00001000è

	)

7946 

	#ETH_MACCR_DM
 ((
ušt32_t
)0x00000800è

	)

7947 

	#ETH_MACCR_IPCO
 ((
ušt32_t
)0x00000400è

	)

7948 

	#ETH_MACCR_RD
 ((
ušt32_t
)0x00000200è

	)

7949 

	#ETH_MACCR_APCS
 ((
ušt32_t
)0x00000080è

	)

7950 

	#ETH_MACCR_BL
 ((
ušt32_t
)0x00000060è

	)

7952 

	#ETH_MACCR_BL_10
 ((
ušt32_t
)0x00000000è

	)

7953 

	#ETH_MACCR_BL_8
 ((
ušt32_t
)0x00000020è

	)

7954 

	#ETH_MACCR_BL_4
 ((
ušt32_t
)0x00000040è

	)

7955 

	#ETH_MACCR_BL_1
 ((
ušt32_t
)0x00000060è

	)

7956 

	#ETH_MACCR_DC
 ((
ušt32_t
)0x00000010è

	)

7957 

	#ETH_MACCR_TE
 ((
ušt32_t
)0x00000008è

	)

7958 

	#ETH_MACCR_RE
 ((
ušt32_t
)0x00000004è

	)

7961 

	#ETH_MACFFR_RA
 ((
ušt32_t
)0x80000000è

	)

7962 

	#ETH_MACFFR_HPF
 ((
ušt32_t
)0x00000400è

	)

7963 

	#ETH_MACFFR_SAF
 ((
ušt32_t
)0x00000200è

	)

7964 

	#ETH_MACFFR_SAIF
 ((
ušt32_t
)0x00000100è

	)

7965 

	#ETH_MACFFR_PCF
 ((
ušt32_t
)0x000000C0è

	)

7966 

	#ETH_MACFFR_PCF_BlockAÎ
 ((
ušt32_t
)0x00000040è

	)

7967 

	#ETH_MACFFR_PCF_FÜw¬dAÎ
 ((
ušt32_t
)0x00000080è

	)

7968 

	#ETH_MACFFR_PCF_FÜw¬dPas£dAddrFž‹r
 ((
ušt32_t
)0x000000C0è

	)

7969 

	#ETH_MACFFR_BFD
 ((
ušt32_t
)0x00000020è

	)

7970 

	#ETH_MACFFR_PAM
 ((
ušt32_t
)0x00000010è

	)

7971 

	#ETH_MACFFR_DAIF
 ((
ušt32_t
)0x00000008è

	)

7972 

	#ETH_MACFFR_HM
 ((
ušt32_t
)0x00000004è

	)

7973 

	#ETH_MACFFR_HU
 ((
ušt32_t
)0x00000002è

	)

7974 

	#ETH_MACFFR_PM
 ((
ušt32_t
)0x00000001è

	)

7977 

	#ETH_MACHTHR_HTH
 ((
ušt32_t
)0xFFFFFFFFè

	)

7980 

	#ETH_MACHTLR_HTL
 ((
ušt32_t
)0xFFFFFFFFè

	)

7983 

	#ETH_MACMIIAR_PA
 ((
ušt32_t
)0x0000F800è

	)

7984 

	#ETH_MACMIIAR_MR
 ((
ušt32_t
)0x000007C0è

	)

7985 

	#ETH_MACMIIAR_CR
 ((
ušt32_t
)0x0000001Cè

	)

7986 

	#ETH_MACMIIAR_CR_Div42
 ((
ušt32_t
)0x00000000è

	)

7987 

	#ETH_MACMIIAR_CR_Div16
 ((
ušt32_t
)0x00000008è

	)

7988 

	#ETH_MACMIIAR_CR_Div26
 ((
ušt32_t
)0x0000000Cè

	)

7989 

	#ETH_MACMIIAR_MW
 ((
ušt32_t
)0x00000002è

	)

7990 

	#ETH_MACMIIAR_MB
 ((
ušt32_t
)0x00000001è

	)

7993 

	#ETH_MACMIIDR_MD
 ((
ušt32_t
)0x0000FFFFè

	)

7996 

	#ETH_MACFCR_PT
 ((
ušt32_t
)0xFFFF0000è

	)

7997 

	#ETH_MACFCR_ZQPD
 ((
ušt32_t
)0x00000080è

	)

7998 

	#ETH_MACFCR_PLT
 ((
ušt32_t
)0x00000030è

	)

7999 

	#ETH_MACFCR_PLT_Mšus4
 ((
ušt32_t
)0x00000000è

	)

8000 

	#ETH_MACFCR_PLT_Mšus28
 ((
ušt32_t
)0x00000010è

	)

8001 

	#ETH_MACFCR_PLT_Mšus144
 ((
ušt32_t
)0x00000020è

	)

8002 

	#ETH_MACFCR_PLT_Mšus256
 ((
ušt32_t
)0x00000030è

	)

8003 

	#ETH_MACFCR_UPFD
 ((
ušt32_t
)0x00000008è

	)

8004 

	#ETH_MACFCR_RFCE
 ((
ušt32_t
)0x00000004è

	)

8005 

	#ETH_MACFCR_TFCE
 ((
ušt32_t
)0x00000002è

	)

8006 

	#ETH_MACFCR_FCBBPA
 ((
ušt32_t
)0x00000001è

	)

8009 

	#ETH_MACVLANTR_VLANTC
 ((
ušt32_t
)0x00010000è

	)

8010 

	#ETH_MACVLANTR_VLANTI
 ((
ušt32_t
)0x0000FFFFè

	)

8013 

	#ETH_MACRWUFFR_D
 ((
ušt32_t
)0xFFFFFFFFè

	)

8027 

	#ETH_MACPMTCSR_WFFRPR
 ((
ušt32_t
)0x80000000è

	)

8028 

	#ETH_MACPMTCSR_GU
 ((
ušt32_t
)0x00000200è

	)

8029 

	#ETH_MACPMTCSR_WFR
 ((
ušt32_t
)0x00000040è

	)

8030 

	#ETH_MACPMTCSR_MPR
 ((
ušt32_t
)0x00000020è

	)

8031 

	#ETH_MACPMTCSR_WFE
 ((
ušt32_t
)0x00000004è

	)

8032 

	#ETH_MACPMTCSR_MPE
 ((
ušt32_t
)0x00000002è

	)

8033 

	#ETH_MACPMTCSR_PD
 ((
ušt32_t
)0x00000001è

	)

8036 

	#ETH_MACSR_TSTS
 ((
ušt32_t
)0x00000200è

	)

8037 

	#ETH_MACSR_MMCTS
 ((
ušt32_t
)0x00000040è

	)

8038 

	#ETH_MACSR_MMMCRS
 ((
ušt32_t
)0x00000020è

	)

8039 

	#ETH_MACSR_MMCS
 ((
ušt32_t
)0x00000010è

	)

8040 

	#ETH_MACSR_PMTS
 ((
ušt32_t
)0x00000008è

	)

8043 

	#ETH_MACIMR_TSTIM
 ((
ušt32_t
)0x00000200è

	)

8044 

	#ETH_MACIMR_PMTIM
 ((
ušt32_t
)0x00000008è

	)

8047 

	#ETH_MACA0HR_MACA0H
 ((
ušt32_t
)0x0000FFFFè

	)

8050 

	#ETH_MACA0LR_MACA0L
 ((
ušt32_t
)0xFFFFFFFFè

	)

8053 

	#ETH_MACA1HR_AE
 ((
ušt32_t
)0x80000000è

	)

8054 

	#ETH_MACA1HR_SA
 ((
ušt32_t
)0x40000000è

	)

8055 

	#ETH_MACA1HR_MBC
 ((
ušt32_t
)0x3F000000è

	)

8056 

	#ETH_MACA1HR_MBC_HB™s15_8
 ((
ušt32_t
)0x20000000è

	)

8057 

	#ETH_MACA1HR_MBC_HB™s7_0
 ((
ušt32_t
)0x10000000è

	)

8058 

	#ETH_MACA1HR_MBC_LB™s31_24
 ((
ušt32_t
)0x08000000è

	)

8059 

	#ETH_MACA1HR_MBC_LB™s23_16
 ((
ušt32_t
)0x04000000è

	)

8060 

	#ETH_MACA1HR_MBC_LB™s15_8
 ((
ušt32_t
)0x02000000è

	)

8061 

	#ETH_MACA1HR_MBC_LB™s7_0
 ((
ušt32_t
)0x01000000è

	)

8062 

	#ETH_MACA1HR_MACA1H
 ((
ušt32_t
)0x0000FFFFè

	)

8065 

	#ETH_MACA1LR_MACA1L
 ((
ušt32_t
)0xFFFFFFFFè

	)

8068 

	#ETH_MACA2HR_AE
 ((
ušt32_t
)0x80000000è

	)

8069 

	#ETH_MACA2HR_SA
 ((
ušt32_t
)0x40000000è

	)

8070 

	#ETH_MACA2HR_MBC
 ((
ušt32_t
)0x3F000000è

	)

8071 

	#ETH_MACA2HR_MBC_HB™s15_8
 ((
ušt32_t
)0x20000000è

	)

8072 

	#ETH_MACA2HR_MBC_HB™s7_0
 ((
ušt32_t
)0x10000000è

	)

8073 

	#ETH_MACA2HR_MBC_LB™s31_24
 ((
ušt32_t
)0x08000000è

	)

8074 

	#ETH_MACA2HR_MBC_LB™s23_16
 ((
ušt32_t
)0x04000000è

	)

8075 

	#ETH_MACA2HR_MBC_LB™s15_8
 ((
ušt32_t
)0x02000000è

	)

8076 

	#ETH_MACA2HR_MBC_LB™s7_0
 ((
ušt32_t
)0x01000000è

	)

8077 

	#ETH_MACA2HR_MACA2H
 ((
ušt32_t
)0x0000FFFFè

	)

8080 

	#ETH_MACA2LR_MACA2L
 ((
ušt32_t
)0xFFFFFFFFè

	)

8083 

	#ETH_MACA3HR_AE
 ((
ušt32_t
)0x80000000è

	)

8084 

	#ETH_MACA3HR_SA
 ((
ušt32_t
)0x40000000è

	)

8085 

	#ETH_MACA3HR_MBC
 ((
ušt32_t
)0x3F000000è

	)

8086 

	#ETH_MACA3HR_MBC_HB™s15_8
 ((
ušt32_t
)0x20000000è

	)

8087 

	#ETH_MACA3HR_MBC_HB™s7_0
 ((
ušt32_t
)0x10000000è

	)

8088 

	#ETH_MACA3HR_MBC_LB™s31_24
 ((
ušt32_t
)0x08000000è

	)

8089 

	#ETH_MACA3HR_MBC_LB™s23_16
 ((
ušt32_t
)0x04000000è

	)

8090 

	#ETH_MACA3HR_MBC_LB™s15_8
 ((
ušt32_t
)0x02000000è

	)

8091 

	#ETH_MACA3HR_MBC_LB™s7_0
 ((
ušt32_t
)0x01000000è

	)

8092 

	#ETH_MACA3HR_MACA3H
 ((
ušt32_t
)0x0000FFFFè

	)

8095 

	#ETH_MACA3LR_MACA3L
 ((
ušt32_t
)0xFFFFFFFFè

	)

8102 

	#ETH_MMCCR_MCF
 ((
ušt32_t
)0x00000008è

	)

8103 

	#ETH_MMCCR_ROR
 ((
ušt32_t
)0x00000004è

	)

8104 

	#ETH_MMCCR_CSR
 ((
ušt32_t
)0x00000002è

	)

8105 

	#ETH_MMCCR_CR
 ((
ušt32_t
)0x00000001è

	)

8108 

	#ETH_MMCRIR_RGUFS
 ((
ušt32_t
)0x00020000è

	)

8109 

	#ETH_MMCRIR_RFAES
 ((
ušt32_t
)0x00000040è

	)

8110 

	#ETH_MMCRIR_RFCES
 ((
ušt32_t
)0x00000020è

	)

8113 

	#ETH_MMCTIR_TGFS
 ((
ušt32_t
)0x00200000è

	)

8114 

	#ETH_MMCTIR_TGFMSCS
 ((
ušt32_t
)0x00008000è

	)

8115 

	#ETH_MMCTIR_TGFSCS
 ((
ušt32_t
)0x00004000è

	)

8118 

	#ETH_MMCRIMR_RGUFM
 ((
ušt32_t
)0x00020000è

	)

8119 

	#ETH_MMCRIMR_RFAEM
 ((
ušt32_t
)0x00000040è

	)

8120 

	#ETH_MMCRIMR_RFCEM
 ((
ušt32_t
)0x00000020è

	)

8123 

	#ETH_MMCTIMR_TGFM
 ((
ušt32_t
)0x00200000è

	)

8124 

	#ETH_MMCTIMR_TGFMSCM
 ((
ušt32_t
)0x00008000è

	)

8125 

	#ETH_MMCTIMR_TGFSCM
 ((
ušt32_t
)0x00004000è

	)

8128 

	#ETH_MMCTGFSCCR_TGFSCC
 ((
ušt32_t
)0xFFFFFFFFè

	)

8131 

	#ETH_MMCTGFMSCCR_TGFMSCC
 ((
ušt32_t
)0xFFFFFFFFè

	)

8134 

	#ETH_MMCTGFCR_TGFC
 ((
ušt32_t
)0xFFFFFFFFè

	)

8137 

	#ETH_MMCRFCECR_RFCEC
 ((
ušt32_t
)0xFFFFFFFFè

	)

8140 

	#ETH_MMCRFAECR_RFAEC
 ((
ušt32_t
)0xFFFFFFFFè

	)

8143 

	#ETH_MMCRGUFCR_RGUFC
 ((
ušt32_t
)0xFFFFFFFFè

	)

8150 

	#ETH_PTPTSCR_TSARU
 ((
ušt32_t
)0x00000020è

	)

8151 

	#ETH_PTPTSCR_TSITE
 ((
ušt32_t
)0x00000010è

	)

8152 

	#ETH_PTPTSCR_TSSTU
 ((
ušt32_t
)0x00000008è

	)

8153 

	#ETH_PTPTSCR_TSSTI
 ((
ušt32_t
)0x00000004è

	)

8154 

	#ETH_PTPTSCR_TSFCU
 ((
ušt32_t
)0x00000002è

	)

8155 

	#ETH_PTPTSCR_TSE
 ((
ušt32_t
)0x00000001è

	)

8158 

	#ETH_PTPSSIR_STSSI
 ((
ušt32_t
)0x000000FFè

	)

8161 

	#ETH_PTPTSHR_STS
 ((
ušt32_t
)0xFFFFFFFFè

	)

8164 

	#ETH_PTPTSLR_STPNS
 ((
ušt32_t
)0x80000000è

	)

8165 

	#ETH_PTPTSLR_STSS
 ((
ušt32_t
)0x7FFFFFFFè

	)

8168 

	#ETH_PTPTSHUR_TSUS
 ((
ušt32_t
)0xFFFFFFFFè

	)

8171 

	#ETH_PTPTSLUR_TSUPNS
 ((
ušt32_t
)0x80000000è

	)

8172 

	#ETH_PTPTSLUR_TSUSS
 ((
ušt32_t
)0x7FFFFFFFè

	)

8175 

	#ETH_PTPTSAR_TSA
 ((
ušt32_t
)0xFFFFFFFFè

	)

8178 

	#ETH_PTPTTHR_TTSH
 ((
ušt32_t
)0xFFFFFFFFè

	)

8181 

	#ETH_PTPTTLR_TTSL
 ((
ušt32_t
)0xFFFFFFFFè

	)

8188 

	#ETH_DMABMR_AAB
 ((
ušt32_t
)0x02000000è

	)

8189 

	#ETH_DMABMR_FPM
 ((
ušt32_t
)0x01000000è

	)

8190 

	#ETH_DMABMR_USP
 ((
ušt32_t
)0x00800000è

	)

8191 

	#ETH_DMABMR_RDP
 ((
ušt32_t
)0x007E0000è

	)

8192 

	#ETH_DMABMR_RDP_1B—t
 ((
ušt32_t
)0x00020000è

	)

8193 

	#ETH_DMABMR_RDP_2B—t
 ((
ušt32_t
)0x00040000è

	)

8194 

	#ETH_DMABMR_RDP_4B—t
 ((
ušt32_t
)0x00080000è

	)

8195 

	#ETH_DMABMR_RDP_8B—t
 ((
ušt32_t
)0x00100000è

	)

8196 

	#ETH_DMABMR_RDP_16B—t
 ((
ušt32_t
)0x00200000è

	)

8197 

	#ETH_DMABMR_RDP_32B—t
 ((
ušt32_t
)0x00400000è

	)

8198 

	#ETH_DMABMR_RDP_4xPBL_4B—t
 ((
ušt32_t
)0x01020000è

	)

8199 

	#ETH_DMABMR_RDP_4xPBL_8B—t
 ((
ušt32_t
)0x01040000è

	)

8200 

	#ETH_DMABMR_RDP_4xPBL_16B—t
 ((
ušt32_t
)0x01080000è

	)

8201 

	#ETH_DMABMR_RDP_4xPBL_32B—t
 ((
ušt32_t
)0x01100000è

	)

8202 

	#ETH_DMABMR_RDP_4xPBL_64B—t
 ((
ušt32_t
)0x01200000è

	)

8203 

	#ETH_DMABMR_RDP_4xPBL_128B—t
 ((
ušt32_t
)0x01400000è

	)

8204 

	#ETH_DMABMR_FB
 ((
ušt32_t
)0x00010000è

	)

8205 

	#ETH_DMABMR_RTPR
 ((
ušt32_t
)0x0000C000è

	)

8206 

	#ETH_DMABMR_RTPR_1_1
 ((
ušt32_t
)0x00000000è

	)

8207 

	#ETH_DMABMR_RTPR_2_1
 ((
ušt32_t
)0x00004000è

	)

8208 

	#ETH_DMABMR_RTPR_3_1
 ((
ušt32_t
)0x00008000è

	)

8209 

	#ETH_DMABMR_RTPR_4_1
 ((
ušt32_t
)0x0000C000è

	)

8210 

	#ETH_DMABMR_PBL
 ((
ušt32_t
)0x00003F00è

	)

8211 

	#ETH_DMABMR_PBL_1B—t
 ((
ušt32_t
)0x00000100è

	)

8212 

	#ETH_DMABMR_PBL_2B—t
 ((
ušt32_t
)0x00000200è

	)

8213 

	#ETH_DMABMR_PBL_4B—t
 ((
ušt32_t
)0x00000400è

	)

8214 

	#ETH_DMABMR_PBL_8B—t
 ((
ušt32_t
)0x00000800è

	)

8215 

	#ETH_DMABMR_PBL_16B—t
 ((
ušt32_t
)0x00001000è

	)

8216 

	#ETH_DMABMR_PBL_32B—t
 ((
ušt32_t
)0x00002000è

	)

8217 

	#ETH_DMABMR_PBL_4xPBL_4B—t
 ((
ušt32_t
)0x01000100è

	)

8218 

	#ETH_DMABMR_PBL_4xPBL_8B—t
 ((
ušt32_t
)0x01000200è

	)

8219 

	#ETH_DMABMR_PBL_4xPBL_16B—t
 ((
ušt32_t
)0x01000400è

	)

8220 

	#ETH_DMABMR_PBL_4xPBL_32B—t
 ((
ušt32_t
)0x01000800è

	)

8221 

	#ETH_DMABMR_PBL_4xPBL_64B—t
 ((
ušt32_t
)0x01001000è

	)

8222 

	#ETH_DMABMR_PBL_4xPBL_128B—t
 ((
ušt32_t
)0x01002000è

	)

8223 

	#ETH_DMABMR_DSL
 ((
ušt32_t
)0x0000007Cè

	)

8224 

	#ETH_DMABMR_DA
 ((
ušt32_t
)0x00000002è

	)

8225 

	#ETH_DMABMR_SR
 ((
ušt32_t
)0x00000001è

	)

8228 

	#ETH_DMATPDR_TPD
 ((
ušt32_t
)0xFFFFFFFFè

	)

8231 

	#ETH_DMARPDR_RPD
 ((
ušt32_t
)0xFFFFFFFFè

	)

8234 

	#ETH_DMARDLAR_SRL
 ((
ušt32_t
)0xFFFFFFFFè

	)

8237 

	#ETH_DMATDLAR_STL
 ((
ušt32_t
)0xFFFFFFFFè

	)

8240 

	#ETH_DMASR_TSTS
 ((
ušt32_t
)0x20000000è

	)

8241 

	#ETH_DMASR_PMTS
 ((
ušt32_t
)0x10000000è

	)

8242 

	#ETH_DMASR_MMCS
 ((
ušt32_t
)0x08000000è

	)

8243 

	#ETH_DMASR_EBS
 ((
ušt32_t
)0x03800000è

	)

8245 

	#ETH_DMASR_EBS_DescAcûss
 ((
ušt32_t
)0x02000000è

	)

8246 

	#ETH_DMASR_EBS_R—dT¿nsf
 ((
ušt32_t
)0x01000000è

	)

8247 

	#ETH_DMASR_EBS_D©aT¿nsfTx
 ((
ušt32_t
)0x00800000è

	)

8248 

	#ETH_DMASR_TPS
 ((
ušt32_t
)0x00700000è

	)

8249 

	#ETH_DMASR_TPS_Stݳd
 ((
ušt32_t
)0x00000000è

	)

8250 

	#ETH_DMASR_TPS_F‘chšg
 ((
ušt32_t
)0x00100000è

	)

8251 

	#ETH_DMASR_TPS_Wa™šg
 ((
ušt32_t
)0x00200000è

	)

8252 

	#ETH_DMASR_TPS_R—dšg
 ((
ušt32_t
)0x00300000è

	)

8253 

	#ETH_DMASR_TPS_Su¥’ded
 ((
ušt32_t
)0x00600000è

	)

8254 

	#ETH_DMASR_TPS_Closšg
 ((
ušt32_t
)0x00700000è

	)

8255 

	#ETH_DMASR_RPS
 ((
ušt32_t
)0x000E0000è

	)

8256 

	#ETH_DMASR_RPS_Stݳd
 ((
ušt32_t
)0x00000000è

	)

8257 

	#ETH_DMASR_RPS_F‘chšg
 ((
ušt32_t
)0x00020000è

	)

8258 

	#ETH_DMASR_RPS_Wa™šg
 ((
ušt32_t
)0x00060000è

	)

8259 

	#ETH_DMASR_RPS_Su¥’ded
 ((
ušt32_t
)0x00080000è

	)

8260 

	#ETH_DMASR_RPS_Closšg
 ((
ušt32_t
)0x000A0000è

	)

8261 

	#ETH_DMASR_RPS_Queušg
 ((
ušt32_t
)0x000E0000è

	)

8262 

	#ETH_DMASR_NIS
 ((
ušt32_t
)0x00010000è

	)

8263 

	#ETH_DMASR_AIS
 ((
ušt32_t
)0x00008000è

	)

8264 

	#ETH_DMASR_ERS
 ((
ušt32_t
)0x00004000è

	)

8265 

	#ETH_DMASR_FBES
 ((
ušt32_t
)0x00002000è

	)

8266 

	#ETH_DMASR_ETS
 ((
ušt32_t
)0x00000400è

	)

8267 

	#ETH_DMASR_RWTS
 ((
ušt32_t
)0x00000200è

	)

8268 

	#ETH_DMASR_RPSS
 ((
ušt32_t
)0x00000100è

	)

8269 

	#ETH_DMASR_RBUS
 ((
ušt32_t
)0x00000080è

	)

8270 

	#ETH_DMASR_RS
 ((
ušt32_t
)0x00000040è

	)

8271 

	#ETH_DMASR_TUS
 ((
ušt32_t
)0x00000020è

	)

8272 

	#ETH_DMASR_ROS
 ((
ušt32_t
)0x00000010è

	)

8273 

	#ETH_DMASR_TJTS
 ((
ušt32_t
)0x00000008è

	)

8274 

	#ETH_DMASR_TBUS
 ((
ušt32_t
)0x00000004è

	)

8275 

	#ETH_DMASR_TPSS
 ((
ušt32_t
)0x00000002è

	)

8276 

	#ETH_DMASR_TS
 ((
ušt32_t
)0x00000001è

	)

8279 

	#ETH_DMAOMR_DTCEFD
 ((
ušt32_t
)0x04000000è

	)

8280 

	#ETH_DMAOMR_RSF
 ((
ušt32_t
)0x02000000è

	)

8281 

	#ETH_DMAOMR_DFRF
 ((
ušt32_t
)0x01000000è

	)

8282 

	#ETH_DMAOMR_TSF
 ((
ušt32_t
)0x00200000è

	)

8283 

	#ETH_DMAOMR_FTF
 ((
ušt32_t
)0x00100000è

	)

8284 

	#ETH_DMAOMR_TTC
 ((
ušt32_t
)0x0001C000è

	)

8285 

	#ETH_DMAOMR_TTC_64By‹s
 ((
ušt32_t
)0x00000000è

	)

8286 

	#ETH_DMAOMR_TTC_128By‹s
 ((
ušt32_t
)0x00004000è

	)

8287 

	#ETH_DMAOMR_TTC_192By‹s
 ((
ušt32_t
)0x00008000è

	)

8288 

	#ETH_DMAOMR_TTC_256By‹s
 ((
ušt32_t
)0x0000C000è

	)

8289 

	#ETH_DMAOMR_TTC_40By‹s
 ((
ušt32_t
)0x00010000è

	)

8290 

	#ETH_DMAOMR_TTC_32By‹s
 ((
ušt32_t
)0x00014000è

	)

8291 

	#ETH_DMAOMR_TTC_24By‹s
 ((
ušt32_t
)0x00018000è

	)

8292 

	#ETH_DMAOMR_TTC_16By‹s
 ((
ušt32_t
)0x0001C000è

	)

8293 

	#ETH_DMAOMR_ST
 ((
ušt32_t
)0x00002000è

	)

8294 

	#ETH_DMAOMR_FEF
 ((
ušt32_t
)0x00000080è

	)

8295 

	#ETH_DMAOMR_FUGF
 ((
ušt32_t
)0x00000040è

	)

8296 

	#ETH_DMAOMR_RTC
 ((
ušt32_t
)0x00000018è

	)

8297 

	#ETH_DMAOMR_RTC_64By‹s
 ((
ušt32_t
)0x00000000è

	)

8298 

	#ETH_DMAOMR_RTC_32By‹s
 ((
ušt32_t
)0x00000008è

	)

8299 

	#ETH_DMAOMR_RTC_96By‹s
 ((
ušt32_t
)0x00000010è

	)

8300 

	#ETH_DMAOMR_RTC_128By‹s
 ((
ušt32_t
)0x00000018è

	)

8301 

	#ETH_DMAOMR_OSF
 ((
ušt32_t
)0x00000004è

	)

8302 

	#ETH_DMAOMR_SR
 ((
ušt32_t
)0x00000002è

	)

8305 

	#ETH_DMAIER_NISE
 ((
ušt32_t
)0x00010000è

	)

8306 

	#ETH_DMAIER_AISE
 ((
ušt32_t
)0x00008000è

	)

8307 

	#ETH_DMAIER_ERIE
 ((
ušt32_t
)0x00004000è

	)

8308 

	#ETH_DMAIER_FBEIE
 ((
ušt32_t
)0x00002000è

	)

8309 

	#ETH_DMAIER_ETIE
 ((
ušt32_t
)0x00000400è

	)

8310 

	#ETH_DMAIER_RWTIE
 ((
ušt32_t
)0x00000200è

	)

8311 

	#ETH_DMAIER_RPSIE
 ((
ušt32_t
)0x00000100è

	)

8312 

	#ETH_DMAIER_RBUIE
 ((
ušt32_t
)0x00000080è

	)

8313 

	#ETH_DMAIER_RIE
 ((
ušt32_t
)0x00000040è

	)

8314 

	#ETH_DMAIER_TUIE
 ((
ušt32_t
)0x00000020è

	)

8315 

	#ETH_DMAIER_ROIE
 ((
ušt32_t
)0x00000010è

	)

8316 

	#ETH_DMAIER_TJTIE
 ((
ušt32_t
)0x00000008è

	)

8317 

	#ETH_DMAIER_TBUIE
 ((
ušt32_t
)0x00000004è

	)

8318 

	#ETH_DMAIER_TPSIE
 ((
ušt32_t
)0x00000002è

	)

8319 

	#ETH_DMAIER_TIE
 ((
ušt32_t
)0x00000001è

	)

8322 

	#ETH_DMAMFBOCR_OFOC
 ((
ušt32_t
)0x10000000è

	)

8323 

	#ETH_DMAMFBOCR_MFA
 ((
ušt32_t
)0x0FFE0000è

	)

8324 

	#ETH_DMAMFBOCR_OMFC
 ((
ušt32_t
)0x00010000è

	)

8325 

	#ETH_DMAMFBOCR_MFC
 ((
ušt32_t
)0x0000FFFFè

	)

8328 

	#ETH_DMACHTDR_HTDAP
 ((
ušt32_t
)0xFFFFFFFFè

	)

8331 

	#ETH_DMACHRDR_HRDAP
 ((
ušt32_t
)0xFFFFFFFFè

	)

8334 

	#ETH_DMACHTBAR_HTBAP
 ((
ušt32_t
)0xFFFFFFFFè

	)

8337 

	#ETH_DMACHRBAR_HRBAP
 ((
ušt32_t
)0xFFFFFFFFè

	)

8348 #ifdeà
USE_STDPERIPH_DRIVER


8349 
	~"¡m32f10x_cÚf.h
"

8356 

	#SET_BIT
(
REG
, 
BIT
è((REGè|ð(BIT))

	)

8358 

	#CLEAR_BIT
(
REG
, 
BIT
è((REGè&ð~(BIT))

	)

8360 

	#READ_BIT
(
REG
, 
BIT
è((REGè& (BIT))

	)

8362 

	#CLEAR_REG
(
REG
è((REGèð(0x0))

	)

8364 

	#WRITE_REG
(
REG
, 
VAL
è((REGèð(VAL))

	)

8366 

	#READ_REG
(
REG
è((REG))

	)

8368 

	#MODIFY_REG
(
REG
, 
CLEARMASK
, 
SETMASK
è
	`WRITE_REG
((REG), (((
	`READ_REG
(REG)è& (~(CLEARMASK))è| (SETMASK)))

	)

8374 #ifdeà
__ýlu¥lus


	@C:\Users\Victor\EMBITZ~1\STM32W~1\inc\SYSTEM~1.H

33 #iâdeà
__SYSTEM_STM32F10X_H


34 

	#__SYSTEM_STM32F10X_H


	)

36 #ifdeà
__ýlu¥lus


53 
ušt32_t
 
Sy¡emCÜeClock
;

79 

Sy¡emIn™
();

80 

Sy¡emCÜeClockUpd©e
();

85 #ifdeà
__ýlu¥lus


	@C:\Users\Victor\EMBITZ~1\STM32W~1\readme.txt

1 
You
 
have
 
to
 
£t
 
the
 
cÜ»ù
 
memÜy
 
Ïyout
 
your
 
deviû
 
š
h
lšk”
 
	gsüt
.

2 
PËa£
 
check
 
the
 
FLASH
 
ªd
 
SRAM
 
	gËngth
.

4 
	ge
.
	gg
.

7 
	gMEMORY


9 
FLASH
 (
rx
è: 
ORIGIN
 = 0x08000000, 
	gLENGTH
 = 0x08000

10 
RAM
 (
rwx
è: 
ORIGIN
 = 0x20000000, 
	gLENGTH
 = 0x01000

	@C:\Users\Victor\EMBITZ~1\STM32W~1\src\STARTU~1.S

32 .
syÁax
 
	gunif›d


33 .
¬ch
 
	g¬mv7
-
	gm


35 .
	g£ùiÚ
 .
	g¡ack


36 .
	g®ign
 3

37 #ifdeà
__STACK_SIZE


38 .
equ
 
	gSck_Size
, 
	g__STACK_SIZE


40 .
equ
 
	gSck_Size
, 0x400

42 .
globl
 
	g__SckTÝ


43 .
globl
 
__SckLim™


44 
	g__SckLim™
:

45 .
¥aû
 
Sck_Size


46 .
size
 
__SckLim™
, . - __StackLimit

47 
	g__SckTÝ
:

48 .
size
 
__SckTÝ
, . - 
	g__SckTÝ


50 .
	g£ùiÚ
 .
	gh—p


51 .
	g®ign
 3

52 #ifdeà
__HEAP_SIZE


53 .
equ
 
	gH—p_Size
, 
	g__HEAP_SIZE


55 .
equ
 
	gH—p_Size
, 0xC00

57 .
globl
 
	g__H—pBa£


58 .
globl
 
__H—pLim™


59 
	g__H—pBa£
:

60 .
H—p_Size


61 .
¥aû
 
H—p_Size


62 .
’dif


63 .
size
 
__H—pBa£
, . - __HeapBase

64 
	g__H—pLim™
:

65 .
size
 
__H—pLim™
, . - 
	g__H—pLim™


67 .
	g£ùiÚ
 .
	gi¤_veùÜ


68 .
	g®ign
 2

69 .
globl
 
__i¤_veùÜ


70 
	g__i¤_veùÜ
:

71 .
__SckTÝ


72 .
Re£t_HªdËr


73 .
NMI_HªdËr


74 .
H¬dFauÉ_HªdËr


75 .
MemMªage_HªdËr


76 .
BusFauÉ_HªdËr


77 .
U§geFauÉ_HªdËr


82 .
SVC_HªdËr


83 .
DebugMÚ_HªdËr


85 .
P’dSV_HªdËr


86 .
SysTick_HªdËr


89 .
WWDG_IRQHªdËr


90 .
PVD_IRQHªdËr


91 .
TAMPER_IRQHªdËr


92 .
RTC_IRQHªdËr


93 .
FLASH_IRQHªdËr


94 .
RCC_IRQHªdËr


95 .
EXTI0_IRQHªdËr


96 .
EXTI1_IRQHªdËr


97 .
EXTI2_IRQHªdËr


98 .
EXTI3_IRQHªdËr


99 .
EXTI4_IRQHªdËr


100 .
DMA1_ChªÃl1_IRQHªdËr


101 .
DMA1_ChªÃl2_IRQHªdËr


102 .
DMA1_ChªÃl3_IRQHªdËr


103 .
DMA1_ChªÃl4_IRQHªdËr


104 .
DMA1_ChªÃl5_IRQHªdËr


105 .
DMA1_ChªÃl6_IRQHªdËr


106 .
DMA1_ChªÃl7_IRQHªdËr


107 .
ADC1_2_IRQHªdËr


108 .
USB_HP_CAN1_TX_IRQHªdËr


109 .
USB_LP_CAN1_RX0_IRQHªdËr


110 .
CAN1_RX1_IRQHªdËr


111 .
CAN1_SCE_IRQHªdËr


112 .
EXTI9_5_IRQHªdËr


113 .
TIM1_BRK_IRQHªdËr


114 .
TIM1_UP_IRQHªdËr


115 .
TIM1_TRG_COM_IRQHªdËr


116 .
TIM1_CC_IRQHªdËr


117 .
TIM2_IRQHªdËr


118 .
TIM3_IRQHªdËr


119 .
TIM4_IRQHªdËr


120 .
I2C1_EV_IRQHªdËr


121 .
I2C1_ER_IRQHªdËr


122 .
I2C2_EV_IRQHªdËr


123 .
I2C2_ER_IRQHªdËr


124 .
SPI1_IRQHªdËr


125 .
SPI2_IRQHªdËr


126 .
USART1_IRQHªdËr


127 .
USART2_IRQHªdËr


128 .
USART3_IRQHªdËr


129 .
EXTI15_10_IRQHªdËr


130 .
RTCAÏrm_IRQHªdËr


131 .
USBWakeUp_IRQHªdËr


133 .
size
 
__i¤_veùÜ
, . - 
	g__i¤_veùÜ


135 .
	g‹xt


136 .
	gthumb


137 .
	gthumb_func


138 .
	g®ign
 2

139 .
globl
 
	gRe£t_HªdËr


140 .
ty³
 
	gRe£t_HªdËr
, %
funùiÚ


141 
	gRe£t_HªdËr
:

149 
ldr
 
r1
, =
__‘ext


150 
ldr
 
r2
, =
__d©a_¡¬t__


151 
ldr
 
r3
, =
__d©a_’d__


157 .
æash_to_¿m_loÝ
:

158 
cmp
 
r2
, 
r3


159 
™‰
 
É


160 
ld¾t
 
	gr0
, [
r1
], #4

161 
¡¾t
 
	gr0
, [
r2
], #4

162 
	gbÉ
 .
	gæash_to_¿m_loÝ


164 
subs
 
	gr3
, 
r2


165 
	gbË
 .
	gæash_to_¿m_loÝ_’d


166 .
	gæash_to_¿m_loÝ
:

167 
subs
 
r3
, #4

168 
ldr
 
	gr0
, [
r1
, 
r3
]

169 
¡r
 
	gr0
, [
r2
, 
r3
]

170 
	gbgt
 .
	gæash_to_¿m_loÝ


171 .
	gæash_to_¿m_loÝ_’d
:

174 #iâdeà
__NO_SYSTEM_INIT


175 
ldr
 
r0
, =
Sy¡emIn™


176 
blx
 
r0


179 
ldr
 
r0
, =
_¡¬t


180 
bx
 
r0


181 .
poÞ


182 .
size
 
Re£t_HªdËr
, . - 
	gRe£t_HªdËr


187 .
	g®ign
 1

188 .
	gthumb_func


189 .
w—k
 
	g_¡¬t


190 .
ty³
 
	g_¡¬t
, %
funùiÚ


191 
	g_¡¬t
:

194 
ldr
 
r1
, = 
__bss_¡¬t__


195 
ldr
 
r2
, = 
__bss_’d__


196 
movs
 
r3
, #0

197 
	gb
 .
	gfžl_z”o_bss


198 .
	gloÝ_z”o_bss
:

199 
¡r
 
r3
, [
r1
], #4

201 .
	gfžl_z”o_bss
:

202 
cmp
 
r1
, 
r2


203 
	gbcc
 .
loÝ_z”o_bss


206 
bl
 
maš


207 
	gb
 .

208 .
size
 
	g_¡¬t
, . - _start

213 .
maüo
 
def_œq_hªdËr
 
	ghªdËr_Çme


214 .
	g®ign
 1

215 .
	gthumb_func


216 .
	gw—k
 \
	ghªdËr_Çme


217 .
	gty³
 \
	ghªdËr_Çme
, %
	gfunùiÚ


218 \
	ghªdËr_Çme
 :

219 
b
 .

220 .
size
 \
hªdËr_Çme
, . - \
	ghªdËr_Çme


221 .
’dm


223 
def_œq_hªdËr
 
NMI_HªdËr


224 
def_œq_hªdËr
 
H¬dFauÉ_HªdËr


225 
def_œq_hªdËr
 
MemMªage_HªdËr


226 
def_œq_hªdËr
 
BusFauÉ_HªdËr


227 
def_œq_hªdËr
 
U§geFauÉ_HªdËr


228 
def_œq_hªdËr
 
SVC_HªdËr


229 
def_œq_hªdËr
 
DebugMÚ_HªdËr


230 
def_œq_hªdËr
 
P’dSV_HªdËr


231 
def_œq_hªdËr
 
SysTick_HªdËr


232 
def_œq_hªdËr
 
DeçuÉ_HªdËr


235 
def_œq_hªdËr
 
WWDG_IRQHªdËr


236 
def_œq_hªdËr
 
PVD_IRQHªdËr


237 
def_œq_hªdËr
 
TAMPER_IRQHªdËr


238 
def_œq_hªdËr
 
RTC_IRQHªdËr


239 
def_œq_hªdËr
 
FLASH_IRQHªdËr


240 
def_œq_hªdËr
 
RCC_IRQHªdËr


241 
def_œq_hªdËr
 
EXTI0_IRQHªdËr


242 
def_œq_hªdËr
 
EXTI1_IRQHªdËr


243 
def_œq_hªdËr
 
EXTI2_IRQHªdËr


244 
def_œq_hªdËr
 
EXTI3_IRQHªdËr


245 
def_œq_hªdËr
 
EXTI4_IRQHªdËr


246 
def_œq_hªdËr
 
DMA1_ChªÃl1_IRQHªdËr


247 
def_œq_hªdËr
 
DMA1_ChªÃl2_IRQHªdËr


248 
def_œq_hªdËr
 
DMA1_ChªÃl3_IRQHªdËr


249 
def_œq_hªdËr
 
DMA1_ChªÃl4_IRQHªdËr


250 
def_œq_hªdËr
 
DMA1_ChªÃl5_IRQHªdËr


251 
def_œq_hªdËr
 
DMA1_ChªÃl6_IRQHªdËr


252 
def_œq_hªdËr
 
DMA1_ChªÃl7_IRQHªdËr


253 
def_œq_hªdËr
 
ADC1_2_IRQHªdËr


254 
def_œq_hªdËr
 
USB_HP_CAN1_TX_IRQHªdËr


255 
def_œq_hªdËr
 
USB_LP_CAN1_RX0_IRQHªdËr


256 
def_œq_hªdËr
 
CAN1_RX1_IRQHªdËr


257 
def_œq_hªdËr
 
CAN1_SCE_IRQHªdËr


258 
def_œq_hªdËr
 
EXTI9_5_IRQHªdËr


259 
def_œq_hªdËr
 
TIM1_BRK_IRQHªdËr


260 
def_œq_hªdËr
 
TIM1_UP_IRQHªdËr


261 
def_œq_hªdËr
 
TIM1_TRG_COM_IRQHªdËr


262 
def_œq_hªdËr
 
TIM1_CC_IRQHªdËr


263 
def_œq_hªdËr
 
TIM2_IRQHªdËr


264 
def_œq_hªdËr
 
TIM3_IRQHªdËr


265 
def_œq_hªdËr
 
TIM4_IRQHªdËr


266 
def_œq_hªdËr
 
I2C1_EV_IRQHªdËr


267 
def_œq_hªdËr
 
I2C1_ER_IRQHªdËr


268 
def_œq_hªdËr
 
I2C2_EV_IRQHªdËr


269 
def_œq_hªdËr
 
I2C2_ER_IRQHªdËr


270 
def_œq_hªdËr
 
SPI1_IRQHªdËr


271 
def_œq_hªdËr
 
SPI2_IRQHªdËr


272 
def_œq_hªdËr
 
USART1_IRQHªdËr


273 
def_œq_hªdËr
 
USART2_IRQHªdËr


274 
def_œq_hªdËr
 
USART3_IRQHªdËr


275 
def_œq_hªdËr
 
EXTI15_10_IRQHªdËr


276 
def_œq_hªdËr
 
RTCAÏrm_IRQHªdËr


277 
def_œq_hªdËr
 
	gUSBWakeUp_IRQHªdËr


279 .
	g’d


	@C:\Users\Victor\EMBITZ~1\STM32W~1\src\SYSTEM~1.C

65 
	~"¡m32f10x.h
"

106 #ià
defšed
 (
STM32F10X_LD_VL
è|| (defšed 
STM32F10X_MD_VL
è|| (defšed 
STM32F10X_HD_VL
)

108 

	#SYSCLK_FREQ_24MHz
 24000000

	)

115 

	#SYSCLK_FREQ_72MHz
 72000000

	)

121 #ià
defšed
 (
STM32F10X_HD
è|| (defšed 
STM32F10X_XL
è|| (defšed 
STM32F10X_HD_VL
)

128 

	#VECT_TAB_OFFSET
 0x0

	)

151 #ifdeà
SYSCLK_FREQ_HSE


152 
ušt32_t
 
	gSy¡emCÜeClock
 = 
SYSCLK_FREQ_HSE
;

153 #–ià
defšed
 
SYSCLK_FREQ_24MHz


154 
ušt32_t
 
	gSy¡emCÜeClock
 = 
SYSCLK_FREQ_24MHz
;

155 #–ià
defšed
 
SYSCLK_FREQ_36MHz


156 
ušt32_t
 
	gSy¡emCÜeClock
 = 
SYSCLK_FREQ_36MHz
;

157 #–ià
defšed
 
SYSCLK_FREQ_48MHz


158 
ušt32_t
 
	gSy¡emCÜeClock
 = 
SYSCLK_FREQ_48MHz
;

159 #–ià
defšed
 
SYSCLK_FREQ_56MHz


160 
ušt32_t
 
	gSy¡emCÜeClock
 = 
SYSCLK_FREQ_56MHz
;

161 #–ià
defšed
 
SYSCLK_FREQ_72MHz


162 
ušt32_t
 
	gSy¡emCÜeClock
 = 
SYSCLK_FREQ_72MHz
;

164 
ušt32_t
 
	gSy¡emCÜeClock
 = 
HSI_VALUE
;

167 
__I
 
ušt8_t
 
	gAHBP»scTabË
[16] = {0, 0, 0, 0, 0, 0, 0, 0, 1, 2, 3, 4, 6, 7, 8, 9};

176 
S‘SysClock
();

178 #ifdeà
SYSCLK_FREQ_HSE


179 
S‘SysClockToHSE
();

180 #–ià
defšed
 
SYSCLK_FREQ_24MHz


181 
S‘SysClockTo24
();

182 #–ià
defšed
 
SYSCLK_FREQ_36MHz


183 
S‘SysClockTo36
();

184 #–ià
defšed
 
SYSCLK_FREQ_48MHz


185 
S‘SysClockTo48
();

186 #–ià
defšed
 
SYSCLK_FREQ_56MHz


187 
S‘SysClockTo56
();

188 #–ià
defšed
 
SYSCLK_FREQ_72MHz


189 
S‘SysClockTo72
();

192 #ifdeà
DATA_IN_ExtSRAM


193 
Sy¡emIn™_ExtMemCŽ
();

212 
	$Sy¡emIn™
 ()

216 
RCC
->
CR
 |ð(
ušt32_t
)0x00000001;

219 #iâdeà
STM32F10X_CL


220 
RCC
->
CFGR
 &ð(
ušt32_t
)0xF8FF0000;

222 
RCC
->
CFGR
 &ð(
ušt32_t
)0xF0FF0000;

226 
RCC
->
CR
 &ð(
ušt32_t
)0xFEF6FFFF;

229 
RCC
->
CR
 &ð(
ušt32_t
)0xFFFBFFFF;

232 
RCC
->
CFGR
 &ð(
ušt32_t
)0xFF80FFFF;

234 #ifdeà
STM32F10X_CL


236 
RCC
->
CR
 &ð(
ušt32_t
)0xEBFFFFFF;

239 
RCC
->
CIR
 = 0x00FF0000;

242 
RCC
->
CFGR2
 = 0x00000000;

243 #–ià
	`defšed
 (
STM32F10X_LD_VL
è|| defšed (
STM32F10X_MD_VL
è|| (
defšed
 
STM32F10X_HD_VL
)

245 
RCC
->
CIR
 = 0x009F0000;

248 
RCC
->
CFGR2
 = 0x00000000;

251 
RCC
->
CIR
 = 0x009F0000;

254 #ià
	`defšed
 (
STM32F10X_HD
è|| (
defšed
 
STM32F10X_XL
è|| (defšed 
STM32F10X_HD_VL
)

255 #ifdeà
DATA_IN_ExtSRAM


256 
	`Sy¡emIn™_ExtMemCŽ
();

262 
	`S‘SysClock
();

271 #iâdeà
__DONT_INIT_VTABLE


272 #ifdeà
VECT_TAB_SRAM


273 
SCB
->
VTOR
 = 
SRAM_BASE
 | 
VECT_TAB_OFFSET
;

275 
SCB
->
VTOR
 = 
FLASH_BASE
 | 
VECT_TAB_OFFSET
;

278 #w¬nšg 
FÜ
 
»Ëa£
 
v”siÚ
 dØ
nÙ
 
u£
 
	`__DONT_INIT_VTABLE
 (
£e
 
above
).

280 
	}
}

317 
	$Sy¡emCÜeClockUpd©e
 ()

319 
ušt32_t
 
tmp
 = 0, 
¶lmuÎ
 = 0, 
¶lsourû
 = 0;

321 #ifdeà 
STM32F10X_CL


322 
ušt32_t
 
´ediv1sourû
 = 0, 
´ediv1çùÜ
 = 0, 
´ediv2çùÜ
 = 0, 
¶l2muÎ
 = 0;

325 #ià
	`defšed
 (
STM32F10X_LD_VL
è|| defšed (
STM32F10X_MD_VL
è|| (
defšed
 
STM32F10X_HD_VL
)

326 
ušt32_t
 
´ediv1çùÜ
 = 0;

330 
tmp
 = 
RCC
->
CFGR
 & 
RCC_CFGR_SWS
;

332 
tmp
)

335 
Sy¡emCÜeClock
 = 
HSI_VALUE
;

338 
Sy¡emCÜeClock
 = 
HSE_VALUE
;

343 
¶lmuÎ
 = 
RCC
->
CFGR
 & 
RCC_CFGR_PLLMULL
;

344 
¶lsourû
 = 
RCC
->
CFGR
 & 
RCC_CFGR_PLLSRC
;

346 #iâdeà
STM32F10X_CL


347 
¶lmuÎ
 = (…llmull >> 18) + 2;

349 ià(
¶lsourû
 == 0x00)

352 
Sy¡emCÜeClock
 = (
HSI_VALUE
 >> 1è* 
¶lmuÎ
;

356 #ià
	`defšed
 (
STM32F10X_LD_VL
è|| defšed (
STM32F10X_MD_VL
è|| (
defšed
 
STM32F10X_HD_VL
)

357 
´ediv1çùÜ
 = (
RCC
->
CFGR2
 & 
RCC_CFGR2_PREDIV1
) + 1;

359 
Sy¡emCÜeClock
 = (
HSE_VALUE
 / 
´ediv1çùÜ
è* 
¶lmuÎ
;

362 ià((
RCC
->
CFGR
 & 
RCC_CFGR_PLLXTPRE
è!ð(
ušt32_t
)
RESET
)

364 
Sy¡emCÜeClock
 = (
HSE_VALUE
 >> 1è* 
¶lmuÎ
;

368 
Sy¡emCÜeClock
 = 
HSE_VALUE
 * 
¶lmuÎ
;

373 
¶lmuÎ
 =…llmull >> 18;

375 ià(
¶lmuÎ
 != 0x0D)

377 
¶lmuÎ
 += 2;

381 
¶lmuÎ
 = 13 / 2;

384 ià(
¶lsourû
 == 0x00)

387 
Sy¡emCÜeClock
 = (
HSI_VALUE
 >> 1è* 
¶lmuÎ
;

393 
´ediv1sourû
 = 
RCC
->
CFGR2
 & 
RCC_CFGR2_PREDIV1SRC
;

394 
´ediv1çùÜ
 = (
RCC
->
CFGR2
 & 
RCC_CFGR2_PREDIV1
) + 1;

396 ià(
´ediv1sourû
 == 0)

399 
Sy¡emCÜeClock
 = (
HSE_VALUE
 / 
´ediv1çùÜ
è* 
¶lmuÎ
;

405 
´ediv2çùÜ
 = ((
RCC
->
CFGR2
 & 
RCC_CFGR2_PREDIV2
) >> 4) + 1;

406 
¶l2muÎ
 = ((
RCC
->
CFGR2
 & 
RCC_CFGR2_PLL2MUL
) >> 8 ) + 2;

407 
Sy¡emCÜeClock
 = (((
HSE_VALUE
 / 
´ediv2çùÜ
è* 
¶l2muÎ
è/ 
´ediv1çùÜ
è* 
¶lmuÎ
;

414 
Sy¡emCÜeClock
 = 
HSI_VALUE
;

420 
tmp
 = 
AHBP»scTabË
[((
RCC
->
CFGR
 & 
RCC_CFGR_HPRE
) >> 4)];

422 
Sy¡emCÜeClock
 >>ð
tmp
;

423 
	}
}

430 
	$S‘SysClock
()

432 #ifdeà
SYSCLK_FREQ_HSE


433 
	`S‘SysClockToHSE
();

434 #–ià
defšed
 
SYSCLK_FREQ_24MHz


435 
	`S‘SysClockTo24
();

436 #–ià
defšed
 
SYSCLK_FREQ_36MHz


437 
	`S‘SysClockTo36
();

438 #–ià
defšed
 
SYSCLK_FREQ_48MHz


439 
	`S‘SysClockTo48
();

440 #–ià
defšed
 
SYSCLK_FREQ_56MHz


441 
	`S‘SysClockTo56
();

442 #–ià
defšed
 
SYSCLK_FREQ_72MHz


443 
	`S‘SysClockTo72
();

448 
	}
}

456 #ifdeà
DATA_IN_ExtSRAM


466 
	$Sy¡emIn™_ExtMemCŽ
()

472 
RCC
->
AHBENR
 = 0x00000114;

475 
RCC
->
APB2ENR
 = 0x000001E0;

483 
GPIOD
->
CRL
 = 0x44BB44BB;

484 
GPIOD
->
CRH
 = 0xBBBBBBBB;

486 
GPIOE
->
CRL
 = 0xB44444BB;

487 
GPIOE
->
CRH
 = 0xBBBBBBBB;

489 
GPIOF
->
CRL
 = 0x44BBBBBB;

490 
GPIOF
->
CRH
 = 0xBBBB4444;

492 
GPIOG
->
CRL
 = 0x44BBBBBB;

493 
GPIOG
->
CRH
 = 0x44444B44;

498 
FSMC_Bªk1
->
BTCR
[4] = 0x00001011;

499 
FSMC_Bªk1
->
BTCR
[5] = 0x00000200;

500 
	}
}

503 #ifdeà
SYSCLK_FREQ_HSE


511 
	$S‘SysClockToHSE
()

513 
__IO
 
ušt32_t
 
S¹UpCouÁ”
 = 0, 
HSEStus
 = 0;

517 
RCC
->
CR
 |ð((
ušt32_t
)
RCC_CR_HSEON
);

522 
HSEStus
 = 
RCC
->
CR
 & 
RCC_CR_HSERDY
;

523 
S¹UpCouÁ”
++;

524 } (
HSEStus
 =ð0è&& (
S¹UpCouÁ”
 !ð
HSE_STARTUP_TIMEOUT
));

526 ià((
RCC
->
CR
 & 
RCC_CR_HSERDY
è!ð
RESET
)

528 
HSEStus
 = (
ušt32_t
)0x01;

532 
HSEStus
 = (
ušt32_t
)0x00;

535 ià(
HSEStus
 =ð(
ušt32_t
)0x01)

538 #ià!
defšed
 
STM32F10X_LD_VL
 && !defšed 
STM32F10X_MD_VL
 && !defšed 
STM32F10X_HD_VL


540 
FLASH
->
ACR
 |ð
FLASH_ACR_PRFTBE
;

543 
FLASH
->
ACR
 &ð(
ušt32_t
)((ušt32_t)~
FLASH_ACR_LATENCY
);

545 #iâdeà
STM32F10X_CL


546 
FLASH
->
ACR
 |ð(
ušt32_t
)
FLASH_ACR_LATENCY_0
;

548 ià(
HSE_VALUE
 <= 24000000)

550 
FLASH
->
ACR
 |ð(
ušt32_t
)
FLASH_ACR_LATENCY_0
;

554 
FLASH
->
ACR
 |ð(
ušt32_t
)
FLASH_ACR_LATENCY_1
;

560 
RCC
->
CFGR
 |ð(
ušt32_t
)
RCC_CFGR_HPRE_DIV1
;

563 
RCC
->
CFGR
 |ð(
ušt32_t
)
RCC_CFGR_PPRE2_DIV1
;

566 
RCC
->
CFGR
 |ð(
ušt32_t
)
RCC_CFGR_PPRE1_DIV1
;

569 
RCC
->
CFGR
 &ð(
ušt32_t
)((ušt32_t)~(
RCC_CFGR_SW
));

570 
RCC
->
CFGR
 |ð(
ušt32_t
)
RCC_CFGR_SW_HSE
;

573 (
RCC
->
CFGR
 & (
ušt32_t
)
RCC_CFGR_SWS
) != (uint32_t)0x04)

581 
	}
}

582 #–ià
defšed
 
SYSCLK_FREQ_24MHz


590 
	$S‘SysClockTo24
()

592 
__IO
 
ušt32_t
 
S¹UpCouÁ”
 = 0, 
HSEStus
 = 0;

596 
RCC
->
CR
 |ð((
ušt32_t
)
RCC_CR_HSEON
);

601 
HSEStus
 = 
RCC
->
CR
 & 
RCC_CR_HSERDY
;

602 
S¹UpCouÁ”
++;

603 } (
HSEStus
 =ð0è&& (
S¹UpCouÁ”
 !ð
HSE_STARTUP_TIMEOUT
));

605 ià((
RCC
->
CR
 & 
RCC_CR_HSERDY
è!ð
RESET
)

607 
HSEStus
 = (
ušt32_t
)0x01;

611 
HSEStus
 = (
ušt32_t
)0x00;

614 ià(
HSEStus
 =ð(
ušt32_t
)0x01)

616 #ià!
defšed
 
STM32F10X_LD_VL
 && !defšed 
STM32F10X_MD_VL
 && !defšed 
STM32F10X_HD_VL


618 
FLASH
->
ACR
 |ð
FLASH_ACR_PRFTBE
;

621 
FLASH
->
ACR
 &ð(
ušt32_t
)((ušt32_t)~
FLASH_ACR_LATENCY
);

622 
FLASH
->
ACR
 |ð(
ušt32_t
)
FLASH_ACR_LATENCY_0
;

626 
RCC
->
CFGR
 |ð(
ušt32_t
)
RCC_CFGR_HPRE_DIV1
;

629 
RCC
->
CFGR
 |ð(
ušt32_t
)
RCC_CFGR_PPRE2_DIV1
;

632 
RCC
->
CFGR
 |ð(
ušt32_t
)
RCC_CFGR_PPRE1_DIV1
;

634 #ifdeà
STM32F10X_CL


637 
RCC
->
CFGR
 &ð(
ušt32_t
)~(
RCC_CFGR_PLLXTPRE
 | 
RCC_CFGR_PLLSRC
 | 
RCC_CFGR_PLLMULL
);

638 
RCC
->
CFGR
 |ð(
ušt32_t
)(
RCC_CFGR_PLLXTPRE_PREDIV1
 | 
RCC_CFGR_PLLSRC_PREDIV1
 |

639 
RCC_CFGR_PLLMULL6
);

643 
RCC
->
CFGR2
 &ð(
ušt32_t
)~(
RCC_CFGR2_PREDIV2
 | 
RCC_CFGR2_PLL2MUL
 |

644 
RCC_CFGR2_PREDIV1
 | 
RCC_CFGR2_PREDIV1SRC
);

645 
RCC
->
CFGR2
 |ð(
ušt32_t
)(
RCC_CFGR2_PREDIV2_DIV5
 | 
RCC_CFGR2_PLL2MUL8
 |

646 
RCC_CFGR2_PREDIV1SRC_PLL2
 | 
RCC_CFGR2_PREDIV1_DIV10
);

649 
RCC
->
CR
 |ð
RCC_CR_PLL2ON
;

651 (
RCC
->
CR
 & 
RCC_CR_PLL2RDY
) == 0)

654 #–ià
	`defšed
 (
STM32F10X_LD_VL
è|| defšed (
STM32F10X_MD_VL
è|| defšed (
STM32F10X_HD_VL
)

656 
RCC
->
CFGR
 &ð(
ušt32_t
)((ušt32_t)~(
RCC_CFGR_PLLSRC
 | 
RCC_CFGR_PLLXTPRE
 | 
RCC_CFGR_PLLMULL
));

657 
RCC
->
CFGR
 |ð(
ušt32_t
)(
RCC_CFGR_PLLSRC_PREDIV1
 | 
RCC_CFGR_PLLXTPRE_PREDIV1_Div2
 | 
RCC_CFGR_PLLMULL6
);

660 
RCC
->
CFGR
 &ð(
ušt32_t
)((ušt32_t)~(
RCC_CFGR_PLLSRC
 | 
RCC_CFGR_PLLXTPRE
 | 
RCC_CFGR_PLLMULL
));

661 
RCC
->
CFGR
 |ð(
ušt32_t
)(
RCC_CFGR_PLLSRC_HSE
 | 
RCC_CFGR_PLLXTPRE_HSE_Div2
 | 
RCC_CFGR_PLLMULL6
);

665 
RCC
->
CR
 |ð
RCC_CR_PLLON
;

668 (
RCC
->
CR
 & 
RCC_CR_PLLRDY
) == 0)

673 
RCC
->
CFGR
 &ð(
ušt32_t
)((ušt32_t)~(
RCC_CFGR_SW
));

674 
RCC
->
CFGR
 |ð(
ušt32_t
)
RCC_CFGR_SW_PLL
;

677 (
RCC
->
CFGR
 & (
ušt32_t
)
RCC_CFGR_SWS
) != (uint32_t)0x08)

685 
	}
}

686 #–ià
defšed
 
SYSCLK_FREQ_36MHz


694 
	$S‘SysClockTo36
()

696 
__IO
 
ušt32_t
 
S¹UpCouÁ”
 = 0, 
HSEStus
 = 0;

700 
RCC
->
CR
 |ð((
ušt32_t
)
RCC_CR_HSEON
);

705 
HSEStus
 = 
RCC
->
CR
 & 
RCC_CR_HSERDY
;

706 
S¹UpCouÁ”
++;

707 } (
HSEStus
 =ð0è&& (
S¹UpCouÁ”
 !ð
HSE_STARTUP_TIMEOUT
));

709 ià((
RCC
->
CR
 & 
RCC_CR_HSERDY
è!ð
RESET
)

711 
HSEStus
 = (
ušt32_t
)0x01;

715 
HSEStus
 = (
ušt32_t
)0x00;

718 ià(
HSEStus
 =ð(
ušt32_t
)0x01)

721 
FLASH
->
ACR
 |ð
FLASH_ACR_PRFTBE
;

724 
FLASH
->
ACR
 &ð(
ušt32_t
)((ušt32_t)~
FLASH_ACR_LATENCY
);

725 
FLASH
->
ACR
 |ð(
ušt32_t
)
FLASH_ACR_LATENCY_1
;

728 
RCC
->
CFGR
 |ð(
ušt32_t
)
RCC_CFGR_HPRE_DIV1
;

731 
RCC
->
CFGR
 |ð(
ušt32_t
)
RCC_CFGR_PPRE2_DIV1
;

734 
RCC
->
CFGR
 |ð(
ušt32_t
)
RCC_CFGR_PPRE1_DIV1
;

736 #ifdeà
STM32F10X_CL


740 
RCC
->
CFGR
 &ð(
ušt32_t
)~(
RCC_CFGR_PLLXTPRE
 | 
RCC_CFGR_PLLSRC
 | 
RCC_CFGR_PLLMULL
);

741 
RCC
->
CFGR
 |ð(
ušt32_t
)(
RCC_CFGR_PLLXTPRE_PREDIV1
 | 
RCC_CFGR_PLLSRC_PREDIV1
 |

742 
RCC_CFGR_PLLMULL9
);

747 
RCC
->
CFGR2
 &ð(
ušt32_t
)~(
RCC_CFGR2_PREDIV2
 | 
RCC_CFGR2_PLL2MUL
 |

748 
RCC_CFGR2_PREDIV1
 | 
RCC_CFGR2_PREDIV1SRC
);

749 
RCC
->
CFGR2
 |ð(
ušt32_t
)(
RCC_CFGR2_PREDIV2_DIV5
 | 
RCC_CFGR2_PLL2MUL8
 |

750 
RCC_CFGR2_PREDIV1SRC_PLL2
 | 
RCC_CFGR2_PREDIV1_DIV10
);

753 
RCC
->
CR
 |ð
RCC_CR_PLL2ON
;

755 (
RCC
->
CR
 & 
RCC_CR_PLL2RDY
) == 0)

761 
RCC
->
CFGR
 &ð(
ušt32_t
)((ušt32_t)~(
RCC_CFGR_PLLSRC
 | 
RCC_CFGR_PLLXTPRE
 | 
RCC_CFGR_PLLMULL
));

762 
RCC
->
CFGR
 |ð(
ušt32_t
)(
RCC_CFGR_PLLSRC_HSE
 | 
RCC_CFGR_PLLXTPRE_HSE_Div2
 | 
RCC_CFGR_PLLMULL9
);

766 
RCC
->
CR
 |ð
RCC_CR_PLLON
;

769 (
RCC
->
CR
 & 
RCC_CR_PLLRDY
) == 0)

774 
RCC
->
CFGR
 &ð(
ušt32_t
)((ušt32_t)~(
RCC_CFGR_SW
));

775 
RCC
->
CFGR
 |ð(
ušt32_t
)
RCC_CFGR_SW_PLL
;

778 (
RCC
->
CFGR
 & (
ušt32_t
)
RCC_CFGR_SWS
) != (uint32_t)0x08)

786 
	}
}

787 #–ià
defšed
 
SYSCLK_FREQ_48MHz


795 
	$S‘SysClockTo48
()

797 
__IO
 
ušt32_t
 
S¹UpCouÁ”
 = 0, 
HSEStus
 = 0;

801 
RCC
->
CR
 |ð((
ušt32_t
)
RCC_CR_HSEON
);

806 
HSEStus
 = 
RCC
->
CR
 & 
RCC_CR_HSERDY
;

807 
S¹UpCouÁ”
++;

808 } (
HSEStus
 =ð0è&& (
S¹UpCouÁ”
 !ð
HSE_STARTUP_TIMEOUT
));

810 ià((
RCC
->
CR
 & 
RCC_CR_HSERDY
è!ð
RESET
)

812 
HSEStus
 = (
ušt32_t
)0x01;

816 
HSEStus
 = (
ušt32_t
)0x00;

819 ià(
HSEStus
 =ð(
ušt32_t
)0x01)

822 
FLASH
->
ACR
 |ð
FLASH_ACR_PRFTBE
;

825 
FLASH
->
ACR
 &ð(
ušt32_t
)((ušt32_t)~
FLASH_ACR_LATENCY
);

826 
FLASH
->
ACR
 |ð(
ušt32_t
)
FLASH_ACR_LATENCY_1
;

829 
RCC
->
CFGR
 |ð(
ušt32_t
)
RCC_CFGR_HPRE_DIV1
;

832 
RCC
->
CFGR
 |ð(
ušt32_t
)
RCC_CFGR_PPRE2_DIV1
;

835 
RCC
->
CFGR
 |ð(
ušt32_t
)
RCC_CFGR_PPRE1_DIV2
;

837 #ifdeà
STM32F10X_CL


842 
RCC
->
CFGR2
 &ð(
ušt32_t
)~(
RCC_CFGR2_PREDIV2
 | 
RCC_CFGR2_PLL2MUL
 |

843 
RCC_CFGR2_PREDIV1
 | 
RCC_CFGR2_PREDIV1SRC
);

844 
RCC
->
CFGR2
 |ð(
ušt32_t
)(
RCC_CFGR2_PREDIV2_DIV5
 | 
RCC_CFGR2_PLL2MUL8
 |

845 
RCC_CFGR2_PREDIV1SRC_PLL2
 | 
RCC_CFGR2_PREDIV1_DIV5
);

848 
RCC
->
CR
 |ð
RCC_CR_PLL2ON
;

850 (
RCC
->
CR
 & 
RCC_CR_PLL2RDY
) == 0)

856 
RCC
->
CFGR
 &ð(
ušt32_t
)~(
RCC_CFGR_PLLXTPRE
 | 
RCC_CFGR_PLLSRC
 | 
RCC_CFGR_PLLMULL
);

857 
RCC
->
CFGR
 |ð(
ušt32_t
)(
RCC_CFGR_PLLXTPRE_PREDIV1
 | 
RCC_CFGR_PLLSRC_PREDIV1
 |

858 
RCC_CFGR_PLLMULL6
);

861 
RCC
->
CFGR
 &ð(
ušt32_t
)((ušt32_t)~(
RCC_CFGR_PLLSRC
 | 
RCC_CFGR_PLLXTPRE
 | 
RCC_CFGR_PLLMULL
));

862 
RCC
->
CFGR
 |ð(
ušt32_t
)(
RCC_CFGR_PLLSRC_HSE
 | 
RCC_CFGR_PLLMULL6
);

866 
RCC
->
CR
 |ð
RCC_CR_PLLON
;

869 (
RCC
->
CR
 & 
RCC_CR_PLLRDY
) == 0)

874 
RCC
->
CFGR
 &ð(
ušt32_t
)((ušt32_t)~(
RCC_CFGR_SW
));

875 
RCC
->
CFGR
 |ð(
ušt32_t
)
RCC_CFGR_SW_PLL
;

878 (
RCC
->
CFGR
 & (
ušt32_t
)
RCC_CFGR_SWS
) != (uint32_t)0x08)

886 
	}
}

888 #–ià
defšed
 
SYSCLK_FREQ_56MHz


896 
	$S‘SysClockTo56
()

898 
__IO
 
ušt32_t
 
S¹UpCouÁ”
 = 0, 
HSEStus
 = 0;

902 
RCC
->
CR
 |ð((
ušt32_t
)
RCC_CR_HSEON
);

907 
HSEStus
 = 
RCC
->
CR
 & 
RCC_CR_HSERDY
;

908 
S¹UpCouÁ”
++;

909 } (
HSEStus
 =ð0è&& (
S¹UpCouÁ”
 !ð
HSE_STARTUP_TIMEOUT
));

911 ià((
RCC
->
CR
 & 
RCC_CR_HSERDY
è!ð
RESET
)

913 
HSEStus
 = (
ušt32_t
)0x01;

917 
HSEStus
 = (
ušt32_t
)0x00;

920 ià(
HSEStus
 =ð(
ušt32_t
)0x01)

923 
FLASH
->
ACR
 |ð
FLASH_ACR_PRFTBE
;

926 
FLASH
->
ACR
 &ð(
ušt32_t
)((ušt32_t)~
FLASH_ACR_LATENCY
);

927 
FLASH
->
ACR
 |ð(
ušt32_t
)
FLASH_ACR_LATENCY_2
;

930 
RCC
->
CFGR
 |ð(
ušt32_t
)
RCC_CFGR_HPRE_DIV1
;

933 
RCC
->
CFGR
 |ð(
ušt32_t
)
RCC_CFGR_PPRE2_DIV1
;

936 
RCC
->
CFGR
 |ð(
ušt32_t
)
RCC_CFGR_PPRE1_DIV2
;

938 #ifdeà
STM32F10X_CL


943 
RCC
->
CFGR2
 &ð(
ušt32_t
)~(
RCC_CFGR2_PREDIV2
 | 
RCC_CFGR2_PLL2MUL
 |

944 
RCC_CFGR2_PREDIV1
 | 
RCC_CFGR2_PREDIV1SRC
);

945 
RCC
->
CFGR2
 |ð(
ušt32_t
)(
RCC_CFGR2_PREDIV2_DIV5
 | 
RCC_CFGR2_PLL2MUL8
 |

946 
RCC_CFGR2_PREDIV1SRC_PLL2
 | 
RCC_CFGR2_PREDIV1_DIV5
);

949 
RCC
->
CR
 |ð
RCC_CR_PLL2ON
;

951 (
RCC
->
CR
 & 
RCC_CR_PLL2RDY
) == 0)

957 
RCC
->
CFGR
 &ð(
ušt32_t
)~(
RCC_CFGR_PLLXTPRE
 | 
RCC_CFGR_PLLSRC
 | 
RCC_CFGR_PLLMULL
);

958 
RCC
->
CFGR
 |ð(
ušt32_t
)(
RCC_CFGR_PLLXTPRE_PREDIV1
 | 
RCC_CFGR_PLLSRC_PREDIV1
 |

959 
RCC_CFGR_PLLMULL7
);

962 
RCC
->
CFGR
 &ð(
ušt32_t
)((ušt32_t)~(
RCC_CFGR_PLLSRC
 | 
RCC_CFGR_PLLXTPRE
 | 
RCC_CFGR_PLLMULL
));

963 
RCC
->
CFGR
 |ð(
ušt32_t
)(
RCC_CFGR_PLLSRC_HSE
 | 
RCC_CFGR_PLLMULL7
);

968 
RCC
->
CR
 |ð
RCC_CR_PLLON
;

971 (
RCC
->
CR
 & 
RCC_CR_PLLRDY
) == 0)

976 
RCC
->
CFGR
 &ð(
ušt32_t
)((ušt32_t)~(
RCC_CFGR_SW
));

977 
RCC
->
CFGR
 |ð(
ušt32_t
)
RCC_CFGR_SW_PLL
;

980 (
RCC
->
CFGR
 & (
ušt32_t
)
RCC_CFGR_SWS
) != (uint32_t)0x08)

988 
	}
}

990 #–ià
defšed
 
SYSCLK_FREQ_72MHz


998 
	$S‘SysClockTo72
()

1000 
__IO
 
ušt32_t
 
S¹UpCouÁ”
 = 0, 
HSEStus
 = 0;

1004 
RCC
->
CR
 |ð((
ušt32_t
)
RCC_CR_HSEON
);

1009 
HSEStus
 = 
RCC
->
CR
 & 
RCC_CR_HSERDY
;

1010 
S¹UpCouÁ”
++;

1011 } (
HSEStus
 =ð0è&& (
S¹UpCouÁ”
 !ð
HSE_STARTUP_TIMEOUT
));

1013 ià((
RCC
->
CR
 & 
RCC_CR_HSERDY
è!ð
RESET
)

1015 
HSEStus
 = (
ušt32_t
)0x01;

1019 
HSEStus
 = (
ušt32_t
)0x00;

1022 ià(
HSEStus
 =ð(
ušt32_t
)0x01)

1025 
FLASH
->
ACR
 |ð
FLASH_ACR_PRFTBE
;

1028 
FLASH
->
ACR
 &ð(
ušt32_t
)((ušt32_t)~
FLASH_ACR_LATENCY
);

1029 
FLASH
->
ACR
 |ð(
ušt32_t
)
FLASH_ACR_LATENCY_2
;

1033 
RCC
->
CFGR
 |ð(
ušt32_t
)
RCC_CFGR_HPRE_DIV1
;

1036 
RCC
->
CFGR
 |ð(
ušt32_t
)
RCC_CFGR_PPRE2_DIV1
;

1039 
RCC
->
CFGR
 |ð(
ušt32_t
)
RCC_CFGR_PPRE1_DIV2
;

1041 #ifdeà
STM32F10X_CL


1046 
RCC
->
CFGR2
 &ð(
ušt32_t
)~(
RCC_CFGR2_PREDIV2
 | 
RCC_CFGR2_PLL2MUL
 |

1047 
RCC_CFGR2_PREDIV1
 | 
RCC_CFGR2_PREDIV1SRC
);

1048 
RCC
->
CFGR2
 |ð(
ušt32_t
)(
RCC_CFGR2_PREDIV2_DIV5
 | 
RCC_CFGR2_PLL2MUL8
 |

1049 
RCC_CFGR2_PREDIV1SRC_PLL2
 | 
RCC_CFGR2_PREDIV1_DIV5
);

1052 
RCC
->
CR
 |ð
RCC_CR_PLL2ON
;

1054 (
RCC
->
CR
 & 
RCC_CR_PLL2RDY
) == 0)

1060 
RCC
->
CFGR
 &ð(
ušt32_t
)~(
RCC_CFGR_PLLXTPRE
 | 
RCC_CFGR_PLLSRC
 | 
RCC_CFGR_PLLMULL
);

1061 
RCC
->
CFGR
 |ð(
ušt32_t
)(
RCC_CFGR_PLLXTPRE_PREDIV1
 | 
RCC_CFGR_PLLSRC_PREDIV1
 |

1062 
RCC_CFGR_PLLMULL9
);

1065 
RCC
->
CFGR
 &ð(
ušt32_t
)((ušt32_t)~(
RCC_CFGR_PLLSRC
 | 
RCC_CFGR_PLLXTPRE
 |

1066 
RCC_CFGR_PLLMULL
));

1067 
RCC
->
CFGR
 |ð(
ušt32_t
)(
RCC_CFGR_PLLSRC_HSE
 | 
RCC_CFGR_PLLMULL9
);

1071 
RCC
->
CR
 |ð
RCC_CR_PLLON
;

1074 (
RCC
->
CR
 & 
RCC_CR_PLLRDY
) == 0)

1079 
RCC
->
CFGR
 &ð(
ušt32_t
)((ušt32_t)~(
RCC_CFGR_SW
));

1080 
RCC
->
CFGR
 |ð(
ušt32_t
)
RCC_CFGR_SW_PLL
;

1083 (
RCC
->
CFGR
 & (
ušt32_t
)
RCC_CFGR_SWS
) != (uint32_t)0x08)

1091 
	}
}

	@C:\Users\Victor\EMBITZ~1\STM32W~1\src\main.c

14 
	~"¡m32f10x.h
"

15 

	#ALARM_SECONDS
 86400

	)

16 

	#FLAG_REGISTER
 
DR1


	)

17 

	#DATE_REGISTER_L
 
DR2


	)

18 

	#DATE_REGISTER_H
 
DR3


	)

19 

	#BKP_PWR_LOSS_FLAG
 0x01

	)

21 

	#ZERO_YEAR
 1970

	)

23 
	sD©e
 {

24 
ušt8_t
 
	mw“kDay
;

25 
ušt8_t
 
	mday
;

26 
ušt8_t
 
	mmÚth
;

27 
ušt16_t
 
	my—r
;

29 
	sTime
 {

30 
ušt8_t
 
	mhour
;

31 
ušt8_t
 
	mmšu‹
;

32 
ušt8_t
 
	m£cÚd
;

37 
šüem’tDay
(
D©e
*);

38 
wr™eD©e
(
D©e
);

39 
D©e
 
»adD©e
();

40 
£tTube
(
ušt8_t
 
ªode
, ušt8_ˆ
ÿthode
);

41 
	$d–ay
(
i
){

42 --
i
);

43 
	}
}

45 
	$maš
() {

47 
RCC
->
APB2ENR
 |ð
RCC_APB2ENR_IOPCEN
 | 
RCC_APB2ENR_IOPAEN
;

48 
RCC
->
APB1ENR
 |ð
RCC_APB1ENR_BKPEN
;

49 
RCC
->
APB1ENR
 |ð
RCC_APB1ENR_PWREN
;

55 
GPIOC
->
CRH
 |ð
GPIO_CRH_CNF14_1
;

56 
GPIOC
->
CRH
 &ð~
GPIO_CRH_CNF14_0
;

58 
GPIOC
->
CRH
 |ð
GPIO_CRH_CNF15_1
;

59 
GPIOC
->
CRH
 &ð~
GPIO_CRH_CNF15_0
;

61 
GPIOC
->
CRH
 |ð
GPIO_CRH_MODE14_0
 |

62 
GPIO_CRH_MODE14_1
 |

63 
GPIO_CRH_MODE15_0
 |

64 
GPIO_CRH_MODE15_1
;

66 
PWR
->
CR
 |ð
PWR_CR_DBP
;

67 if(!(
BKP
->
FLAG_REGISTER
 & 
BKP_PWR_LOSS_FLAG
)) {

69 
RCC
->
BDCR
 |ð
RCC_BDCR_BDRST
;

70 
RCC
->
BDCR
 &ð~
RCC_BDCR_BDRST
;

74 
RCC
->
BDCR
 |ð
RCC_BDCR_LSEON
;

75 
RCC
->
BDCR
 |ð
RCC_BDCR_RTCSEL_0
;

76 
RCC
->
BDCR
 |ð
RCC_BDCR_RTCEN
;

83 !(
RTC
->
CRL
 & 
RTC_CRL_RTOFF
));

84 
RTC
->
CRL
 |ð
RTC_CRL_CNF
;

86 
RTC
->
PRLH
 = 0x0000;

87 
RTC
->
PRLL
 = 0x7FFF;

90 
RTC
->
ALRH
 = (
ALARM_SECONDS
 - 1) >> 16;

91 
RTC
->
ALRL
 = (
ALARM_SECONDS
 - 1) >> 0;

93 
RTC
->
CRL
 &ð~
RTC_CRL_CNF
;

94 !(
RTC
->
CRL
 & 
RTC_CRL_RTOFF
));

98 
D©e
 
d©e
;

99 
d©e
.
day
 = 20;

100 
d©e
.
mÚth
 = 7;

101 
d©e
.
y—r
 = 2018;

102 
	`wr™eD©e
(
d©e
);

104 
BKP
->
FLAG_REGISTER
 |ð
BKP_PWR_LOSS_FLAG
;

106 !(
RTC
->
CRL
 & 
RTC_CRL_RTOFF
));

107 
RTC
->
CRH
 |ð
RTC_CRH_SECIE
;

108 
RTC
->
CRH
 |ð
RTC_CRH_ALRIE
;

109 
	`NVIC_EÇbËIRQ
(
RTC_IRQn
);

111 !(
RTC
->
CRL
 & 
RTC_CRL_RSF
));

113 
time
 = (
RTC
->
CNTH
 << 16è| RTC->
CNTL
;

114 if(
time
 >ð
ALARM_SECONDS
) {

115 !(
RTC
->
CRL
 & 
RTC_CRL_RTOFF
));

116 
RTC
->
CRL
 |ð
RTC_CRL_CNF
;

118 
d©eD–
 = 
time
 / 
ALARM_SECONDS
;

119 
D©e
 
d©e
 = 
	`»adD©e
();

120 
d©eD–
--) {

121 
	`šüem’tDay
(&
d©e
);

123 
	`wr™eD©e
(
d©e
);

124 
RTC
->
CNTH
 = 0x0000;

125 
RTC
->
CNTL
 = 
time
 % 3600;

126 
RTC
->
CRL
 &ð~
RTC_CRL_CNF
;

130 
	`SysTick_CÚfig
(72000000 / 1000);

134 
RCC
->
APB2ENR
 |ð
RCC_APB2ENR_ADC1EN
;

135 
ADC1
->
CR2
 |ð
ADC_CR2_ADON
;

144 
RCC
->
APB1ENR
 |ð
RCC_APB1ENR_TIM2EN
;

146 
GPIOA
->
CRL
 |ð
GPIO_CRL_CNF1_1
;

147 
GPIOA
->
CRL
 &ð~
GPIO_CRL_CNF1_0
;

148 
GPIOA
->
CRL
 |ð
GPIO_CRL_MODE1_0
 | 
GPIO_CRL_MODE1_1
;

150 
TIM2
->
ARR
 = 0x05FF;

151 
TIM2
->
CR1
 |ð
TIM_CR1_CEN
;

153 
TIM2
->
CCMR1
 |ð
TIM_CCMR1_OC2M_2
 | 
TIM_CCMR1_OC2M_1
;

154 
TIM2
->
CCER
 |ð
TIM_CCER_CC2E
;

155 
TIM2
->
CCER
 |ð
TIM_CCER_CC2P
;

158 
GPIOA
->
CRL
 &ð~(
GPIO_CRL_CNF4_0
 | 
GPIO_CRL_CNF4_1
);

159 
GPIOA
->
CRL
 &ð~(
GPIO_CRL_CNF5_0
 | 
GPIO_CRL_CNF5_1
);

160 
GPIOA
->
CRL
 &ð~(
GPIO_CRL_CNF6_0
 | 
GPIO_CRL_CNF6_1
);

161 
GPIOA
->
CRL
 &ð~(
GPIO_CRL_CNF7_0
 | 
GPIO_CRL_CNF7_1
);

162 
GPIOA
->
CRH
 &ð~(
GPIO_CRH_CNF8_0
 | 
GPIO_CRH_CNF8_1
);

163 
GPIOA
->
CRH
 &ð~(
GPIO_CRH_CNF9_0
 | 
GPIO_CRH_CNF9_1
);

164 
GPIOA
->
CRH
 &ð~(
GPIO_CRH_CNF10_0
 | 
GPIO_CRH_CNF10_1
);

165 
GPIOA
->
CRH
 &ð~(
GPIO_CRH_CNF11_0
 | 
GPIO_CRH_CNF11_1
);

167 
GPIOA
->
CRL
 |ð
GPIO_CRL_MODE4_0
;

168 
GPIOA
->
CRL
 |ð
GPIO_CRL_MODE5_0
;

169 
GPIOA
->
CRL
 |ð
GPIO_CRL_MODE6_0
;

170 
GPIOA
->
CRL
 |ð
GPIO_CRL_MODE7_0
;

171 
GPIOA
->
CRH
 |ð
GPIO_CRH_MODE8_0
;

172 
GPIOA
->
CRH
 |ð
GPIO_CRH_MODE9_0
;

173 
GPIOA
->
CRH
 |ð
GPIO_CRH_MODE10_0
;

174 
GPIOA
->
CRH
 |ð
GPIO_CRH_MODE11_0
;

180 
D©e
 
d©e
 = 
	`»adD©e
();

181 
GPIOC
->
CRH
 |ð
GPIO_CRH_MODE13_0
;

182 
GPIOC
->
CRH
 |ð
GPIO_CRH_MODE13_1
;

186 
TIM2
->
CCR2
 = 0x00FF;

188 
GPIOA
->
CRL
 |ð
GPIO_CRL_MODE4_0
 | 
GPIO_CRL_MODE4_1
;

189 
GPIOA
->
CRL
 &ð~
GPIO_CRL_CNF4_0
;

190 
GPIOA
->
CRL
 &ð~
GPIO_CRL_CNF4_1
;

191 
GPIOA
->
BSRR
 |ð
GPIO_BSRR_BS4
;

195 
þock
 = 
RTC
->
CNTH
 << 16 | RTC->
CNTL
;

196 
£cÚds
 = 
þock
 % 60;

197 
mšu‹s
 = 
þock
 / 60 % 60;

198 
hours
 = 
þock
 / 60 / 60 % 60;

201 
i
 = 1000000;

202 --
i
);

204 
	}
}

208 
	$RTC_IRQHªdËr
() {

209 !(
RTC
->
CRL
 & 
RTC_CRL_RTOFF
));

211 if(
RTC
->
CRL
 & 
RTC_CRL_SECF
) {

212 
RTC
->
CRL
 &ð~ 
RTC_CRL_SECF
;

213 
GPIOC
->
BSRR
 |ð((
RTC
->
CNTL
 % 2è? 
GPIO_BSRR_BS13
 : 
GPIO_BSRR_BR13
);

215 if(
RTC
->
CRL
 & 
RTC_CRL_ALRF
) {

216 
RTC
->
CRL
 &ð~ 
RTC_CRL_ALRF
;

217 !(
RTC
->
CRL
 & 
RTC_CRL_RTOFF
));

218 
RTC
->
CRL
 |ð
RTC_CRL_CNF
;

219 
RTC
->
CNTH
 = 0x0000;

220 
RTC
->
CNTL
 = 0x0000;

221 
RTC
->
CRL
 &ð~
RTC_CRL_CNF
;

222 
D©e
 
d©e
 = 
	`»adD©e
();

223 
	`šüem’tDay
(&
d©e
);

224 
	`wr™eD©e
(
d©e
);

226 
	}
}

227 
	gtubeIndex
 = 0;

228 
	$SysTick_HªdËr
() {

231 
tubeIndex
 = ++tubeIndex % 6;

233 
þock
 = 
RTC
->
CNTH
 << 16 | RTC->
CNTL
;

234 
£cÚds
 = 
þock
 % 60;

235 
mšu‹s
 = 
þock
 / 60 % 60;

236 
hours
 = 
þock
 / 60 / 60 % 60;

239 
ušt8_t
 
d©a
[6];

240 
d©a
[0] = 
£cÚds
 % 10;

241 
d©a
[1] = (
£cÚds
 / 10) % 10;

242 
d©a
[2] = 
mšu‹s
 % 10;

243 
d©a
[3] = (
mšu‹s
 / 10) % 10;

244 
d©a
[4] = 
hours
 % 10;

245 
d©a
[5] = (
hours
 / 10) % 10;

246 
	`£tTube
(
tubeIndex
, 
d©a
[tubeIndex]);

248 
	}
}

250 
šlše
 
	$£tTube
(
ušt8_t
 
ªode
, ušt8_ˆ
ÿthode
){

251 
GPIOA
->
BSRR
 |ð
ªode
 << 4 |

252 (((~
ªode
 << 4è<< 16è& (
GPIO_BSRR_BR4
 | 
GPIO_BSRR_BR5
 | 
GPIO_BSRR_BR6
 | 
GPIO_BSRR_BR7
));

253 
	`d–ay
(1);

254 
GPIOA
->
BSRR
 |ð
ÿthode
 << 8 |

255 (((~
ÿthode
 << 8è<< 16è& (
GPIO_BSRR_BR8
 | 
GPIO_BSRR_BR9
 | 
GPIO_BSRR_BR10
 | 
GPIO_BSRR_BR11
));

256 
	}
}

259 
	$šüem’tDay
(
D©e
 *
d©e
) {

262 
d©e
->
mÚth
) {

270 if(
d©e
->
day
 < 31) {

271 
d©e
->
day
++;

274 if(
d©e
->
mÚth
 != 12) {

275 
d©e
->
mÚth
++;

276 
d©e
->
day
 = 1;

279 
d©e
->
mÚth
 = 1;

280 
d©e
->
day
 = 1;

281 
d©e
->
y—r
++;

287 if(
d©e
->
day
 < 30) {

288 
d©e
->
day
++;

291 
d©e
->
mÚth
++;

292 
d©e
->
day
 = 1;

295 if(
d©e
->
day
 < 28) {

296 
d©e
->
day
++;

299 if((
d©e
->
day
 =ð28è&& (!(d©e->
y—r
 % 400) || ((date->year % 100) && !(date->year % 4)))) {

300 
d©e
->
day
++;

302 
d©e
->
mÚth
++;

303 
d©e
->
day
 = 1;

306 
	}
}

308 
	$wr™eD©e
(
D©e
 
d©e
) {

311 
d©e
.
y—r
 -ðd©e.
mÚth
 <= 2;

312 cÚ¡ 
”a
 = (
d©e
.
y—r
 >= 0 ? date.year : date.year-399) / 400;

313 cÚ¡ 
ušt16_t
 
yÛ
 = 
d©e
.
y—r
 - 
”a
 * 400;

314 cÚ¡ 
ušt16_t
 
doy
 = (153*(
d©e
.
mÚth
 + (d©e.mÚth > 2 ? -3 : 9)è+ 2)/5 + d©e.
day
-1;

315 cÚ¡ 
ušt32_t
 
dÛ
 = 
yÛ
 * 365 + yÛ/4 - yÛ/100 + 
doy
;

316 
unix
 = 
”a
 * 146097 + 
dÛ
 - 719468;

318 
BKP
->
DATE_REGISTER_H
 = 
unix
 >> 16;

319 
BKP
->
DATE_REGISTER_L
 = 
unix
;

321 
	}
}

322 
D©e
 
	$»adD©e
() {

323 
D©e
 
d©e
;

324 
days
 = (
BKP
->
DATE_REGISTER_H
 << 16è| (BKP->
DATE_REGISTER_L
);

326 
d©e
.
w“kDay
 = 
days
 >= -3 ? (days+3) % 7 : (days+4) % 7 + 6;

327 
days
 += 719468;

328 cÚ¡ 
”a
 = (
days
 >= 0 ? days : days - 146096) / 146097;

329 cÚ¡ 
ušt32_t
 
dÛ
 = 
days
 - 
”a
 * 146097;

330 cÚ¡ 
ušt16_t
 
yÛ
 = (
dÛ
 - doe/1460 + doe/36524 - doe/146096) / 365;

331 cÚ¡ 
y
 = 
yÛ
 + 
”a
 * 400;

332 cÚ¡ 
ušt16_t
 
doy
 = 
dÛ
 - (365*
yÛ
 + yoe/4 - yoe/100);

333 cÚ¡ 
ušt16_t
 
mp
 = (5*
doy
 + 2)/153;

334 
d©e
.
day
 = 
doy
 - (153*
mp
+2)/5 + 1;

335 
d©e
.
mÚth
 = 
mp
 + (mp < 10 ? 3 : -9);

336 
d©e
.
y—r
 = 
y
 + (d©e.
mÚth
 <= 2);

337  
d©e
;

338 
	}
}

	@C:\Users\Victor\EMBITZ~1\STM32W~1\src\test.c

1 
	~"¡m32f10x.h
"

4 
	$maš
() {

6 
RCC
->
APB1ENR
 |ð
RCC_APB1ENR_TIM4EN
;

8 
	}
}

	@
1
.
0
12
576
C:\Users\Victor\EMBITZ~1\STM32W~1\STM32F~1.LD
C:\Users\Victor\EMBITZ~1\STM32W~1\STM32F~2.LD
C:\Users\Victor\EMBITZ~1\STM32W~1\cmsis\CORE_C~1.H
C:\Users\Victor\EMBITZ~1\STM32W~1\cmsis\CORE_C~2.H
C:\Users\Victor\EMBITZ~1\STM32W~1\cmsis\core_cm3.h
C:\Users\Victor\EMBITZ~1\STM32W~1\inc\STM32F~1.H
C:\Users\Victor\EMBITZ~1\STM32W~1\inc\SYSTEM~1.H
C:\Users\Victor\EMBITZ~1\STM32W~1\readme.txt
C:\Users\Victor\EMBITZ~1\STM32W~1\src\STARTU~1.S
C:\Users\Victor\EMBITZ~1\STM32W~1\src\SYSTEM~1.C
C:\Users\Victor\EMBITZ~1\STM32W~1\src\main.c
C:\Users\Victor\EMBITZ~1\STM32W~1\src\test.c