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[BUG REPORT] Construction of half and full adder using XOR and NAND gates and verification of its operation #4344

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vlabs-bug opened this issue Nov 23, 2024 · 0 comments
Open

[BUG REPORT] Construction of half and full adder using XOR and NAND gates and verification of its operation #4344

vlabs-bug opened this issue Nov 23, 2024 · 0 comments
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Bug Reported on 23 November, 9:40 GMT +5:50 in

Lab - Digital Electronics IITR
Experiment - Construction of half and full adder using XOR and NAND gates and verification of its operation
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UserAgent: Mozilla/5.0 (X11; Linux x86_64) AppleWebKit/537.36 (KHTML, like Gecko) Chrome/131.0.0.0 Safari/537.36
Experiment Link - https://de-iitr.vlabs.ac.in/exp/half-full-adder/
@vlabs-bug vlabs-bug added the IITR label Nov 23, 2024
@vlab-iitr vlab-iitr self-assigned this Nov 28, 2024
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