.gitmodules

[submodule "yosys_verific_rs"]
	path = yosys_verific_rs
	url = https://github.com/os-fpga/yosys_verific_rs.git
[submodule "FOEDAG_rs"]
	path = FOEDAG_rs
	url = https://github.com/os-fpga/FOEDAG_rs.git
[submodule "tests/Jira_Testcase"]
	path = tests/Jira_Testcase
	url = https://github.com/os-fpga/Jira_Testcase.git
[submodule "Backend"]
	path = Backend
	url = https://github.com/os-fpga/Backend.git
[submodule "litex_reference_designs"]
	path = litex_reference_designs
	url = https://github.com/os-fpga/litex_reference_designs.git
[submodule "zephyr-rapidsi-dev"]
	path = zephyr-rapidsi-dev
	url = https://github.com/os-fpga/zephyr-rapidsi-dev
[submodule "Raptor_Tools"]
	path = Raptor_Tools
	url = https://github.com/os-fpga/Raptor_Tools.git
[submodule "IP_Catalog"]
	path = IP_Catalog
	url = https://github.com/os-fpga/IP_Catalog.git