More Information
See AMD Vitis™ Development Environment on xilinx.com
.. toctree:: :maxdepth: 3 :caption: Feature Tutorials :hidden: Incorporating Stream Interfaces <./01_platform_creation_streaming_ip/README> PetaLinux Building and System Customization <./02_petalinux_customization/README> Hardware Design Fast Iteration with Vitis Export to Vivado <./03_Vitis_Export_To_Vivado/README> Versal Extensible Hardware Design Validation <./04_platform_validation/README>
| Tutorial | Description |
|---|---|
| :doc:`Incorporating Stream Interfaces <./01_platform_creation_streaming_ip/README>` | This tutorial demonstrates how you can stream data between Vitis kernels and AXI stream connections exposed in the platform. |
| :doc:`PetaLinux Building and System Customization <./02_petalinux_customization/README>` | This tutorial demonstrates how you can customize a PetaLinux project to work for Vitis acceleration applications. |
| :doc:`Hardware Design Fast Iteration with Vitis Export to Vivado <./03_Vitis_Export_To_Vivado/README>` | The Vitis export to AMD Vivado™ feature enables bi-directional hardware hand-offs between the Vitis tools and the Vivado design suite, which improves developer productivity. |
| :doc:`Versal Extensible Hardware Design Validation <./04_platform_validation/README>` | In this tutorial, you will learn how to validate an AMD Versal™ ACAP extensible platform. This tutorial is an add-on to the basic Versal platform creation tutorial. |