update p4 stage defaul values in general_values.ini

update Changes
wtsi-npg · May 3, 2018 · 2b87d87 · 2b87d87
1 parent 5f7375b
commit 2b87d87
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Showing 2 changed files with 5 additions and 2 deletions.
diff --git a/Changes b/Changes
@@ -4,6 +4,8 @@ LIST OF CHANGES
 release 51.12.2
  - fixed lane taglist files for TraDIS libraries
      no longer pad spiked phix tag simply add missing i5 tag for dual index runs
+ - update p4 stage defaul values in general_values.ini
+     p4_stage1_memory=20000, +p4_stage1_slots=8, +p4_stage1_i2b_thread_count=8
 
 release 51.12.1
  - tweak to GbS library type check in seq_alignment.pm as arrived as GBS (now case-insensitive).

diff --git a/data/config_files/general_values.ini b/data/config_files/general_values.ini
@@ -20,6 +20,7 @@ io_resource_slots=4
 single_plex_decode_max_no_calls=6
 illumina2bam_cpu=2
 illumina2bam_memory=4000
-p4_stage1_memory=7000
-p4_stage1_slots=3
 qc_adapter_cpu=2
+p4_stage1_memory=20000
+p4_stage1_slots=8
+p4_stage1_i2b_thread_count=8