From 1cb5f0b3b470ca273af32d0bfa7e65b528b67b46 Mon Sep 17 00:00:00 2001
From: Wayne Warthen <wwarthen@gmail.com>
Date: Thu, 23 May 2024 11:00:51 -0700
Subject: [PATCH] NABU Code Cleanup

---
 Source/HBIOS/hbios.asm  |  12 ++---
 Source/HBIOS/nabu.asm   | 116 ++++++++++++++--------------------------
 Source/HBIOS/nabukb.asm |  58 +++++++-------------
 Source/HBIOS/sd.asm     |   2 +-
 Source/HBIOS/tms.asm    |  55 ++++++++++---------
 Source/ver.inc          |   2 +-
 Source/ver.lib          |   2 +-
 7 files changed, 100 insertions(+), 147 deletions(-)

diff --git a/Source/HBIOS/hbios.asm b/Source/HBIOS/hbios.asm
index e0cfd65b..838f99bf 100644
--- a/Source/HBIOS/hbios.asm
+++ b/Source/HBIOS/hbios.asm
@@ -1167,13 +1167,6 @@ HBX_RETI:
 	PUSH	BC			; SAVE BC
 	PUSH	DE			; SAVE DE
 	PUSH	IY			; SAVE IY
-;
-#IF (PLATFORM == PLT_NABU)
-	PUSH	HL
-	LD	HL,($FFEA)		; TICCNT COPIED TO...
-	LD	($000B),HL		; ...LOW MEMORY FOR CP/M
-	POP	HL
-#ENDIF
 ;
 	LD	A,BID_BIOS		; HBIOS BANK
 	CALL	HBX_BNKSEL_INT		; SELECT IT
@@ -3019,6 +3012,11 @@ HB_Z280BUS1:
 	LDCTL	HL,(C)
 	CALL	PRTHEXWORDHL
 	CALL	PC_SPACE
+	PRTS("ISR=$")
+	LD	C,Z280_ISR		; INTERRUPT STATUS REGISTER
+	LDCTL	HL,(C)
+	CALL	PRTHEXWORDHL
+	CALL	PC_SPACE
 	PRTS("BTCR=$")
 	LD	C,Z280_BTCR		; BUS TIMING AND CONTROL REGISTER
 	LDCTL	HL,(C)
diff --git a/Source/HBIOS/nabu.asm b/Source/HBIOS/nabu.asm
index bb4db4f4..f9f3f8bd 100644
--- a/Source/HBIOS/nabu.asm
+++ b/Source/HBIOS/nabu.asm
@@ -1,15 +1,12 @@
 ;
 ;==================================================================================================
-; NABU INTERRUPT INTERCEPTOR
+; NABU HARDWARE DRIVER
 ;==================================================================================================
 ;
-NABU_INT1CLR	.EQU	$68
-NABU_TICCNT	.EQU	$FFEA		; TICCNT AT $FFEA IS COPIED DOWN TO $000B
-;
 ; NABU INTERRUPT ENABLE PORT AND STATUS PORTS ARE MANAGED BY THE
 ; PSG IO PORTS.
 ;
-; INTERRUPT ENABLE (OUTPUT) - PSG PORT A
+; NABU CONTROL PORT - INTERRUPT ENABLE (OUTPUT) - PSG PORT A
 ;
 ;	D7 - HCCA Receive
 ;	D6 - HCCA Send
@@ -20,7 +17,13 @@ NABU_TICCNT	.EQU	$FFEA		; TICCNT AT $FFEA IS COPIED DOWN TO $000B
 ;	D1 - Option Card 2 (J11)
 ;	DO - Option Card 3 (J12)
 ;
-; STATUS BYTE (INPUT) - PSG PORT B
+; THE CONTROL PORT IS WRITE ONLY AND THE BITS NEED TO BE MANAGED IN
+; MULTIPLE DRIVERS.  BELOW, WE ALLOCATE NBAU_CTLVAL AS A SHADOW
+; REGISTER FOR THE CONTROL PORT.  IT IS INITIALIZED TO ZERO HERE
+; (ALL INTS DISABLED).  THE INDIVIDUAL BITS ARE SET AS APPROPIATE IN
+; THE DRIVERS THAT WANT THE INTERRUPTS ENABLED (NABUKB, TMS).
+;
+; NABU STATUS PORT - STATUS BYTE (INPUT) - PSG PORT B
 ;
 ;	D7 - N.C.
 ;	D6 - Overrun Error (HCCA UART)
@@ -33,91 +36,54 @@ NABU_TICCNT	.EQU	$FFEA		; TICCNT AT $FFEA IS COPIED DOWN TO $000B
 ;
 ; PORTS TO MANAGE PSG
 ;
-NABU_RSEL	.EQU	$41		; SELECT PSG REGISTER
-NABU_RDAT	.EQU	$40		; WRITE TO SELECTED REGISTER
-NABU_RIN	.EQU	$40		; READ FROM SELECTED REGISTER
+NABU_BASE	.EQU	$40		; BASE PORT FOR NABU PSG
+NABU_RSEL	.EQU	NABU_BASE + 1	; SELECT PSG REGISTER
+NABU_RDAT	.EQU	NABU_BASE + 0	; WRITE TO SELECTED REGISTER
+NABU_RIN	.EQU	NABU_BASE + 0	; READ FROM SELECTED REGISTER
 ;
 	DEVECHO	"NABU: IO="
-	DEVECHO	NABU_INT1CLR
+	DEVECHO	NABU_BASE
 	DEVECHO	"\n"
 ;
-;
 ; HARDWARE RESET PRIOR TO ROMWBW CONSOLE INITIALIZATION
 ;
 NABU_PREINIT:
-	; INITIALIZE THE NABU PSG I/O PORTS
-	; PORT A IN WRITE MODE AND SET ALL BITS TO ZERO
-	; PORT B IN READ MODE
-;
-	CALL	NABU_SETPSG	
 ;
-;#IF (INTMODE == 1)
-;	; ADD TO INTERRUPT CHAIN
-;	LD	HL,NABU_STAT
-;	CALL	HB_ADDIM1		; ADD TO IM1 CALL LIST
-;#ENDIF
+	; RESET SHADOW REGISTER IN CASE WE ARE DOING AN HBIOS
+	; RESTART IN PLACE
+	XOR	A			; ALL INTERRUPTS DISABLED
+	LD	(NABU_CTLVAL),A		; SAVE IT
 ;
-;#IF (INTMODE == 2)
-;	LD	HL,NABU_STAT
-;	LD	(IVT(INT_NABUKB)),HL	; IVT INDEX
-;#ENDIF
-;	RET
-;
-NABU_INIT:
-	CALL	NEWLINE			; FORMATTING
-	PRTS("NABU: INT1$")
-;	XOR	A
-;	OUT	(NABU_INT1CLR),A
-	RET				; DONE
+	; INITIALIZE THE NABU PSG I/O PORTS
+	; PORT A (CONTROL PORT) IN WRITE MODE
+	; PORT B (STATUS PORT) IN READ MODE
+	; INITIALIZE THE CONTROL REGISTER
 ;
-NABU_SETPSG:
 	; SET I/O PORT MODES
 	LD	A,7			; PSG R7 (ENABLE REG)
 	OUT	(NABU_RSEL),A		; SELECT IT
-	LD	A,%01111111		; PORT B INPUT, PORT A OUPUT
+	LD	A,%01111111		; PORT B INPUT, PORT A OUPUT, AUDIO CHANNELS DISABLED
 	OUT	(NABU_RDAT),A		; SET IT
 ;
-	; SET PORT A TO VALUE 0
+	; INITIALIZE PORT A VALUE
 	LD	A,14			; PSG R14 (PORT A DATA)
 	OUT	(NABU_RSEL),A		; SELECT IT
-#IF (INTMODE > 0)
-  #IF (TMSTIMENABLE == TRUE)
-	LD	A,%00110000		; ENABLE NABU KB & VDP INTS
-  #ELSE
-	LD	A,%00100000		; ENABLE NABU KB INTS
-  #ENDIF
-#ELSE
-	XOR	A
-#ENDIF
-	OUT	(NABU_RDAT),A		; SET IT
+	LD	A,(NABU_CTLVAL)		; GET CTL VALUE SHADOW REG
+	OUT	(NABU_RDAT),A		; WRITE TO HARDWARE
+;
+	XOR	A			; SIGNAL SUCCESS
+	RET				; DONE
+;
+; POST CONSOLE INITIALIZATION
+;
+NABU_INIT:
+	CALL	NEWLINE			; FORMATTING
+	PRTS("NABU: IO=$")
+	LD	A,NABU_BASE
+	CALL	PRTHEXBYTE
+	XOR	A			; SIGNAL SUCCESS
+	RET				; DONE
 ;
-	LD	A,15
-	OUT	(NABU_RSEL),A
-	IN	A,(NABU_RIN)
-	RET
-;
-;  INTERRUPT ENTRY POINT
-;
-NABU_STAT:
-;	CALL	NABU_SETPSG
-;	XOR	A
-;	OUT	(NABU_INT1CLR),A	; CLEAR THE INTERRUPT
-	LD	HL,(NABU_TICCNT)	; INCREMENT NABU TICK COUNTER
-	
-	
-	INC	HL			; ... IN HBIOS PROXY
-	LD	(NABU_TICCNT),HL
-;	LD	A,(NABU_HBTICK)		; INCREMENT INTERNAL TICK CTR
-;	INC	A
-;	LD	(NABU_HBTICK),A
-;	CP	$0A			; CALL HB_TICK EVERY 10 INTERRUPTS (50HZ)
-;	RET	NZ			; NOT TIME THEN JUST RETURN
-	CALL	HB_TICK			; DO NORMAL HBIOS TICK
-	XOR	A
-;	LD	(NABU_HBTICK),A		; RESET HBTICK COUNTER
-	INC	A			; INTERRUPT HANDLED
-	RET
-;
-NABU_HBTICK:
-	.DB	0			; INTERNAL TICK CTR
+; DATA STORAGE
 ;
+NABU_CTLVAL	.DB	0		; SHADOW VAL FOR NABU CONTROL REGISTER
diff --git a/Source/HBIOS/nabukb.asm b/Source/HBIOS/nabukb.asm
index 5d949032..0f5e2205 100644
--- a/Source/HBIOS/nabukb.asm
+++ b/Source/HBIOS/nabukb.asm
@@ -21,28 +21,6 @@
 ; WILL TRANSLATE SPECIAL KEYS ($E0-$FF) TO ROMWBW EQUIVALENTS.  ALL
 ; OTHER KEYS WILL BE PASSED THROUGH AS IS.
 ;
-; KBPORT EQU	$90
-;
-; POLL FOR INPUT
-; KBLOOP:
-;	IN	A,(KBPORT+1)
-;	BIT	1,A    
-;	JR	Z,KBLOOP
-;	IN	A,(KBPORT)
-;
-; INIT:
-;	XOR	A
-;	CALL	SUB12
-;	CALL	SUB12
-;	CALL	SUB12
-;	CALL	SUB12
-;	CALL	SUB12
-;	LD	A,40H
-;	CALL	SUB12
-;	LD	A,4EH
-;	CALL	SUB12
-;	LD	A,04H
-;	CALL	SUB12
 ;
 NABUKB_IODAT	.EQU	$90		; KEYBOARD DATA (READ)
 NABUKB_IOSTAT	.EQU	$91		; STATUS (READ), CMD (WRITE)
@@ -51,22 +29,6 @@ NABUKB_IOSTAT	.EQU	$91		; STATUS (READ), CMD (WRITE)
 	DEVECHO	NABUKB_IODAT
 	DEVECHO	"\n"
 ;
-; SETUP INTERRUPT HANDLING, IF ENABLED
-;
-NABUKB_PREINIT:
-#IF (INTMODE == 1)
-	; ADD TO INTERRUPT CHAIN
-	LD	HL,NABUKB_INT
-	CALL	HB_ADDIM1		; ADD TO IM1 CALL LIST
-#ENDIF
-;
-#IF (INTMODE == 2)
-	; INSTALL VECTOR
-	LD	HL,NABUKB_INT
-	LD	(IVT(INT_NABUKB)),HL	; IVT INDEX
-#ENDIF
-	RET
-;
 ; INITIALZIZE THE KEYBOARD CONTROLLER.
 ;
 NABUKB_INIT:
@@ -87,6 +49,26 @@ NABUKB_INIT:
 	CALL	NABUKB_PUT
 	LD	A,$04		; ENABLE RECV
 	CALL	NABUKB_PUT
+;
+#IF (INTMODE == 1)
+	; ADD TO INTERRUPT CHAIN
+	LD	HL,NABUKB_INT
+	CALL	HB_ADDIM1		; ADD TO IM1 CALL LIST
+#ENDIF
+;
+#IF (INTMODE == 2)
+	; INSTALL VECTOR
+	LD	HL,NABUKB_INT
+	LD	(IVT(INT_NABUKB)),HL	; IVT INDEX
+#ENDIF
+;
+	; ENABLE KEYBOARD INTERRUPTS ON NABU INTERRUPT CONTROLLER
+	LD	A,14			; PSG R14 (PORT A DATA)
+	OUT	(NABU_RSEL),A		; SELECT IT
+	LD	A,(NABU_CTLVAL)		; GET NABU CTL PORT SHADOW REG
+	SET	5,A			; ENABLE VDP INTERRUPTS
+	LD	(NABU_CTLVAL),A		; UPDATE SHADOW REG
+	OUT	(NABU_RDAT),A		; WRITE TO HARDWARE
 ;
 	XOR	A
 	RET
diff --git a/Source/HBIOS/sd.asm b/Source/HBIOS/sd.asm
index f96abca5..aa77ef6e 100644
--- a/Source/HBIOS/sd.asm
+++ b/Source/HBIOS/sd.asm
@@ -294,7 +294,7 @@ SD_CS1		.EQU	%00010000	; IN/OUT:SD_OPREG:4 = CS1, SDCARD1 CS, IN=1 Card present
   #ENDIF
 SD_IOBASE	.EQU	SD_BASE		; IOBASE
 SD_INVCS	.EQU	FALSE		; INVERT CS
-		DEVECHO	"DUO"
+		DEVECHO	"MT"
 #ENDIF
 ;
 ;
diff --git a/Source/HBIOS/tms.asm b/Source/HBIOS/tms.asm
index 7b0d7815..e8fbbf40 100644
--- a/Source/HBIOS/tms.asm
+++ b/Source/HBIOS/tms.asm
@@ -179,10 +179,8 @@ NABUKBENABLE	.SET	TRUE		; INCLUDE NABU KEYBOARD SUPPORT
 ;======================================================================
 ;
 TMS_PREINIT:
-#IF (NABUKBENABLE == TRUE)
-	CALL NABUKB_PREINIT
-#ENDIF
-	; DISABLE INTERRUPT GENERATION
+	; DISABLE INTERRUPT GENERATION UNTIL AFTER INTERRUPT HANDLER
+	; HAS BEEN INSTALLED.
 	LD	A, (TMS_INITVDU_REG_1)
         RES	TMSINTEN, A             ; RESET INTERRUPT ENABLE BIT
 	LD	(TMS_INITVDU_REG_1), A
@@ -228,10 +226,10 @@ TMS_INIT:
 	PRTS("COLECO$")
 #ENDIF
 #IF (TMSMODE == TMSMODE_MSXKBD)
-	PRTS("RCKBD$")
+	PRTS("MSXKBD$")
 #ENDIF
 #IF (TMSMODE == TMSMODE_MSX9958)
-	PRTS("RC_V9958$")
+	PRTS("MSXV9958$")
 #ENDIF
 #IF (TMSMODE == TMSMODE_NABU40)
 	PRTS("NABU-40$")
@@ -255,16 +253,16 @@ TMS_INIT1:
 	CALL 	TMS_CRTINIT		; SETUP THE TMS CHIP REGISTERS
 	CALL	TMS_LOADFONT		; LOAD FONT DATA FROM ROM TO TMS STRORAGE
 	CALL	TMS_CLEAR		; CLEAR SCREEN, HOME CURSOR
-#IF (TMSMODE == TMSMODE_N8)
+#IF (PPKENABLE)
 	CALL	PPK_INIT		; INITIALIZE PPI KEYBOARD DRIVER
 #ENDIF
-#IF ((TMSMODE == TMSMODE_MSXKBD) | (TMSMODE == TMSMODE_MBC) | (TMSMODE == TMSMODE_DUO))
+#IF (KBDENABLE)
 	CALL	KBD_INIT		; INITIALIZE 8242 KEYBOARD DRIVER
 #ENDIF
-#IF MKYENABLE
+#IF (MKYENABLE)
 	CALL	MKY_INIT		; INITIALIZE MKY KEYBOARD DRIVER
 #ENDIF
-#IF ((TMSMODE == TMSMODE_NABU40) | (TMSMODE == TMSMODE_NABU80))
+#IF (NABUKBENABLE)
 	CALL	NABUKB_INIT		; INITIALIZE NABU KEYBOARD DRIVER
 #ENDIF
 
@@ -280,14 +278,24 @@ TMS_INIT1:
 	LD	(IVT(INT_VDP)),HL	; IVT INDEX
   #ENDIF
 ;
+	; ENABLE VDP INTERRUPTS NOW
 	LD	A, (TMS_INITVDU_REG_1)
 	SET	TMSINTEN,A		; SET INTERRUPT ENABLE BIT
 	LD	(TMS_INITVDU_REG_1),A
 	LD	C, TMSCTRL1
 	CALL	TMS_SET
+;
+  #IF ((TMSMODE == TMSMODE_NABU40) | (TMSMODE == TMSMODE_NABU80))
+	; ENABLE VDP INTERRUPTS ON NABU INTERRUPT CONTROLLER
+	LD	A,14			; PSG R14 (PORT A DATA)
+	OUT	(NABU_RSEL),A		; SELECT IT
+	LD	A,(NABU_CTLVAL)		; GET NABU CTL PORT SHADOW REG
+	SET	4,A			; ENABLE VDP INTERRUPTS
+	LD	(NABU_CTLVAL),A		; UPDATE SHADOW REG
+	OUT	(NABU_RDAT),A		; WRITE TO HARDWARE
+  #ENDIF
 ;
 #ENDIF
-
 ;
 	; ADD OURSELVES TO VDA DISPATCH TABLE
 	LD	BC,TMS_FNTBL		; BC := FUNCTION TABLE ADDRESS
@@ -320,38 +328,37 @@ TMS_FNTBL:
 	.DW	TMS_VDAFIL
 	.DW	TMS_VDACPY
 	.DW	TMS_VDASCR
-#IF (TMSMODE == TMSMODE_N8)
+#IF (PPKENABLE)
 	.DW	PPK_STAT
 	.DW	PPK_FLUSH
 	.DW	PPK_READ
 #ENDIF
-#IF  ((TMSMODE == TMSMODE_MSXKBD) | (TMSMODE == TMSMODE_MBC) | (TMSMODE == TMSMODE_DUO))
+#IF (KBDENABLE)
   	.DW	KBD_STAT
   	.DW	KBD_FLUSH
   	.DW	KBD_READ
 #ENDIF
-#IF ((TMSMODE == TMSMODE_NABU40) | (TMSMODE == TMSMODE_NABU80))
+#IF (MKYENABLE)
+  	.DW	MKY_STAT
+  	.DW	MKY_FLUSH
+  	.DW	MKY_READ
+#ENDIF
+#IF (NABUKBENABLE)
 	.DW	NABUKB_STAT
 	.DW	NABUKB_FLUSH
 	.DW	NABUKB_READ
 #ENDIF
-#IF ((TMSMODE == TMSMODE_MSX) | (TMSMODE == TMSMODE_MSX9958) | (TMSMODE == TMSMODE_SCG) | (TMSMODE == TMSMODE_COLECO))
-  #IF MKYENABLE
-  	.DW	MKY_STAT
-  	.DW	MKY_FLUSH
-  	.DW	MKY_READ
-  #ELSE
+#IF ((!PPKENABLE) & (!KBDENABLE) & (!NABUKBENABLE) & (!MKYENABLE))
   	.DW	TMS_STAT
   	.DW	TMS_FLUSH
   	.DW	TMS_READ
-  #ENDIF
 #ENDIF
 	.DW	TMS_VDARDC
 #IF (($ - TMS_FNTBL) != (VDA_FNCNT * 2))
 	.ECHO	"*** INVALID TMS FUNCTION TABLE ***\n"
 	!!!!!
 #ENDIF
-
+;
 TMS_VDAINI:
 	; RESET VDA
 	; CURRENTLY IGNORES VIDEO MODE AND BITMAP DATA
@@ -359,7 +366,7 @@ TMS_VDAINI:
 	CALL	TMS_CLEAR		; CLEAR SCREEN
 	XOR	A			; SIGNAL SUCCESS
 	RET
-
+;
 TMS_VDAQRY:
 	LD	C,$00			; MODE ZERO IS ALL WE KNOW
 	LD	D,TMS_ROWS		; ROWS
@@ -367,7 +374,7 @@ TMS_VDAQRY:
 	LD	HL,0			; EXTRACTION OF CURRENT BITMAP DATA NOT SUPPORTED YET
 	XOR	A			; SIGNAL SUCCESS
 	RET
-
+;
 TMS_VDARES:
 #IF (CPUFAM == CPU_Z180)
 	CALL	TMS_Z180IO
diff --git a/Source/ver.inc b/Source/ver.inc
index 975e9f51..ce07b958 100644
--- a/Source/ver.inc
+++ b/Source/ver.inc
@@ -2,7 +2,7 @@
 #DEFINE	RMN	5
 #DEFINE	RUP	0
 #DEFINE	RTP	0
-#DEFINE BIOSVER	"3.5.0-dev.41"
+#DEFINE BIOSVER	"3.5.0-dev.42"
 #define rmj	RMJ
 #define rmn	RMN
 #define rup	RUP
diff --git a/Source/ver.lib b/Source/ver.lib
index b218756d..ed3a01a1 100644
--- a/Source/ver.lib
+++ b/Source/ver.lib
@@ -3,5 +3,5 @@ rmn	equ	5
 rup	equ	0
 rtp	equ	0
 biosver	macro
-	db	"3.5.0-dev.41"
+	db	"3.5.0-dev.42"
 	endm