From f52004b20e2ec2245ef6de051f8f2bd912bfe0b0 Mon Sep 17 00:00:00 2001 From: Andrew Cooper Date: Tue, 19 Nov 2024 21:50:25 +0000 Subject: [PATCH] x86/ucode: Only rescan features on successful microcode load There's no point rescanning if we didn't load something new. Take the opportunity to make the comment a bit more concise. Signed-off-by: Andrew Cooper Reviewed-by: Jan Beulich --- xen/arch/x86/cpu/microcode/core.c | 18 +++++------------- 1 file changed, 5 insertions(+), 13 deletions(-) diff --git a/xen/arch/x86/cpu/microcode/core.c b/xen/arch/x86/cpu/microcode/core.c index 4811b5ffb11c..87283cff1de4 100644 --- a/xen/arch/x86/cpu/microcode/core.c +++ b/xen/arch/x86/cpu/microcode/core.c @@ -860,6 +860,10 @@ static int __init early_microcode_load(struct boot_info *bi) rc = ucode_ops.apply_microcode(patch, 0); + if ( rc == 0 ) + /* Rescan CPUID/MSR features, which may have changed after a load. */ + early_cpu_init(false); + unmap: bootstrap_unmap(); @@ -869,7 +873,6 @@ static int __init early_microcode_load(struct boot_info *bi) int __init early_microcode_init(struct boot_info *bi) { const struct cpuinfo_x86 *c = &boot_cpu_data; - int rc = 0; switch ( c->x86_vendor ) { @@ -909,16 +912,5 @@ int __init early_microcode_init(struct boot_info *bi) return -ENODEV; } - rc = early_microcode_load(bi); - - /* - * Some CPUID leaves and MSRs are only present after microcode updates - * on some processors. We take the chance here to make sure what little - * state we have already probed is re-probed in order to ensure we do - * not use stale values. tsx_init() in particular needs to have up to - * date MSR_ARCH_CAPS. - */ - early_cpu_init(false); - - return rc; + return early_microcode_load(bi); }