.pre-commit-config.yaml

repos:
  - repo: https://github.com/pre-commit/pre-commit-hooks
    rev: v4.4.0
    hooks:
      - id: check-symlinks
      - id: destroyed-symlinks
      - id: trailing-whitespace
      - id: end-of-file-fixer
        exclude: |
          (?x)(
            \.svg$|
            \.patch$|
            verilog_rules.md$
          )
      - id: check-yaml
      - id: check-toml
      - id: check-ast
      - id: check-added-large-files
      - id: check-merge-conflict
      - id: check-executables-have-shebangs
      - id: check-shebang-scripts-are-executable
      - id: detect-private-key
      - id: debug-statements
      - id: mixed-line-ending

  # Format Python files
  - repo: https://github.com/psf/black-pre-commit-mirror
    rev: 24.8.0
    hooks:
      - id: black
        language_version: python3.12

  # Format Bazel files
  - repo: https://github.com/warchant/pre-commit-buildifier
    rev: 0.1.1
    hooks:
    -   id: buildifier
        args: [--version, "v7.3.1", -mode=fix]
        exclude: \.patch$

  - repo: https://github.com/mgottscho/verible-py.git
    rev: v0.0-3824
    hooks:
      # Format Verilog files
      - id: verible-verilog-format
        args: [--inplace]
        # Skip ChipStack-generated files
        exclude: ^.*/fpv/
      # Style lint Verilog files
      - id: verible-verilog-lint
        args: [--ruleset=default]
        # Skip ChipStack-generated files
        exclude: ^.*/fpv/