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Merge pull request #18 from yomaytk/bugfix
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Fix debug function and stdout with the invalid timing (temporary patch).
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yomaytk authored Mar 10, 2024
2 parents e6279f4 + 08fc60a commit 9f3e160
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Showing 20 changed files with 155 additions and 124 deletions.
2 changes: 1 addition & 1 deletion backend/remill/include/remill/BC/HelperMacro.h
Original file line number Diff line number Diff line change
Expand Up @@ -4,4 +4,4 @@
// #define LIFT_CALLSTACK_DEBUG 1
// #define LIFT_INSN_DEBUG 1
// #define ELFCONV_SYSCALL_DEBUG 1
// #define TEST_MODE 1
// #define WARNING_OUTPUT 1
2 changes: 1 addition & 1 deletion backend/remill/include/remill/BC/InstructionLifter.h
Original file line number Diff line number Diff line change
Expand Up @@ -180,7 +180,7 @@ class InstructionLifter : public InstructionLifterIntf {
class Impl;

const std::unique_ptr<Impl> impl;
const std::string debug_memory_name;
const std::string debug_memory_value_change_name;
const std::string debug_insn_name;
};

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14 changes: 10 additions & 4 deletions backend/remill/include/remill/BC/TraceLifter.h
Original file line number Diff line number Diff line change
Expand Up @@ -98,6 +98,8 @@ class TraceManager {
std::vector<llvm::Constant *> g_block_address_vmas_array;
std::vector<llvm::Constant *> g_block_address_size_array;
std::vector<llvm::Constant *> g_block_address_fn_vma_array;

uint64_t _io_file_xsputn_vma = 0;
};

// Implements a recursive decoder that lifts a trace of instructions to bitcode.
Expand Down Expand Up @@ -145,9 +147,10 @@ class TraceLifter::Impl {
max_inst_bytes(arch->MaxInstructionSize(arch->CreateInitialContext())),
indirectbr_block_name("L_indirectbr"),
g_get_jmp_block_address_func_name("__g_get_indirectbr_block_address"),
debug_memory_name("debug_memory"),
debug_memory_value_change_name("debug_memory_value_change"),
debug_insn_name("debug_insn"),
debug_call_stack_name("debug_call_stack") {
debug_call_stack_push_name("debug_call_stack_push"),
debug_call_stack_pop_name("debug_call_stack_pop") {
inst_bytes.reserve(max_inst_bytes);
}

Expand Down Expand Up @@ -235,9 +238,12 @@ class TraceLifter::Impl {

std::string indirectbr_block_name;
std::string g_get_jmp_block_address_func_name;
std::string debug_memory_name;
std::string debug_memory_value_change_name;
std::string debug_insn_name;
std::string debug_call_stack_name;
std::string debug_call_stack_push_name;
std::string debug_call_stack_pop_name;

bool tmp_patch_fn_check = false;
};

} // namespace remill
4 changes: 2 additions & 2 deletions backend/remill/include/remill/BC/Util.h
Original file line number Diff line number Diff line change
Expand Up @@ -76,11 +76,11 @@ llvm::CallInst *AddCall(llvm::BasicBlock *source_block, llvm::Value *dest_func,

// Create a tail-call from one lifted function to another.
llvm::CallInst *AddTerminatingTailCall(llvm::Function *source_func, llvm::Value *dest_func,
const IntrinsicTable &intrinsics,
const IntrinsicTable &intrinsics, const uint64_t fn_vma,
llvm::Value *pc_value = nullptr);

llvm::CallInst *AddTerminatingTailCall(llvm::BasicBlock *source_block, llvm::Value *dest_func,
const IntrinsicTable &intrinsics,
const IntrinsicTable &intrinsics, const uint64_t fn_vma,
llvm::Value *pc_value = nullptr);

// Find a local variable defined in the entry block of the function. We use
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5 changes: 5 additions & 0 deletions backend/remill/lib/Arch/AArch64/Arch.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -29,6 +29,7 @@
#include <llvm/IR/Module.h>
#include <map>
#include <memory>
#include <remill/BC/HelperMacro.h>
#include <sstream>
#include <string>

Expand Down Expand Up @@ -804,7 +805,9 @@ bool AArch64Arch::ArchDecodeInstruction(uint64_t address, std::string_view inst_
return false;
} else if (!aarch64::TryExtract(bytes, dinst)) {
inst.category = Instruction::kCategoryInvalid;
#if defined(WARNING_OUTPUT)
printf("[WARNING] Unsupported instruction at address: 0x%08lx (TryExtract)\n", address);
#endif
return false;
}

Expand All @@ -821,8 +824,10 @@ bool AArch64Arch::ArchDecodeInstruction(uint64_t address, std::string_view inst_
/* set operands of insn */
if (!aarch64::TryDecode(dinst, inst)) {
inst.category = Instruction::kCategoryInvalid;
#if defined(WARNING_OUTPUT)
printf("[WARNING] Unsupported instruction at address: 0x%08lx (TryDecode), instForm: %s\n",
address, inst.function.c_str());
#endif
return false;
}

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3 changes: 3 additions & 0 deletions backend/remill/lib/Arch/AArch64/Extract.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -17,6 +17,7 @@
#include "Decode.h"

#include <stdio.h>
#include <remill/BC/HelperMacro.h>

namespace remill {
namespace aarch64 {
Expand Down Expand Up @@ -76980,7 +76981,9 @@ const char *InstFormToString(InstForm iform) {
if (iform == InstForm::INVALID) {
return nullptr;
} else if (static_cast<uint16_t>(InstForm::WHILELO_PREDICATE) < num) {
#if defined(WARNING_OUTPUT)
printf("[WARNING] failed to convert iform \"%d\" to InstForm value.\n", num);
#endif
return nullptr;
} else {
return kIFormName[num];
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10 changes: 0 additions & 10 deletions backend/remill/lib/Arch/AArch64/Semantics/BRANCH.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -138,8 +138,6 @@ DEF_SEM(DoIndirectBranch, S dst) {

template <bool (*check_cond)(const State &)>
DEF_SEM(DirectCondBranch, R8W cond, PC taken, PC not_taken) {
addr_t taken_pc = Read(taken);
addr_t not_taken_pc = Read(not_taken);
uint8_t take_branch = check_cond(state);
Write(cond, take_branch);

Expand All @@ -148,8 +146,6 @@ DEF_SEM(DirectCondBranch, R8W cond, PC taken, PC not_taken) {

template <typename S>
DEF_SEM(CBZ, R8W cond, PC taken, PC not_taken, S src) {
addr_t taken_pc = Read(taken);
addr_t not_taken_pc = Read(not_taken);
uint8_t take_branch = UCmpEq(Read(src), 0);
Write(cond, take_branch);

Expand All @@ -158,8 +154,6 @@ DEF_SEM(CBZ, R8W cond, PC taken, PC not_taken, S src) {

template <typename S>
DEF_SEM(CBNZ, R8W cond, PC taken, PC not_taken, S src) {
addr_t taken_pc = Read(taken);
addr_t not_taken_pc = Read(not_taken);
uint8_t take_branch = UCmpNeq(Read(src), 0);
Write(cond, take_branch);

Expand All @@ -169,8 +163,6 @@ DEF_SEM(CBNZ, R8W cond, PC taken, PC not_taken, S src) {

template <typename S>
DEF_SEM(TBZ, I8 bit_pos, R8W cond, PC taken, PC not_taken, S src) {
addr_t taken_pc = Read(taken);
addr_t not_taken_pc = Read(not_taken);
auto bit_n = ZExtTo<S>(Read(bit_pos));
auto reg_val = ZExtTo<S>(Read(src));
auto bit_set = UAnd(reg_val, UShl(ZExtTo<S>(1), bit_n));
Expand All @@ -182,8 +174,6 @@ DEF_SEM(TBZ, I8 bit_pos, R8W cond, PC taken, PC not_taken, S src) {

template <typename S>
DEF_SEM(TBNZ, I8 bit_pos, R8W cond, PC taken, PC not_taken, S src) {
addr_t taken_pc = Read(taken);
addr_t not_taken_pc = Read(not_taken);
auto bit_n = ZExtTo<S>(Read(bit_pos));
auto reg_val = ZExtTo<S>(Read(src));
auto bit_set = UAnd(reg_val, UShl(ZExtTo<S>(1), bit_n));
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5 changes: 0 additions & 5 deletions backend/remill/lib/Arch/AArch64/Semantics/CALL_RET.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -19,18 +19,13 @@ namespace {
template <typename S>
DEF_SEM(CALL, S target_addr, PC ret_addr) {
const auto return_pc = Read(ret_addr);
const auto new_pc = Read(target_addr);
Write(REG_LP, return_pc);
// Write(REG_PC, new_pc);
// Write(dst_pc, new_pc);
// Write(return_pc_dst, return_pc);
return memory;
}

DEF_SEM(RET, R64 target_pc) {
const auto new_pc = Read(target_pc);
Write(REG_PC, new_pc);
// Write(dst_pc, new_pc);
return memory;
}

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2 changes: 1 addition & 1 deletion backend/remill/lib/Arch/AArch64/Semantics/CONVERT.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -60,7 +60,7 @@ DEF_SEM(UCVTF_Uint64ToFloat64_FROMV, V128W dst, V128 src) {
auto src_vec = UReadV64(src);
float64v2_t tmp_vec = {};
_Pragma("unroll") for (size_t i = 0; i < NumVectorElems(src_vec); i++) {
tmp_vec.elems[i] = CheckedCast<int64_t, float64_t>(state, UExtractV64(src_vec, i));
tmp_vec.elems[i] = CheckedCast<uint64_t, float64_t>(state, UExtractV64(src_vec, i));
}
FWriteV64(dst, tmp_vec);
return memory;
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15 changes: 0 additions & 15 deletions backend/remill/lib/Arch/AArch64/Semantics/MISC.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -18,14 +18,6 @@

extern "C" void debug_state_machine();

// #define LIFT_UNDEFINSN_DEBUG 1

#if defined(LIFT_UNDEFINSN_DEBUG)
# define UNDEF_INSN_PRINT(name) \
printf("[WARNING] reach the instruction ( " #name " ) whose semantic is not defined.\n");
#else
# define UNDEF_INSN_PRINT(name) ;
#endif
namespace {

DEF_SEM(DoNOP) {
Expand All @@ -46,37 +38,30 @@ DEF_ISEL(PRFM_P_LDST_POS) = DoNOP;
namespace {

DEF_SEM(UNDEF_CNT_ASIMDMISC_R) {
UNDEF_INSN_PRINT(CNT_ASIMDMISC_R);
return memory;
}

DEF_SEM(UNDEF_CMGE_ASISDMISC_Z) {
UNDEF_INSN_PRINT(CMGE_ASISDMISC_Z);
return memory;
}

DEF_SEM(UNDEF_CNTB_X64_BITCOUNT) {
UNDEF_INSN_PRINT(CNTB_X64_BITCOUNT);
return memory;
}

DEF_SEM(UNDEF_CNTD_X64_BITCOUNT) {
UNDEF_INSN_PRINT(CNTD_X64_BITCOUNT);
return memory;
}

DEF_SEM(UNDEF_CNTH_X64_BITCOUNT) {
UNDEF_INSN_PRINT(CNTH_X64_BITCOUNT);
return memory;
}

DEF_SEM(UNDEF_CNTW_X64_BITCOUNT) {
UNDEF_INSN_PRINT(CNTW_X64_BITCOUNT);
return memory;
}

DEF_SEM(UNDEF_WHILELO_PREDICATE) {
UNDEF_INSN_PRINT(WHILELO_PREDICATE);
return memory;
}

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10 changes: 6 additions & 4 deletions backend/remill/lib/BC/InstructionLifter.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -63,7 +63,7 @@ InstructionLifter::~InstructionLifter(void) {}

InstructionLifter::InstructionLifter(const Arch *arch_, const IntrinsicTable *intrinsics_)
: impl(new Impl(arch_, intrinsics_)),
debug_memory_name("debug_memory"),
debug_memory_value_change_name("debug_memory_value_change"),
debug_insn_name("debug_insn") {}

// Lift a single instruction into a basic block. `is_delayed` signifies that
Expand Down Expand Up @@ -103,9 +103,11 @@ LiftStatus InstructionLifter::LiftIntoBlock(Instruction &arch_inst, llvm::BasicB
isel_func = impl->unsupported_instruction;
arch_inst.operands.clear();
status = kLiftedUnsupportedInstruction;
#if defined(WARNING_OUTPUT)
printf(
"[WARNING] Unsupported instruction at address: 0x%08lx (SemanticsFunction), instForm: %s\n",
arch_inst.pc, arch_inst.function.c_str());
#endif
}

llvm::IRBuilder<> ir(block);
Expand Down Expand Up @@ -210,10 +212,10 @@ LiftStatus InstructionLifter::LiftIntoBlock(Instruction &arch_inst, llvm::BasicB
if (UINT64_MAX != debug_insn_addr) {
llvm::IRBuilder<> __debug_ir(block);
auto _debug_insn_fn = module->getFunction(debug_insn_name);
auto _debug_memory_fn = module->getFunction(debug_memory_name);
CHECK(_debug_insn_fn && _debug_memory_fn);
auto _debug_memory_value_change_fn = module->getFunction(debug_memory_value_change_name);
CHECK(_debug_insn_fn && _debug_memory_value_change_fn);
__debug_ir.CreateCall(_debug_insn_fn);
__debug_ir.CreateCall(_debug_memory_fn);
__debug_ir.CreateCall(_debug_memory_value_change_fn);
}

return status;
Expand Down
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