diff --git a/compilers/concrete-compiler/compiler/include/concretelang/Runtime/simulation.h b/compilers/concrete-compiler/compiler/include/concretelang/Runtime/simulation.h
index 53afd32e13..ca661ef0b2 100644
--- a/compilers/concrete-compiler/compiler/include/concretelang/Runtime/simulation.h
+++ b/compilers/concrete-compiler/compiler/include/concretelang/Runtime/simulation.h
@@ -31,9 +31,10 @@ uint64_t sim_neg_lwe_u64(uint64_t plaintext);
 ///
 /// \param lhs left operand
 /// \param rhs right operand
-/// \param loc
+/// \param loc location of the operation
+/// \param is_signed tell if operands are known to be signed
 /// \return uint64_t
-uint64_t sim_add_lwe_u64(uint64_t lhs, uint64_t rhs, char *loc);
+uint64_t sim_add_lwe_u64(uint64_t lhs, uint64_t rhs, char *loc, bool is_signed);
 
 /// \brief simulate the multiplication of a noisy plaintext with an integer
 ///
@@ -41,9 +42,10 @@ uint64_t sim_add_lwe_u64(uint64_t lhs, uint64_t rhs, char *loc);
 ///
 /// \param lhs left operand
 /// \param rhs right operand
-/// \param loc
+/// \param loc location of the operation
+/// \param is_signed tell if operands are known to be signed
 /// \return uint64_t
-uint64_t sim_mul_lwe_u64(uint64_t lhs, uint64_t rhs, char *loc);
+uint64_t sim_mul_lwe_u64(uint64_t lhs, uint64_t rhs, char *loc, bool is_signed);
 
 /// \brief simulate a keyswitch on a noisy plaintext
 ///
diff --git a/compilers/concrete-compiler/compiler/lib/Conversion/FHEToTFHEScalar/FHEToTFHEScalar.cpp b/compilers/concrete-compiler/compiler/lib/Conversion/FHEToTFHEScalar/FHEToTFHEScalar.cpp
index ae88c00c32..cd0f98918d 100644
--- a/compilers/concrete-compiler/compiler/lib/Conversion/FHEToTFHEScalar/FHEToTFHEScalar.cpp
+++ b/compilers/concrete-compiler/compiler/lib/Conversion/FHEToTFHEScalar/FHEToTFHEScalar.cpp
@@ -180,10 +180,47 @@ struct AddEintIntOpPattern : public ScalarOpPattern<FHE::AddEintIntOp> {
         op.getLoc(), adaptor.getB(),
         op.getType().cast<FHE::FheIntegerInterface>().getWidth(), rewriter);
 
+    auto isSigned = op.getType().cast<FHE::FheIntegerInterface>().isSigned();
+    std::vector<mlir::NamedAttribute> attrs;
+    if (isSigned) {
+      auto signedAttr =
+          rewriter.getNamedAttr("signed", rewriter.getBoolAttr(isSigned));
+      attrs.push_back(signedAttr);
+    }
+
     // Write the new op
     auto newOp = rewriter.replaceOpWithNewOp<TFHE::AddGLWEIntOp>(
-        op, getTypeConverter()->convertType(op.getType()), adaptor.getA(),
-        encodedInt);
+        op, getTypeConverter()->convertType(op.getType()),
+        mlir::ValueRange({adaptor.getA(), encodedInt}), attrs);
+    forwardOptimizerID(op, newOp);
+
+    return mlir::success();
+  }
+};
+
+/// Rewriter for the `FHE::add_eint` operation.
+struct AddEintOpPattern : public mlir::OpConversionPattern<FHE::AddEintOp> {
+  AddEintOpPattern(mlir::TypeConverter &converter, mlir::MLIRContext *context,
+                   mlir::PatternBenefit benefit = 1)
+      : mlir::OpConversionPattern<FHE::AddEintOp>(converter, context, benefit) {
+  }
+
+  mlir::LogicalResult
+  matchAndRewrite(FHE::AddEintOp op, FHE::AddEintOp::Adaptor adaptor,
+                  mlir::ConversionPatternRewriter &rewriter) const override {
+
+    auto isSigned = op.getType().cast<FHE::FheIntegerInterface>().isSigned();
+    std::vector<mlir::NamedAttribute> attrs;
+    if (isSigned) {
+      auto signedAttr =
+          rewriter.getNamedAttr("signed", rewriter.getBoolAttr(isSigned));
+      attrs.push_back(signedAttr);
+    }
+
+    // Write the new op
+    auto newOp = rewriter.replaceOpWithNewOp<TFHE::AddGLWEOp>(
+        op, getTypeConverter()->convertType(op.getType()),
+        adaptor.getOperands(), attrs);
     forwardOptimizerID(op, newOp);
 
     return mlir::success();
@@ -220,10 +257,18 @@ struct SubEintIntOpPattern : public ScalarOpPattern<FHE::SubEintIntOp> {
         eintOperand.getType().cast<FHE::FheIntegerInterface>().getWidth(),
         rewriter);
 
+    auto isSigned = op.getType().cast<FHE::FheIntegerInterface>().isSigned();
+    std::vector<mlir::NamedAttribute> attrs;
+    if (isSigned) {
+      auto signedAttr =
+          rewriter.getNamedAttr("signed", rewriter.getBoolAttr(isSigned));
+      attrs.push_back(signedAttr);
+    }
+
     // Write the new op
     auto newOp = rewriter.replaceOpWithNewOp<TFHE::AddGLWEIntOp>(
-        op, getTypeConverter()->convertType(op.getType()), adaptor.getA(),
-        encodedInt);
+        op, getTypeConverter()->convertType(op.getType()),
+        mlir::ValueRange({adaptor.getA(), encodedInt}), attrs);
     forwardOptimizerID(op, newOp);
 
     return mlir::success();
@@ -247,10 +292,18 @@ struct SubIntEintOpPattern : public ScalarOpPattern<FHE::SubIntEintOp> {
         op.getB().getType().cast<FHE::FheIntegerInterface>().getWidth(),
         rewriter);
 
+    auto isSigned = op.getType().cast<FHE::FheIntegerInterface>().isSigned();
+    std::vector<mlir::NamedAttribute> attrs;
+    if (isSigned) {
+      auto signedAttr =
+          rewriter.getNamedAttr("signed", rewriter.getBoolAttr(isSigned));
+      attrs.push_back(signedAttr);
+    }
+
     // Write the new op
     auto newOp = rewriter.replaceOpWithNewOp<TFHE::SubGLWEIntOp>(
-        op, getTypeConverter()->convertType(op.getType()), encodedInt,
-        adaptor.getB());
+        op, getTypeConverter()->convertType(op.getType()),
+        mlir::ValueRange({encodedInt, adaptor.getB()}), attrs);
     forwardOptimizerID(op, newOp);
 
     return mlir::success();
@@ -276,10 +329,18 @@ struct SubEintOpPattern : public ScalarOpPattern<FHE::SubEintOp> {
         location, rhsOperand.getType(), rhsOperand);
     forwardOptimizerID(op, negative);
 
+    auto isSigned = op.getType().cast<FHE::FheIntegerInterface>().isSigned();
+    std::vector<mlir::NamedAttribute> attrs;
+    if (isSigned) {
+      auto signedAttr =
+          rewriter.getNamedAttr("signed", rewriter.getBoolAttr(isSigned));
+      attrs.push_back(signedAttr);
+    }
+
     // Write new op.
     auto newOp = rewriter.replaceOpWithNewOp<TFHE::AddGLWEOp>(
-        op, getTypeConverter()->convertType(op.getType()), lhsOperand,
-        negative.getResult());
+        op, getTypeConverter()->convertType(op.getType()),
+        mlir::ValueRange({lhsOperand, negative.getResult()}), attrs);
     forwardOptimizerID(op, newOp);
 
     return mlir::success();
@@ -305,10 +366,18 @@ struct MulEintIntOpPattern : public ScalarOpPattern<FHE::MulEintIntOp> {
     mlir::Value castedCleartext = rewriter.create<mlir::arith::ExtSIOp>(
         location, rewriter.getIntegerType(64), intOperand);
 
+    auto isSigned = op.getType().cast<FHE::FheIntegerInterface>().isSigned();
+    std::vector<mlir::NamedAttribute> attrs;
+    if (isSigned) {
+      auto signedAttr =
+          rewriter.getNamedAttr("signed", rewriter.getBoolAttr(isSigned));
+      attrs.push_back(signedAttr);
+    }
+
     // Write the new op.
     auto newOp = rewriter.replaceOpWithNewOp<TFHE::MulGLWEIntOp>(
-        op, getTypeConverter()->convertType(op.getType()), eintOperand,
-        castedCleartext);
+        op, getTypeConverter()->convertType(op.getType()),
+        mlir::ValueRange({eintOperand, castedCleartext}), attrs);
     forwardOptimizerID(op, newOp);
 
     return mlir::success();
@@ -804,12 +873,11 @@ struct FHEToTFHEScalarPass : public FHEToTFHEScalarBase<FHEToTFHEScalarPass> {
             FHE::NegEintOp, TFHE::NegGLWEOp, true>,
         //    |_ `FHE::not`
         mlir::concretelang::GenericOneToOneOpConversionPattern<
-            FHE::BoolNotOp, TFHE::NegGLWEOp, true>,
-        //    |_ `FHE::add_eint`
-        mlir::concretelang::GenericOneToOneOpConversionPattern<
-            FHE::AddEintOp, TFHE::AddGLWEOp, true>>(&getContext(), converter);
+            FHE::BoolNotOp, TFHE::NegGLWEOp, true>>(&getContext(), converter);
     //    |_ `FHE::add_eint_int`
     patterns.add<lowering::AddEintIntOpPattern,
+                 //    |_ `FHE::add_eint`
+                 lowering::AddEintOpPattern,
                  //    |_ `FHE::sub_int_eint`
                  lowering::SubIntEintOpPattern,
                  //    |_ `FHE::sub_eint_int`
diff --git a/compilers/concrete-compiler/compiler/lib/Conversion/SimulateTFHE/SimulateTFHE.cpp b/compilers/concrete-compiler/compiler/lib/Conversion/SimulateTFHE/SimulateTFHE.cpp
index 035f9a9da8..f31651f453 100644
--- a/compilers/concrete-compiler/compiler/lib/Conversion/SimulateTFHE/SimulateTFHE.cpp
+++ b/compilers/concrete-compiler/compiler/lib/Conversion/SimulateTFHE/SimulateTFHE.cpp
@@ -92,19 +92,21 @@ struct NegOpPattern : public mlir::OpConversionPattern<TFHE::NegGLWEOp> {
   }
 };
 
+int locationStringCtr = 0;
 mlir::Value globalStringValueFromLoc(mlir::ConversionPatternRewriter &rewriter,
                                      mlir::Location loc) {
   std::string locString;
   auto ros = llvm::raw_string_ostream(locString);
   loc.print(ros);
-
-  std::string msgName;
-  std::stringstream stream;
-  stream << "loc_" << rand();
-  stream >> msgName;
-  return mlir::LLVM::createGlobalString(loc, rewriter, msgName, locString,
-                                        mlir::LLVM::linkage::Linkage::Linkonce,
-                                        false);
+  locString.append("\0");
+  auto locStrWithNullByte =
+      llvm::StringRef(locString.c_str(), locString.size() + 1);
+
+  std::stringstream msgName;
+  msgName << "str_loc_" << locationStringCtr++;
+  return mlir::LLVM::createGlobalString(
+      loc, rewriter, msgName.str(), locStrWithNullByte,
+      mlir::LLVM::linkage::Linkage::Linkonce, false);
 }
 
 template <typename AddOp, typename AddOpAdaptor>
@@ -122,12 +124,21 @@ struct AddOpPattern : public mlir::OpConversionPattern<AddOp> {
     const std::string funcName = "sim_add_lwe_u64";
 
     auto locString = globalStringValueFromLoc(rewriter, addOp.getLoc());
+    // check if operation has been tagged as signed
+    auto isSigned = false;
+    mlir::Attribute signedAttr = adaptor.getAttributes().get("signed");
+    if (signedAttr && signedAttr.cast<mlir::BoolAttr>().getValue()) {
+      isSigned = true;
+    }
+    mlir::Value isSignedCst = rewriter.create<mlir::arith::ConstantIntOp>(
+        addOp.getLoc(), isSigned, 1);
 
     if (insertForwardDeclaration(
             addOp, rewriter, funcName,
             rewriter.getFunctionType(
                 {rewriter.getIntegerType(64), rewriter.getIntegerType(64),
-                 mlir::LLVM::LLVMPointerType::get(rewriter.getI8Type())},
+                 mlir::LLVM::LLVMPointerType::get(rewriter.getI8Type()),
+                 rewriter.getIntegerType(1)},
                 {rewriter.getIntegerType(64)}))
             .failed()) {
       return mlir::failure();
@@ -135,7 +146,8 @@ struct AddOpPattern : public mlir::OpConversionPattern<AddOp> {
 
     rewriter.replaceOpWithNewOp<mlir::func::CallOp>(
         addOp, funcName, mlir::TypeRange{rewriter.getIntegerType(64)},
-        mlir::ValueRange({adaptor.getA(), adaptor.getB(), locString}));
+        mlir::ValueRange(
+            {adaptor.getA(), adaptor.getB(), locString, isSignedCst}));
 
     return mlir::success();
   }
@@ -156,11 +168,21 @@ struct MulOpPattern : public mlir::OpConversionPattern<TFHE::MulGLWEIntOp> {
 
     auto locString = globalStringValueFromLoc(rewriter, mulOp.getLoc());
 
+    // check if operation has been tagged as signed
+    auto isSigned = false;
+    mlir::Attribute signedAttr = adaptor.getAttributes().get("signed");
+    if (signedAttr && signedAttr.cast<mlir::BoolAttr>().getValue()) {
+      isSigned = true;
+    }
+    mlir::Value isSignedCst = rewriter.create<mlir::arith::ConstantIntOp>(
+        mulOp.getLoc(), isSigned, 1);
+
     if (insertForwardDeclaration(
             mulOp, rewriter, funcName,
             rewriter.getFunctionType(
                 {rewriter.getIntegerType(64), rewriter.getIntegerType(64),
-                 mlir::LLVM::LLVMPointerType::get(rewriter.getI8Type())},
+                 mlir::LLVM::LLVMPointerType::get(rewriter.getI8Type()),
+                 rewriter.getIntegerType(1)},
                 {rewriter.getIntegerType(64)}))
             .failed()) {
       return mlir::failure();
@@ -168,7 +190,8 @@ struct MulOpPattern : public mlir::OpConversionPattern<TFHE::MulGLWEIntOp> {
 
     rewriter.replaceOpWithNewOp<mlir::func::CallOp>(
         mulOp, funcName, mlir::TypeRange{rewriter.getIntegerType(64)},
-        mlir::ValueRange({adaptor.getA(), adaptor.getB(), locString}));
+        mlir::ValueRange(
+            {adaptor.getA(), adaptor.getB(), locString, isSignedCst}));
 
     return mlir::success();
   }
@@ -186,8 +209,10 @@ struct SubIntGLWEOpPattern : public mlir::OpRewritePattern<TFHE::SubGLWEIntOp> {
     mlir::Value negated = rewriter.create<TFHE::NegGLWEOp>(
         subOp.getLoc(), subOp.getB().getType(), subOp.getB());
 
-    rewriter.replaceOpWithNewOp<TFHE::AddGLWEIntOp>(subOp, subOp.getType(),
-                                                    negated, subOp.getA());
+    rewriter.replaceOpWithNewOp<TFHE::AddGLWEIntOp>(
+        subOp, subOp.getType(), mlir::ValueRange({negated, subOp.getA()}),
+        // to forward the signed attr if set
+        subOp.getOperation()->getAttrs());
 
     return mlir::success();
   }
diff --git a/compilers/concrete-compiler/compiler/lib/Runtime/simulation.cpp b/compilers/concrete-compiler/compiler/lib/Runtime/simulation.cpp
index f537483141..a9f739d85e 100644
--- a/compilers/concrete-compiler/compiler/lib/Runtime/simulation.cpp
+++ b/compilers/concrete-compiler/compiler/lib/Runtime/simulation.cpp
@@ -189,21 +189,44 @@ void sim_wop_pbs_crt(
 
 uint64_t sim_neg_lwe_u64(uint64_t plaintext) { return ~plaintext + 1; }
 
-uint64_t sim_add_lwe_u64(uint64_t lhs, uint64_t rhs, char *loc) {
-  if (lhs > UINT63_MAX - rhs) {
-    printf("WARNING at %s: overflow happened during addition in simulation\n",
-           loc);
+uint64_t sim_add_lwe_u64(uint64_t lhs, uint64_t rhs, char *loc,
+                         bool is_signed) {
+  const char msg_f[] =
+      "WARNING at %s: overflow happened during addition in simulation\n";
+
+  uint64_t result = lhs + rhs;
+
+  if (is_signed) {
+    int64_t lhs_signed = (int64_t)lhs;
+    int64_t rhs_signed = (int64_t)rhs;
+    if (lhs_signed > 0 && rhs_signed > INT64_MAX - lhs_signed)
+      printf(msg_f, loc);
+    else if (lhs_signed < 0 && rhs_signed < INT64_MIN - lhs_signed)
+      printf(msg_f, loc);
+  } else if (lhs > UINT63_MAX - rhs || result > UINT63_MAX) {
+    printf(msg_f, loc);
   }
-  return lhs + rhs;
+  return result;
 }
 
-uint64_t sim_mul_lwe_u64(uint64_t lhs, uint64_t rhs, char *loc) {
-  if (rhs != 0 && lhs > UINT63_MAX / rhs) {
-    printf("WARNING at %s: overflow happened during multiplication in "
-           "simulation\n",
-           loc);
+uint64_t sim_mul_lwe_u64(uint64_t lhs, uint64_t rhs, char *loc,
+                         bool is_signed) {
+  const char msg_f[] =
+      "WARNING at %s: overflow happened during multiplication in simulation\n";
+
+  uint64_t result = lhs * rhs;
+
+  if (is_signed) {
+    int64_t lhs_signed = (int64_t)lhs;
+    int64_t rhs_signed = (int64_t)rhs;
+    if (lhs_signed != 0 && rhs_signed > INT64_MAX / lhs_signed)
+      printf(msg_f, loc);
+    else if (lhs_signed != 0 && rhs_signed < INT64_MIN / lhs_signed)
+      printf(msg_f, loc);
+  } else if (rhs != 0 && (lhs > UINT63_MAX / rhs || result > UINT63_MAX)) {
+    printf(msg_f, loc);
   }
-  return lhs * rhs;
+  return result;
 }
 
 void sim_encode_expand_lut_for_boostrap(
diff --git a/compilers/concrete-compiler/compiler/lib/Support/Pipeline.cpp b/compilers/concrete-compiler/compiler/lib/Support/Pipeline.cpp
index 22a1bb08b3..45bd663f28 100644
--- a/compilers/concrete-compiler/compiler/lib/Support/Pipeline.cpp
+++ b/compilers/concrete-compiler/compiler/lib/Support/Pipeline.cpp
@@ -440,8 +440,10 @@ mlir::LogicalResult simulateTFHE(mlir::MLIRContext &context,
   if (fheContext) {
     auto solution = fheContext.value().solution;
     auto optCrt = getCrtDecompositionFromSolution(solution);
-    if (optCrt)
+    if (optCrt) {
       enableOverflowDetection = false;
+      log_verbose() << "WARNING: overflow detection disabled since using CRT";
+    }
   }
 
   pipelinePrinting("TFHESimulation", pm, context);
diff --git a/compilers/concrete-compiler/compiler/tests/python/test_simulation.py b/compilers/concrete-compiler/compiler/tests/python/test_simulation.py
index c083d94d2d..b7a507c69e 100644
--- a/compilers/concrete-compiler/compiler/tests/python/test_simulation.py
+++ b/compilers/concrete-compiler/compiler/tests/python/test_simulation.py
@@ -21,7 +21,7 @@ def assert_result(result, expected_result):
     """
     assert type(expected_result) == type(result)
     if isinstance(expected_result, int):
-        assert result == expected_result
+        assert result == expected_result, f"{result} != {expected_result}"
     else:
         assert np.all(result == expected_result)
 
@@ -258,6 +258,186 @@ def test_lib_compile_and_run_simulation(mlir_input, args, expected_result):
         b'WARNING at loc("-":3:22): overflow happened during addition in simulation\n',
         id="add_eint_int",
     ),
+    pytest.param(
+        """
+            func.func @main(%arg0: !FHE.esint<7>, %arg1: i8) -> !FHE.esint<7> {
+                %1 = "FHE.add_eint_int"(%arg0, %arg1): (!FHE.esint<7>, i8) -> (!FHE.esint<7>)
+                return %1: !FHE.esint<7>
+            }
+            """,
+        (-1, -2),
+        -3,
+        b"",
+        id="add_eint_int_signed",
+    ),
+    pytest.param(
+        """
+            func.func @main(%arg0: !FHE.esint<7>, %arg1: i8) -> !FHE.esint<7> {
+                %1 = "FHE.add_eint_int"(%arg0, %arg1): (!FHE.esint<7>, i8) -> (!FHE.esint<7>)
+                return %1: !FHE.esint<7>
+            }
+            """,
+        (-120, -20),
+        -12,  # undefined behavior
+        b'WARNING at loc("-":3:22): overflow happened during addition in simulation\n',
+        id="add_eint_int_signed_underflow",
+    ),
+    pytest.param(
+        """
+            func.func @main(%arg0: !FHE.esint<7>, %arg1: i8) -> !FHE.esint<7> {
+                %1 = "FHE.add_eint_int"(%arg0, %arg1): (!FHE.esint<7>, i8) -> (!FHE.esint<7>)
+                return %1: !FHE.esint<7>
+            }
+            """,
+        (120, 20),
+        -116,
+        b'WARNING at loc("-":3:22): overflow happened during addition in simulation\n',
+        id="add_eint_int_signed_overflow",
+    ),
+    pytest.param(
+        """
+            func.func @main(%arg0: !FHE.eint<7>, %arg1: !FHE.eint<7>) -> !FHE.eint<7> {
+                %1 = "FHE.add_eint"(%arg0, %arg1): (!FHE.eint<7>, !FHE.eint<7>) -> (!FHE.eint<7>)
+                return %1: !FHE.eint<7>
+            }
+            """,
+        (81, 73),
+        154,
+        b'WARNING at loc("-":3:22): overflow happened during addition in simulation\n',
+        id="add_eint",
+    ),
+    pytest.param(
+        """
+            func.func @main(%arg0: !FHE.esint<7>, %arg1: !FHE.esint<7>) -> !FHE.esint<7> {
+                %1 = "FHE.add_eint"(%arg0, %arg1): (!FHE.esint<7>, !FHE.esint<7>) -> (!FHE.esint<7>)
+                return %1: !FHE.esint<7>
+            }
+            """,
+        (-81, 73),
+        -8,
+        b"",
+        id="add_eint_signed",
+    ),
+    pytest.param(
+        """
+            func.func @main(%arg0: !FHE.esint<7>, %arg1: !FHE.esint<7>) -> !FHE.esint<7> {
+                %1 = "FHE.add_eint"(%arg0, %arg1): (!FHE.esint<7>, !FHE.esint<7>) -> (!FHE.esint<7>)
+                return %1: !FHE.esint<7>
+            }
+            """,
+        (-120, -20),
+        -12,  # undefined behavior
+        b'WARNING at loc("-":3:22): overflow happened during addition in simulation\n',
+        id="add_eint_signed_underflow",
+    ),
+    pytest.param(
+        """
+            func.func @main(%arg0: !FHE.esint<7>, %arg1: !FHE.esint<7>) -> !FHE.esint<7> {
+                %1 = "FHE.add_eint"(%arg0, %arg1): (!FHE.esint<7>, !FHE.esint<7>) -> (!FHE.esint<7>)
+                return %1: !FHE.esint<7>
+            }
+            """,
+        (81, 73),
+        -102,
+        b'WARNING at loc("-":3:22): overflow happened during addition in simulation\n',
+        id="add_eint_signed_overflow",
+    ),
+    pytest.param(
+        """
+            func.func @main(%arg0: !FHE.eint<7>, %arg1: i8) -> !FHE.eint<7> {
+                %1 = "FHE.sub_eint_int"(%arg0, %arg1): (!FHE.eint<7>, i8) -> (!FHE.eint<7>)
+                return %1: !FHE.eint<7>
+            }
+            """,
+        (4, 7),
+        256 - 3,
+        b'WARNING at loc("-":3:22): overflow happened during addition in simulation\n',
+        id="sub_eint_int",
+    ),
+    pytest.param(
+        """
+            func.func @main(%arg0: !FHE.esint<7>, %arg1: i8) -> !FHE.esint<7> {
+                %1 = "FHE.sub_eint_int"(%arg0, %arg1): (!FHE.esint<7>, i8) -> (!FHE.esint<7>)
+                return %1: !FHE.esint<7>
+            }
+            """,
+        (4, 7),
+        -3,
+        b"",
+        id="sub_eint_int_signed",
+    ),
+    pytest.param(
+        """
+            func.func @main(%arg0: !FHE.esint<7>, %arg1: i8) -> !FHE.esint<7> {
+                %1 = "FHE.sub_eint_int"(%arg0, %arg1): (!FHE.esint<7>, i8) -> (!FHE.esint<7>)
+                return %1: !FHE.esint<7>
+            }
+            """,
+        (-37, 100),
+        -9, # undefined behavior
+        b'WARNING at loc("-":3:22): overflow happened during addition in simulation\n',
+        id="sub_eint_int_signed_underflow",
+    ),
+    pytest.param(
+        """
+            func.func @main(%arg0: !FHE.esint<7>, %arg1: i8) -> !FHE.esint<7> {
+                %1 = "FHE.sub_eint_int"(%arg0, %arg1): (!FHE.esint<7>, i8) -> (!FHE.esint<7>)
+                return %1: !FHE.esint<7>
+            }
+            """,
+        (90, -40),
+        -126,
+        b'WARNING at loc("-":3:22): overflow happened during addition in simulation\n',
+        id="sub_eint_int_signed_overflow",
+    ),
+    pytest.param(
+        """
+            func.func @main(%arg0: !FHE.eint<7>, %arg1: !FHE.eint<7>) -> !FHE.eint<7> {
+                %1 = "FHE.sub_eint"(%arg0, %arg1): (!FHE.eint<7>, !FHE.eint<7>) -> (!FHE.eint<7>)
+                return %1: !FHE.eint<7>
+            }
+            """,
+        (11, 18),
+        256 - 7,
+        b'WARNING at loc("-":3:22): overflow happened during addition in simulation\n',
+        id="sub_eint",
+    ),
+    pytest.param(
+        """
+            func.func @main(%arg0: !FHE.esint<7>, %arg1: !FHE.esint<7>) -> !FHE.esint<7> {
+                %1 = "FHE.sub_eint"(%arg0, %arg1): (!FHE.esint<7>, !FHE.esint<7>) -> (!FHE.esint<7>)
+                return %1: !FHE.esint<7>
+            }
+            """,
+        (11, 18),
+        -7,
+        b"",
+        id="sub_eint_signed",
+    ),
+    pytest.param(
+        """
+            func.func @main(%arg0: !FHE.esint<7>, %arg1: !FHE.esint<7>) -> !FHE.esint<7> {
+                %1 = "FHE.sub_eint"(%arg0, %arg1): (!FHE.esint<7>, !FHE.esint<7>) -> (!FHE.esint<7>)
+                return %1: !FHE.esint<7>
+            }
+            """,
+        (-100, 32),
+        -4,  # undefined behavior
+        b'WARNING at loc("-":3:22): overflow happened during addition in simulation\n',
+        id="sub_eint_signed_underflow",
+    ),
+    pytest.param(
+        """
+            func.func @main(%arg0: !FHE.esint<7>, %arg1: !FHE.esint<7>) -> !FHE.esint<7> {
+                %1 = "FHE.sub_eint"(%arg0, %arg1): (!FHE.esint<7>, !FHE.esint<7>) -> (!FHE.esint<7>)
+                return %1: !FHE.esint<7>
+            }
+            """,
+        (113, -25),
+        -118,  # undefined behavior
+        b'WARNING at loc("-":3:22): overflow happened during addition in simulation\n',
+        id="sub_eint_signed_overflow",
+    ),
     pytest.param(
         """
             func.func @main(%arg0: !FHE.eint<7>, %arg1: i8) -> !FHE.eint<7> {
@@ -270,6 +450,55 @@ def test_lib_compile_and_run_simulation(mlir_input, args, expected_result):
         b'WARNING at loc("-":3:22): overflow happened during multiplication in simulation\n',
         id="mul_eint_int",
     ),
+    pytest.param(
+        """
+            func.func @main(%arg0: !FHE.eint<7>, %arg1: i8) -> !FHE.eint<7> {
+                %1 = "FHE.sub_eint_int"(%arg0, %arg1): (!FHE.eint<7>, i8) -> (!FHE.eint<7>)
+                %2 = "FHE.mul_eint_int"(%1, %arg1): (!FHE.eint<7>, i8) -> (!FHE.eint<7>)
+                return %2: !FHE.eint<7>
+            }
+            """,
+        (5, 10),
+        256 - 50,
+        b'WARNING at loc("-":3:22): overflow happened during addition in simulation\nWARNING at loc("-":4:22): overflow happened during multiplication in simulation\n',
+        id="sub_mul_eint_int",
+    ),
+    pytest.param(
+        """
+            func.func @main(%arg0: !FHE.esint<7>, %arg1: i8) -> !FHE.esint<7> {
+                %1 = "FHE.mul_eint_int"(%arg0, %arg1): (!FHE.esint<7>, i8) -> (!FHE.esint<7>)
+                return %1: !FHE.esint<7>
+            }
+            """,
+        (5, -2),
+        -10,
+        b"",
+        id="mul_eint_int_signed",
+    ),
+    pytest.param(
+        """
+            func.func @main(%arg0: !FHE.esint<7>, %arg1: i8) -> !FHE.esint<7> {
+                %1 = "FHE.mul_eint_int"(%arg0, %arg1): (!FHE.esint<7>, i8) -> (!FHE.esint<7>)
+                return %1: !FHE.esint<7>
+            }
+            """,
+        (-33, 5),
+        -37,  # undefined behavior
+        b'WARNING at loc("-":3:22): overflow happened during multiplication in simulation\n',
+        id="mul_eint_int_signed_underflow",
+    ),
+    pytest.param(
+        """
+            func.func @main(%arg0: !FHE.esint<7>, %arg1: i8) -> !FHE.esint<7> {
+                %1 = "FHE.mul_eint_int"(%arg0, %arg1): (!FHE.esint<7>, i8) -> (!FHE.esint<7>)
+                return %1: !FHE.esint<7>
+            }
+            """,
+        (-33, -5),
+        -91,
+        b'WARNING at loc("-":3:22): overflow happened during multiplication in simulation\n',
+        id="mul_eint_int_signed_overflow",
+    ),
     pytest.param(
         """
             func.func @main(%arg0: !FHE.eint<7>) -> !FHE.eint<7> {