From 62c87be5d6085aa67c700c526fafc4b36944a064 Mon Sep 17 00:00:00 2001
From: Alessandro Manganaro <alessandro.manganaro@st.com>
Date: Fri, 11 Oct 2024 17:01:50 +0200
Subject: [PATCH] lib/stm32: update stm32wba to cube version V1.4.1

Update Cube version for STM32WBAxx series
on https://github.com/STMicroelectronics
from version v1.3.1
to version v1.4.1

Signed-off-by: Alessandro Manganaro <alessandro.manganaro@st.com>
---
 lib/stm32wba/hci/README                       |  4 +-
 lib/stm32wba/hci/app_conf.h                   | 64 +++++++------
 lib/stm32wba/hci/app_entry.h                  | 17 +++-
 lib/stm32wba/hci/auto/ble_types.h             | 16 ++++
 lib/stm32wba/hci/ble_bufsize.h                | 18 ++--
 lib/stm32wba/hci/ble_const.h                  |  5 +-
 lib/stm32wba/hci/ble_defs.h                   |  2 +-
 lib/stm32wba/hci/ble_std.h                    |  2 +-
 lib/stm32wba/hci/bleplat.h                    | 30 ++++++-
 lib/stm32wba/hci/blestack.h                   |  2 +-
 lib/stm32wba/hci/flash_driver.c               | 23 ++++-
 lib/stm32wba/hci/flash_manager.c              |  8 +-
 lib/stm32wba/hci/hw.h                         | 30 +++++++
 lib/stm32wba/hci/hw_aes.c                     | 89 +++++++++++++++++++
 lib/stm32wba/hci/linklayer_plat.h             | 34 ++++++-
 .../hci/ll/_40nm_reg_files/DWC_ble154combo.h  |  2 +-
 lib/stm32wba/hci/ll/bsp.h                     |  9 +-
 lib/stm32wba/hci/ll/common_types.h            | 49 +++++++---
 lib/stm32wba/hci/ll/event_manager.h           |  7 +-
 lib/stm32wba/hci/ll/evnt_schdlr_gnrc_if.h     |  2 +-
 lib/stm32wba/hci/ll/hci.h                     |  2 +-
 lib/stm32wba/hci/ll/ll_fw_config.h            | 73 +++++++--------
 lib/stm32wba/hci/ll/ll_intf.h                 |  5 +-
 lib/stm32wba/hci/ll/mem_intf.h                |  6 +-
 lib/stm32wba/hci/ll/os_wrapper.h              |  2 +-
 lib/stm32wba/hci/ll/power_table.h             |  2 +-
 lib/stm32wba/hci/ll_sys.h                     | 18 +++-
 lib/stm32wba/hci/ll_sys_cs.c                  |  2 +-
 lib/stm32wba/hci/ll_sys_dp_slp.c              | 38 ++------
 lib/stm32wba/hci/ll_sys_intf.c                | 11 ++-
 lib/stm32wba/hci/ll_sys_startup.c             | 21 ++++-
 lib/stm32wba/hci/ll_sys_startup.h             |  2 +-
 lib/stm32wba/hci/log_module.c                 |  2 +-
 lib/stm32wba/hci/log_module.h                 | 34 +++++++
 lib/stm32wba/hci/pta.h                        |  2 +-
 lib/stm32wba/hci/scm.c                        | 51 +++++------
 lib/stm32wba/hci/utilities_common.h           | 18 ++++
 lib/stm32wba/hci/utilities_conf.h             |  8 +-
 zephyr/module.yml                             | 12 +--
 39 files changed, 526 insertions(+), 196 deletions(-)

diff --git a/lib/stm32wba/hci/README b/lib/stm32wba/hci/README
index 16be36ef5..97522bd7e 100644
--- a/lib/stm32wba/hci/README
+++ b/lib/stm32wba/hci/README
@@ -6,7 +6,7 @@ Origin:
    https://github.com/STMicroelectronics/STM32CubeWBA
 
 Status:
-   version v1.3.1
+   version v1.4.1
 
 Purpose:
    This library is used on STM32WBA series to port  BLE controller library in
@@ -87,7 +87,7 @@ URL:
    https://github.com/STMicroelectronics/STM32CubeWBA
 
 Commit:
-   8d1d0ffef7a3a25d8ee8f589a614bc5da65c9300
+   3820501e7e128592290861c9cc0f7189246bf00d
 
 Maintained-by:
    External
diff --git a/lib/stm32wba/hci/app_conf.h b/lib/stm32wba/hci/app_conf.h
index 78ea70b68..d19be4663 100644
--- a/lib/stm32wba/hci/app_conf.h
+++ b/lib/stm32wba/hci/app_conf.h
@@ -25,8 +25,6 @@
 /* Includes ------------------------------------------------------------------*/
 #include "hw_if.h"
 #include "utilities_conf.h"
-#include "blestack.h"
-/* #include "log_module.h" */
 
 /* USER CODE BEGIN Includes */
 
@@ -51,7 +49,7 @@
 /**
  * Define BD_ADDR type: define proper address. Can only be GAP_PUBLIC_ADDR (0x00) or GAP_STATIC_RANDOM_ADDR (0x01)
  */
-#define CFG_BD_ADDRESS_TYPE               (GAP_PUBLIC_ADDR)
+#define CFG_BD_ADDRESS_DEVICE             (GAP_PUBLIC_ADDR)
 
 /**
  * Define privacy: PRIVACY_DISABLED or PRIVACY_ENABLED
@@ -64,7 +62,7 @@
  * if CFG_PRIVACY equals PRIVACY_DISABLED, CFG_BLE_ADDRESS_TYPE has 2 allowed values: GAP_PUBLIC_ADDR or GAP_STATIC_RANDOM_ADDR
  * if CFG_PRIVACY equals PRIVACY_ENABLED, CFG_BLE_ADDRESS_TYPE has 2 allowed values: GAP_RESOLVABLE_PRIVATE_ADDR or GAP_NON_RESOLVABLE_PRIVATE_ADDR
  */
-#define CFG_BLE_ADDRESS_TYPE              (GAP_PUBLIC_ADDR)
+#define CFG_BD_ADDRESS_TYPE               (GAP_PUBLIC_ADDR)
 
 #define ADV_INTERVAL_MIN                  (0x0080)
 #define ADV_INTERVAL_MAX                  (0x00A0)
@@ -76,31 +74,31 @@
 /**
  * Define IO Authentication
  */
-#define CFG_BONDING_MODE                 (1)
-#define CFG_USED_FIXED_PIN               (0) /* 0->fixed pin is used ; 1->No fixed pin used*/
-#define CFG_FIXED_PIN                    (111111)
-#define CFG_ENCRYPTION_KEY_SIZE_MAX      (16)
-#define CFG_ENCRYPTION_KEY_SIZE_MIN      (8)
+#define CFG_BONDING_MODE                  (1)
+#define CFG_USED_FIXED_PIN                (0) /* 0->fixed pin is used ; 1->No fixed pin used*/
+#define CFG_FIXED_PIN                     (111111)
+#define CFG_ENCRYPTION_KEY_SIZE_MAX       (16)
+#define CFG_ENCRYPTION_KEY_SIZE_MIN       (8)
 
 /**
  * Define Input Output capabilities
  */
-#define CFG_IO_CAPABILITY                (IO_CAP_DISPLAY_YES_NO)
+#define CFG_IO_CAPABILITY                 (IO_CAP_DISPLAY_YES_NO)
 
 /**
  * Define Man In The Middle modes
  */
-#define CFG_MITM_PROTECTION              (MITM_PROTECTION_REQUIRED)
+#define CFG_MITM_PROTECTION               (MITM_PROTECTION_REQUIRED)
 
 /**
  * Define Secure Connections Support
  */
-#define CFG_SC_SUPPORT                   (SC_PAIRING_OPTIONAL)
+#define CFG_SC_SUPPORT                    (SC_PAIRING_OPTIONAL)
 
 /**
  * Define Keypress Notification Support
  */
-#define CFG_KEYPRESS_NOTIFICATION_SUPPORT     (KEYPRESS_NOT_SUPPORTED)
+#define CFG_KEYPRESS_NOTIFICATION_SUPPORT (KEYPRESS_NOT_SUPPORTED)
 
 /**
 *   Identity root key used to derive IRK and DHK(Legacy)
@@ -233,6 +231,9 @@
 #define CFG_LPM_LEVEL            (2)
 #define CFG_LPM_STDBY_SUPPORTED  (1)
 
+/* Defines time to wake up from standby before radio event to meet timings */
+#define CFG_LPM_STDBY_WAKEUP_TIME (1500)
+
 /* USER CODE BEGIN Low_Power 0 */
 
 /* USER CODE END Low_Power 0 */
@@ -245,6 +246,8 @@ typedef enum
 {
   CFG_LPM_APP,
   CFG_LPM_LOG,
+  CFG_LPM_LL_DEEPSLEEP,
+  CFG_LPM_LL_HW_RCO_CLBR,
   /* USER CODE BEGIN CFG_LPM_Id_t */
 
   /* USER CODE END CFG_LPM_Id_t */
@@ -287,6 +290,9 @@ typedef enum
 #define CFG_LOG_INSERT_TIME_STAMP_INSIDE_THE_TRACE  (0U)
 #define CFG_LOG_INSERT_EOL_INSIDE_THE_TRACE         (0U)
 
+#define CFG_LOG_TRACE_FIFO_SIZE     (4096U)
+#define CFG_LOG_TRACE_BUF_SIZE      (256U)
+
 /* macro ensuring retrocompatibility with old applications */
 #define APP_DBG                     LOG_INFO_APP
 #define APP_DBG_MSG                 LOG_INFO_APP
@@ -314,14 +320,14 @@ typedef enum
  */
 typedef enum
 {
-  CFG_TASK_HW_RNG,                /* Task linked to chip internal peripheral. */
-  CFG_TASK_LINK_LAYER,            /* Tasks linked to Communications Layers. */
+  CFG_TASK_HW_RNG,
+  CFG_TASK_LINK_LAYER,
   CFG_TASK_HCI_ASYNCH_EVT_ID,
-  CFG_TASK_LINK_LAYER_TEMP_MEAS,
+  CFG_TASK_TEMP_MEAS,
   CFG_TASK_BLE_HOST,
+  CFG_TASK_AMM,
   CFG_TASK_BPKA,
-  CFG_TASK_AMM_BCKGND,
-  CFG_TASK_FLASH_MANAGER_BCKGND,
+  CFG_TASK_FLASH_MANAGER,
   CFG_TASK_BLE_TIMER_BCKGND,
   /* USER CODE BEGIN CFG_Task_Id_t */
   TASK_BUTTON_1,
@@ -351,6 +357,9 @@ typedef enum
   CFG_SEQ_PRIO_NBR /* Shall be LAST in the list */
 } CFG_SEQ_Prio_Id_t;
 
+/* Sequencer configuration */
+#define UTIL_SEQ_CONF_PRIO_NBR              CFG_SEQ_PRIO_NBR
+
 /**
  * This is a bit mapping over 32bits listing all events id supported in the application
  */
@@ -362,16 +371,6 @@ typedef enum
   /* USER CODE END CFG_IdleEvt_Id_t */
 } CFG_IdleEvt_Id_t;
 
-/* Sequencer priorities by default  */
-#define CFG_TASK_PRIO_HW_RNG                CFG_SEQ_PRIO_0
-#define CFG_TASK_PRIO_LINK_LAYER            CFG_SEQ_PRIO_0
-/* USER CODE BEGIN TASK_Priority_Define */
-
-/* USER CODE END TASK_Priority_Define */
-
-/* Used by Sequencer */
-#define UTIL_SEQ_CONF_PRIO_NBR              CFG_SEQ_PRIO_NBR
-
 /**
  * These are the lists of events id registered to the sequencer
  * Each event id shall be in the range [0:31]
@@ -385,6 +384,9 @@ typedef enum
 } CFG_Event_Id_t;
 
 /**< Events defines */
+/* USER CODE BEGIN EVENT_ID_Define */
+
+/* USER CODE END EVENT_ID_Define */
 
 /******************************************************************************
  * NVM configuration
@@ -464,6 +466,12 @@ typedef enum
  */
 #define CFG_RF_TX_POWER_TABLE_ID            (1)
 
+/* Custom LSE sleep clock accuracy to use if both conditions are met:
+ * - LSE is selected as Link Layer sleep clock source
+ * - the LSE used is different from the default one.
+ */
+#define CFG_RADIO_LSE_SLEEP_TIMER_CUSTOM_SCA_RANGE (0)
+
 /* USER CODE BEGIN Radio_Configuration */
 
 /* USER CODE END Radio_Configuration */
diff --git a/lib/stm32wba/hci/app_entry.h b/lib/stm32wba/hci/app_entry.h
index 510e20f24..bd1a7754e 100644
--- a/lib/stm32wba/hci/app_entry.h
+++ b/lib/stm32wba/hci/app_entry.h
@@ -43,7 +43,22 @@ extern "C" {
 #define WPAN_SUCCESS 0u
 
 /* USER CODE BEGIN EC */
-
+/******************************************************************************
+ * Information Table
+ *
+ * Version
+ * [0:3]   = Build - 0: Untracked - 15:Released - x: Tracked version
+ * [4:7]   = branch - 0: Mass Market - x: ...
+ * [8:15]  = Subversion
+ * [16:23] = Version minor
+ * [24:31] = Version major
+ *
+ ******************************************************************************/
+#define CFG_FW_BUILD              (0)
+#define CFG_FW_BRANCH             (0)
+#define CFG_FW_SUBVERSION         (1)
+#define CFG_FW_MINOR_VERSION      (4)
+#define CFG_FW_MAJOR_VERSION      (1)
 /* USER CODE END EC */
 
 /* Exported variables --------------------------------------------------------*/
diff --git a/lib/stm32wba/hci/auto/ble_types.h b/lib/stm32wba/hci/auto/ble_types.h
index c1f8bc34d..ca5f3a157 100644
--- a/lib/stm32wba/hci/auto/ble_types.h
+++ b/lib/stm32wba/hci/auto/ble_types.h
@@ -2497,6 +2497,22 @@ typedef __PACKED_STRUCT
   uint8_t Status;
 } aci_hal_continuous_tx_start_rp0;
 
+typedef __PACKED_STRUCT
+{
+  uint8_t Mode;
+  uint8_t Key[16];
+  uint8_t IV[8];
+  uint16_t In_Data_Length;
+  uint8_t In_Data[BLE_CMD_MAX_PARAM_LEN - 27];
+} aci_hal_ead_encrypt_decrypt_cp0;
+
+typedef __PACKED_STRUCT
+{
+  uint8_t Status;
+  uint16_t Out_Data_Length;
+  uint8_t Out_Data[(BLE_EVT_MAX_PARAM_LEN - 3) - 3];
+} aci_hal_ead_encrypt_decrypt_rp0;
+
 typedef __PACKED_STRUCT
 {
   uint8_t Status;
diff --git a/lib/stm32wba/hci/ble_bufsize.h b/lib/stm32wba/hci/ble_bufsize.h
index 437f27e3f..e3e3d7f7e 100644
--- a/lib/stm32wba/hci/ble_bufsize.h
+++ b/lib/stm32wba/hci/ble_bufsize.h
@@ -1,6 +1,5 @@
 /*****************************************************************************
  * @file    ble_bufsize.h
- * @author  MDG
  * @brief   Definition of BLE stack buffers size
  *****************************************************************************
  * @attention
@@ -49,7 +48,7 @@
  */
 #define BLE_MEM_BLOCK_SIZE                   32
 
-#if (BASIC_FEATURES != 0)
+#if ((BASIC_FEATURES != 0)||(PERIPHERAL_ONLY != 0))
 #define BLE_MEM_BLOCK_X_PTX(n_link)           0
 #else
 #define BLE_MEM_BLOCK_X_PTX(n_link)           (n_link)
@@ -96,19 +95,24 @@
  * - a part, that may be considered "fixed", i.e. independent from the above
  *   mentioned parameters.
 */
-#if (BASIC_FEATURES != 0)
-#define BLE_FIXED_BUFFER_SIZE_BYTES  244   /* Basic Features */
+#if (PERIPHERAL_ONLY != 0)
+#define BLE_FIXED_BUFFER_SIZE_BYTES  4   /* Peripheral Only */
+#elif (BASIC_FEATURES != 0)
+#define BLE_FIXED_BUFFER_SIZE_BYTES  260   /* Basic Features */
 #else
-#define BLE_FIXED_BUFFER_SIZE_BYTES  660   /* Full stack */
+#define BLE_FIXED_BUFFER_SIZE_BYTES  676   /* Full stack / Basic Plus */
 #endif
 
 /*
  * BLE_PER_LINK_SIZE_BYTES: additional memory size used per link
  */
-#if (BASIC_FEATURES != 0)
+
+#if (PERIPHERAL_ONLY != 0)
+#define BLE_PER_LINK_SIZE_BYTES       148   /* Peripheral Only */
+#elif (BASIC_FEATURES != 0)
 #define BLE_PER_LINK_SIZE_BYTES       176   /* Basic Features */
 #else
-#define BLE_PER_LINK_SIZE_BYTES       188   /* Full stack */
+#define BLE_PER_LINK_SIZE_BYTES       188   /* Full stack / Basic Plus */
 #endif
 
 /*
diff --git a/lib/stm32wba/hci/ble_const.h b/lib/stm32wba/hci/ble_const.h
index fa93730ba..58001e503 100644
--- a/lib/stm32wba/hci/ble_const.h
+++ b/lib/stm32wba/hci/ble_const.h
@@ -1,6 +1,6 @@
 /*****************************************************************************
  * @file    ble_const.h
- * @author  MDG
+ *
  * @brief   This file contains the definitions which are compiler dependent.
  *****************************************************************************
  * @attention
@@ -32,6 +32,9 @@
 #ifndef BASIC_PLUS
 #define BASIC_PLUS 0
 #endif
+#ifndef PERIPHERAL_ONLY
+#define PERIPHERAL_ONLY 0
+#endif
 #ifndef LL_ONLY
 #define LL_ONLY 0
 #endif
diff --git a/lib/stm32wba/hci/ble_defs.h b/lib/stm32wba/hci/ble_defs.h
index b5cfa0743..05abb1d5b 100644
--- a/lib/stm32wba/hci/ble_defs.h
+++ b/lib/stm32wba/hci/ble_defs.h
@@ -1,6 +1,6 @@
 /*****************************************************************************
  * @file    ble_defs.h
- * @author  MDG
+ *
  * @brief   This file contains definitions used for BLE Stack interface.
  *****************************************************************************
  * @attention
diff --git a/lib/stm32wba/hci/ble_std.h b/lib/stm32wba/hci/ble_std.h
index c9177bf3a..739f8ab4b 100644
--- a/lib/stm32wba/hci/ble_std.h
+++ b/lib/stm32wba/hci/ble_std.h
@@ -1,6 +1,6 @@
 /******************************************************************************
  * @file    ble_std.h
- * @author  MDG
+ *
  * @brief   BLE standard definitions
  ******************************************************************************
  * @attention
diff --git a/lib/stm32wba/hci/bleplat.h b/lib/stm32wba/hci/bleplat.h
index e0265311f..1d4ffe3d1 100644
--- a/lib/stm32wba/hci/bleplat.h
+++ b/lib/stm32wba/hci/bleplat.h
@@ -1,6 +1,6 @@
 /*****************************************************************************
  * @file    bleplat.h
- * @author  MDG
+ *
  * @brief   This file contains the interface of the BLE platform layer
  *          (lower interface of the BLE stack library).
  *          It is included by the STM32WBX BLE stack library.
@@ -222,6 +222,34 @@ extern void BLEPLAT_AesCmacCompute( const uint8_t* input,
                                     uint32_t input_length,
                                     uint8_t* output_tag );
 
+/**
+  * @brief  CCM computation
+  *
+  * @param  mode: CCM mode (0=encryption, 1=decryption)
+  * @param  key: AES encryption key (16 bytes)
+  * @param  iv_length: IV length (in bytes)
+  * @param  iv: IV data
+  * @param  add_length: add length (in bytes)
+  * @param  add: add data
+  * @param  input_length: input data length (in bytes)
+  * @param  inputL: original data (to be encrypted or decrypted)
+  * @param  tag_length: CCM tag length (in bytes)
+  * @param  tag: CCM tag
+  * @param  output: result data (encrypted or decrypted)
+  * @retval status (BLEPLAT_XX)
+  */
+extern int BLEPLAT_AesCcmCrypt( uint8_t mode,
+                                const uint8_t* key,
+                                uint8_t iv_length,
+                                const uint8_t* iv,
+                                uint16_t add_length,
+                                const uint8_t* add,
+                                uint32_t input_length,
+                                const uint8_t* input,
+                                uint8_t tag_length,
+                                uint8_t* tag,
+                                uint8_t* output );
+
 /* Random Number Generation (RNG) interface:
  */
 
diff --git a/lib/stm32wba/hci/blestack.h b/lib/stm32wba/hci/blestack.h
index 8166ce05c..b313a84d3 100644
--- a/lib/stm32wba/hci/blestack.h
+++ b/lib/stm32wba/hci/blestack.h
@@ -1,6 +1,6 @@
 /*****************************************************************************
  * @file    blestack.h
- * @author  MDG
+ *
  * @brief   Header file for BLE stack
  *****************************************************************************
  * @attention
diff --git a/lib/stm32wba/hci/flash_driver.c b/lib/stm32wba/hci/flash_driver.c
index 8d705c09a..e3a4bf175 100644
--- a/lib/stm32wba/hci/flash_driver.c
+++ b/lib/stm32wba/hci/flash_driver.c
@@ -109,6 +109,15 @@ FD_FlashOp_Status_t FD_EraseSectors(uint32_t Sect)
   uint32_t page_error;
   FLASH_EraseInitTypeDef p_erase_init;
 
+#ifndef FLASH_DBANK_SUPPORT
+  if (FLASH_PAGE_NB < Sect)
+#else
+  if ((FLASH_PAGE_NB * 2u) < Sect)
+#endif
+  {
+    return status;
+  }
+
   /* Check if LL allows flash access */
   if ((FD_Flash_Control_status & (1u << FD_FLASHACCESS_RFTS)) &&
       (FD_Flash_Control_status & (1u << FD_FLASHACCESS_RFTS_BYPASS)))
@@ -120,9 +129,21 @@ FD_FlashOp_Status_t FD_EraseSectors(uint32_t Sect)
   while (FD_Flash_Control_status & (1u << FD_FLASHACCESS_SYSTEM));
 
   p_erase_init.TypeErase = FLASH_TYPEERASE_PAGES;
-  p_erase_init.Page = Sect;
+  p_erase_init.Page = (Sect & (FLASH_PAGE_NB - 1u));
   p_erase_init.NbPages = 1;
 
+#if defined(FLASH_DBANK_SUPPORT)
+  /* Verify which Bank is impacted */
+  if ((FLASH_PAGE_NB <= Sect) ^ (OB_SWAP_BANK_ENABLE == READ_BIT (FLASH->OPTR, FLASH_OPTR_SWAP_BANK_Msk)))
+  {
+    p_erase_init.Banks = FLASH_BANK_2;
+  }
+  else
+  {
+    p_erase_init.Banks = FLASH_BANK_1;
+  }
+#endif
+
   if (HAL_FLASHEx_Erase(&p_erase_init, &page_error) == HAL_OK)
   {
     status = FD_FLASHOP_SUCCESS;
diff --git a/lib/stm32wba/hci/flash_manager.c b/lib/stm32wba/hci/flash_manager.c
index d92ef06ca..108dd388a 100644
--- a/lib/stm32wba/hci/flash_manager.c
+++ b/lib/stm32wba/hci/flash_manager.c
@@ -61,7 +61,7 @@ typedef struct FM_FlashOpConfig
 }FM_FlashOpConfig_t;
 
 /* Private defines -----------------------------------------------------------*/
-
+#define FLASH_PAGE_NBR    (FLASH_SIZE / FLASH_PAGE_SIZE)
 #define FLASH_WRITE_BLOCK_SIZE  4U
 #define ALIGNMENT_32   0x00000003
 #define ALIGNMENT_128  0x0000000F
@@ -134,8 +134,8 @@ FM_Cmd_Status_t FM_Write(uint32_t *Src, uint32_t *Dest, int32_t Size, FM_Callbac
 {
   FM_Cmd_Status_t status;
 
-  if (((uint32_t)Dest < FLASH_BASE) || ((uint32_t)Dest > (FLASH_BASE + FLASH_BANK_SIZE))
-                                    || (((uint32_t)Dest + Size) > (FLASH_BASE + FLASH_BANK_SIZE)))
+  if (((uint32_t)Dest < FLASH_BASE) || ((uint32_t)Dest > (FLASH_BASE + FLASH_SIZE))
+                                    || (((uint32_t)Dest + Size) > (FLASH_BASE + FLASH_SIZE)))
   {
     LOG_ERROR_SYSTEM("\r\nFM_Write - Destination address not part of the flash");
 
@@ -185,7 +185,7 @@ FM_Cmd_Status_t FM_Erase(uint32_t FirstSect, uint32_t NbrSect, FM_CallbackNode_t
 {
   FM_Cmd_Status_t status;
 
-  if ((FirstSect > FLASH_PAGE_NB) || ((FirstSect + NbrSect) > FLASH_PAGE_NB))
+  if ((FirstSect > FLASH_PAGE_NBR) || ((FirstSect + NbrSect) > FLASH_PAGE_NBR))
   {
     LOG_ERROR_SYSTEM("\r\nFM_Erase - Inconsistent request");
 
diff --git a/lib/stm32wba/hci/hw.h b/lib/stm32wba/hci/hw.h
index 417b9a6cf..76aaa831c 100644
--- a/lib/stm32wba/hci/hw.h
+++ b/lib/stm32wba/hci/hw.h
@@ -122,6 +122,36 @@ extern void HW_AES_Crypt( const uint32_t* input,
  */
 extern void HW_AES_Disable( void );
 
+/*
+ * HW_AES_InitCcm
+ *
+ * Initilaizes AES for CCM encryption (decrypt = 0) or decryption (decrypt = 1)
+ * Note: B0 and B1 4-word blocks must be provided by user.
+ *
+ */
+extern void HW_AES_InitCcm( uint8_t decrypt,
+                            const uint8_t* key,
+                            const uint32_t* b0,
+                            const uint32_t* b1 );
+
+/*
+ * HW_AES_EndCcm
+ *
+ * Completes CCM processing by computing the authentication tag
+ *
+ */
+extern void HW_AES_EndCcm( uint8_t tag_length,
+                           uint8_t* tag );
+
+/*
+ * HW_AES_SetLast
+ *
+ * Function used in CCM processing to indicate the last block of data in
+ * case of decryption
+ *
+ */
+extern void HW_AES_SetLast( uint8_t left_length );
+
 /* ---------------------------------------------------------------------------
  *                                 PKA
  * ---------------------------------------------------------------------------
diff --git a/lib/stm32wba/hci/hw_aes.c b/lib/stm32wba/hci/hw_aes.c
index cad739801..fef4fc169 100644
--- a/lib/stm32wba/hci/hw_aes.c
+++ b/lib/stm32wba/hci/hw_aes.c
@@ -177,3 +177,92 @@ void HW_AES_Disable( void )
 }
 
 /*****************************************************************************/
+
+void HW_AES_InitCcm( uint8_t decrypt,
+                     const uint8_t* key,
+                     const uint32_t* b0,
+                     const uint32_t* b1 )
+{
+  uint32_t tmp[4], mode = decrypt ? AES_CR_MODE_1 : 0;
+
+  /* CCM init phase */
+  HW_AESX->CR = AES_CR_CHMOD_2 | mode;
+
+  /* Copy key bytes to the AES registers */
+  memcpy( tmp, key, 16 );
+  HW_AESX->KEYR0 = tmp[0];
+  HW_AESX->KEYR1 = tmp[1];
+  HW_AESX->KEYR2 = tmp[2];
+  HW_AESX->KEYR3 = tmp[3];
+
+  /* Copy B0 bytes to the AES registers */
+  HW_AESX->IVR3 = __REV( b0[0] );
+  HW_AESX->IVR2 = __REV( b0[1] );
+  HW_AESX->IVR1 = __REV( b0[2] );
+  HW_AESX->IVR0 = __REV( b0[3] );
+
+  /* Enable AES processing */
+  HW_AESX->CR |= AES_CR_EN;
+
+  /* Wait for CCF flag to be raised */
+  while ( ! (HW_AESX->SR & AES_SR_CCF) );
+
+  /* Clear CCF Flag */
+  HW_AESX->ICR |= AES_ICR_CCF;
+
+  /* CCM header phase */
+  HW_AESX->CR = AES_CR_CHMOD_2 | AES_CR_GCMPH_0 | AES_CR_DATATYPE_1;
+
+  /* Enable AES processing */
+  HW_AESX->CR |= AES_CR_EN;
+
+  /* Write the header block B1 into the input FIFO */
+  HW_AESX->DINR = b1[0];
+  HW_AESX->DINR = b1[1];
+  HW_AESX->DINR = b1[2];
+  HW_AESX->DINR = b1[3];
+
+  /* Wait for CCF flag to be raised */
+  while ( !(HW_AESX->SR & AES_SR_CCF) );
+
+  /* Clear CCF Flag */
+  HW_AESX->ICR |= AES_ICR_CCF;
+
+  /* CCM payload  phase */
+  HW_AESX->CR = (AES_CR_EN | AES_CR_CHMOD_2 |
+                 AES_CR_GCMPH_1 | AES_CR_DATATYPE_1 | mode);
+}
+
+/*****************************************************************************/
+
+void HW_AES_EndCcm( uint8_t tag_length,
+                    uint8_t* tag )
+{
+  uint32_t tmp[4];
+
+  /* CCM final phase */
+  HW_AESX->CR = (AES_CR_EN | AES_CR_CHMOD_2 |
+                 AES_CR_GCMPH_0 | AES_CR_GCMPH_1 | AES_CR_DATATYPE_1);
+
+  /* Wait for CCF flag to be raised */
+  while ( !(HW_AESX->SR & AES_SR_CCF) );
+
+  /* Read the output block from the output FIFO */
+  tmp[0] = HW_AESX->DOUTR;
+  tmp[1] = HW_AESX->DOUTR;
+  tmp[2] = HW_AESX->DOUTR;
+  tmp[3] = HW_AESX->DOUTR;
+  memcpy( tag, tmp, tag_length );
+
+  /* Clear CCF Flag */
+  HW_AESX->ICR |= AES_ICR_CCF;
+}
+
+/*****************************************************************************/
+
+void HW_AES_SetLast( uint8_t left_length )
+{
+  HW_AESX->CR |= (16UL - left_length) << AES_CR_NPBLB_Pos;
+}
+
+/*****************************************************************************/
diff --git a/lib/stm32wba/hci/linklayer_plat.h b/lib/stm32wba/hci/linklayer_plat.h
index 16b82ba3f..e0cf6f643 100644
--- a/lib/stm32wba/hci/linklayer_plat.h
+++ b/lib/stm32wba/hci/linklayer_plat.h
@@ -50,6 +50,24 @@ extern void LINKLAYER_PLAT_Assert(uint8_t condition);
   */
 extern void LINKLAYER_PLAT_AclkCtrl(uint8_t enable);
 
+/**
+  * @brief  Notify the Link Layer platform layer the system will enter in WFI
+  *         and AHB5 clock may be turned of regarding the 2.4Ghz radio state.
+  * @param  None
+  * @retval None
+  */
+extern void LINKLAYER_PLAT_NotifyWFIEnter(void);
+
+/**
+  * @brief  Notify the Link Layer platform layer the system exited WFI and AHB5
+  *         clock may be resynchronized as is may have been turned of during
+  *         low power mode entry.
+  * @param  None
+  * @retval None
+  */
+extern void LINKLAYER_PLAT_NotifyWFIExit(void);
+
+
 /**
   * @brief  Active wait on bus clock readiness.
   * @param  None
@@ -194,4 +212,18 @@ extern void LINKLAYER_PLAT_DisableOSContextSwitch(void);
  */
 extern void LINKLAYER_PLAT_SCHLDR_TIMING_UPDATE_NOT(Evnt_timing_t * p_evnt_timing);
 
-#endif /* LINKLAYER_PLAT_H */
+/**
+  * @brief  Get the ST company ID.
+  * @param  None
+  * @retval Company ID
+  */
+extern uint32_t LINKLAYER_PLAT_GetSTCompanyID(void);
+
+/**
+  * @brief  Get the Unique Device Number (UDN).
+  * @param  None
+  * @retval UDN
+  */
+extern uint32_t LINKLAYER_PLAT_GetUDN(void);
+
+#endif /* LINKLAYER_PLAT_H */
\ No newline at end of file
diff --git a/lib/stm32wba/hci/ll/_40nm_reg_files/DWC_ble154combo.h b/lib/stm32wba/hci/ll/_40nm_reg_files/DWC_ble154combo.h
index 46151833c..8fe39ebf8 100644
--- a/lib/stm32wba/hci/ll/_40nm_reg_files/DWC_ble154combo.h
+++ b/lib/stm32wba/hci/ll/_40nm_reg_files/DWC_ble154combo.h
@@ -1,4 +1,4 @@
-/*$Id: //dwh/bluetooth/DWC_ble154combo/firmware/rel/1.30a-SOW05Patchv6_2/firmware/public_inc/_40nm_reg_files/DWC_ble154combo.h#1 $*/
+/*$Id: //dwh/bluetooth/DWC_ble154combo/firmware/rel/1.32a-LCA00/firmware/public_inc/_40nm_reg_files/DWC_ble154combo.h#1 $*/
 /**
  ********************************************************************************
  * @brief
diff --git a/lib/stm32wba/hci/ll/bsp.h b/lib/stm32wba/hci/ll/bsp.h
index 2f0f0b587..1eef01f43 100644
--- a/lib/stm32wba/hci/ll/bsp.h
+++ b/lib/stm32wba/hci/ll/bsp.h
@@ -1,4 +1,4 @@
-/*$Id: //dwh/bluetooth/DWC_ble154combo/firmware/rel/1.30a-SOW05Patchv6_2/firmware/public_inc/bsp.h#1 $*/
+/*$Id: //dwh/bluetooth/DWC_ble154combo/firmware/rel/1.32a-LCA00/firmware/public_inc/bsp.h#1 $*/
 
 /**
  ********************************************************************************
@@ -55,6 +55,9 @@
 #define LL_LOW_ISR_ONLY  		0x02	// Specify only LL LOW ISR to be enabled or disabled
 #define SYS_LOW_ISR		 		0x04 	// Specify only system low ISR to be enabled or disabled
 
+#ifndef EBQ_BUILD
+#define EBQ_BUILD					0
+#endif
 /**
  * @brief InterruptPriorities Enum.
  * it is used to define the different ISR priorities in the controller
@@ -267,6 +270,7 @@ typedef enum Debug_GPIO_e{
 
 	DBG_IO_CONN_MNGR_PROCESS_EVNT_CLBK                          ,
 	DBG_IO_CONN_MNGR_UPDT_CONN_PARAM_CBK                        ,
+	DBG_IO_CONN_MNGR_DATA_LEN_UPDT_CBK							,
 	DBG_IO_EVNT_SCHDLR_HW_EVNT_CMPLT                            ,
 
 	DBG_IO_HCI_EVENT_HNDLR                                      ,
@@ -281,9 +285,7 @@ typedef enum Debug_GPIO_e{
 	DBG_IO_PROFILE_MARKER_PHY_WAKEUP_TIME                       ,
 	DBG_IO_PROFILE_END_DRIFT_TIME                               ,
 	DBG_IO_PROC_RADIO_RCV										,
-
 	DBG_IO_EVNT_TIME_UPDT										,
-
 	DBG_IO_MAC_RECEIVE_DONE										,
 	DBG_IO_MAC_TX_DONE											,
 	DBG_IO_RADIO_APPLY_CSMA										,
@@ -612,6 +614,7 @@ void bsp_debug_gpio_toggle(Debug_GPIO_t gpio);
  * @retval None.
  */
 void bsp_set_phy_clbr_state(PhyClbrState state);
+
 /**
  * @brief a function to notify the upper layer to switch the clock.
  *
diff --git a/lib/stm32wba/hci/ll/common_types.h b/lib/stm32wba/hci/ll/common_types.h
index c04421fa6..e1489a7b8 100644
--- a/lib/stm32wba/hci/ll/common_types.h
+++ b/lib/stm32wba/hci/ll/common_types.h
@@ -1,8 +1,4 @@
-/*$Id: //dwh/bluetooth/DWC_ble154combo/firmware/branches/P10164613/issue_2029/firmware/public_inc/common_types.h#2 $*/
-/*Version_INFO
-V2  --> Original version is 1.30a-SOW05PatchV6_2
-V2  --> combined patch case 01641860
-*/
+/*$Id: //dwh/bluetooth/DWC_ble154combo/firmware/rel/1.32a-LCA00/firmware/public_inc/common_types.h#1 $*/
 /**
  ********************************************************************************
  * @file    common_types.h
@@ -141,6 +137,9 @@ V2  --> combined patch case 01641860
 #define NULL				((void *)0)
 #endif	/* NULL */
 
+#define UNUSED_VALUE		0
+#define UNUSED_PTR			NULL
+
 #define MEMSET(ptr_memory, value, memory_size)				ble_memset(ptr_memory, value, memory_size)
 #define MEMCPY(ptr_destination, ptr_source, memory_size)	ble_memcpy(ptr_destination, ptr_source, memory_size)
 #define MEMCMP(ptr_destination, ptr_source, memory_size)	ble_memcmp(ptr_destination, ptr_source, memory_size)
@@ -177,6 +176,9 @@ extern os_mutex_id g_ll_lock;
 /* end of radio activity custom command flag */
 #define END_OF_RADIO_ACTIVITY_REPORTING				1 /* Enable\Disable end of radio activity reporting feature. Enable:1 - Disable:0 */
 
+#if SUPPORT_MAC && SUPPORT_ANT_DIV
+#define EXT_ADDRESS_LENGTH							8
+#endif /* SUPPORT_MAC && SUPPORT_ANT_DIV */
 /* Supported PHYs*/
 typedef enum {
 	LE_NO_CHANGE			= 0x00,
@@ -286,7 +288,27 @@ typedef enum _slptmr_src_type_e {
 #endif /* USE_NON_ACCURATE_32K_SLEEP_CLK */
 }slptmr_src_type_e;
 
+/**
+  * @brief Enumeration of the antenna diversity interval type.
+  */
+#if SUPPORT_MAC && SUPPORT_ANT_DIV
+typedef enum ant_intrv_type_enum {
+	NO_TYPE,
+	FIXED_TIME,
+	PACKETS_NUMBER
+} ant_intrv_type_enum_t;
 
+/*
+ * @brief structure that hold antenna diversity parameters information.
+ */
+typedef struct _antenna_diversity_st{
+	ant_intrv_type_enum_t ant_intrv_type;                /* antenna interval type: FIXED_TIME(us) or PACKETS_NUMBER(n) */
+	uint32_t ant_intrv_value;                            /* antenna interval value based on type; us for FIXED_TIME, n for PACKETS_NUMBER */
+	uint16_t wntd_coord_shrt_addr;	                     /* wanted coordinator/router short address */
+	uint8_t wntd_coord_ext_addr[EXT_ADDRESS_LENGTH];	 /* wanted coordinator/router extended address */
+	uint8_t max_rx_ack_retries;                          /* max number of retries to receive ack in case of ack error reception*/
+} antenna_diversity_st;
+#endif /* SUPPORT_MAC && SUPPORT_ANT_DIV */
 
 /*
  * @brief structure that hold some information about the data transmitted across layers.
@@ -341,14 +363,6 @@ typedef struct _sdu_buf_hdr_st {
 } iso_sdu_buf_hdr_st, *iso_sdu_buf_hdr_p;
 #endif  /* (SUPPORT_BRD_ISOCHRONOUS || SUPPORT_SYNC_ISOCHRONOUSs ||  (SUPPORT_CONNECTED_ISOCHRONOUS && ( SUPPORT_MASTER_CONNECTION || SUPPORT_SLAVE_CONNECTION))) */
 
-/**
- * brief: PAWR host buffer struct
- */
-typedef struct _pawr_host_buffer {
-	uint8_t buffer[257];
-	uint8_t total_data_lenth;
-	uint8_t number_of_reports;
-}pawr_host_buffer;
 
 /*
  * @brief   Transport layer event
@@ -412,6 +426,11 @@ typedef enum {
  */
 #define DEFAULT_PHY_CALIBRATION_PERIOD        		10	/* Time period for PHY calibration = 10s */
 
+#ifdef PHY_40nm_3_00_a
+#define SUPPORT_MAC_PHY_CONT_TESTING_CMDS 1
+#else
+#define SUPPORT_MAC_PHY_CONT_TESTING_CMDS 0
+#endif /*end of PHY_40nm_3_00_a && SUPPORT_MAC_PHY_CONT_TESTING_CMDS */
 
 #ifndef EXTERNAL_CUSTOM_CMDS
 #define EXTERNAL_CUSTOM_CMDS						0	/* Indicates that an external custom HCI commands module exists */
@@ -425,9 +444,11 @@ typedef enum {
    -Allow host to register callback to refuse current controller event and receive it later with another callback*/
 #define SUPPORT_HCI_EVENT_ONLY				1
 
+#else
+#define SUPPORT_HCI_EVENT_ONLY				0
 #endif/* (!USE_HCI_TRANSPORT) && (SUPPORT_BLE) */
 
 #define SUPPORT_HW_AUDIO_SYNC_SIGNAL       0
 
-
+#define SUPPORT_TIM_UPDT					1
 #endif /*COMMON_TYPES_H_*/
diff --git a/lib/stm32wba/hci/ll/event_manager.h b/lib/stm32wba/hci/ll/event_manager.h
index accd970d9..35cc2bdae 100644
--- a/lib/stm32wba/hci/ll/event_manager.h
+++ b/lib/stm32wba/hci/ll/event_manager.h
@@ -1,4 +1,4 @@
-/*$Id: //dwh/bluetooth/DWC_ble154combo/firmware/rel/1.30a-SOW05Patchv6_2/firmware/public_inc/event_manager.h#1 $*/
+/*$Id: //dwh/bluetooth/DWC_ble154combo/firmware/rel/1.32a-LCA00/firmware/public_inc/event_manager.h#1 $*/
 /**
  ********************************************************************************
  * @file    event_manager.h
@@ -72,6 +72,9 @@ typedef enum {
 #if ((SUPPORT_MASTER_CONNECTION) || (SUPPORT_SLAVE_CONNECTION))
 	CONN_EVENT, /*connection event handler ID*/
 	CONN_PARAM_UPDATE_EVENT, /* handler for connection parameter update initiated by link layer */
+#if ((SUPPORT_CONNECTED_ISOCHRONOUS) && (SUPPORT_MASTER_CONNECTION))
+	CONN_DATA_LEN_UPDATE_EVENT, /* handler for connection data length update initiated by link layer */
+#endif /*SUPPORT_CONNECTED_ISOCHRONOUS && SUPPORT_MASTER_CONNECTION*/
 #if(SUPPORT_CONNECTED_ISOCHRONOUS &&( SUPPORT_MASTER_CONNECTION || SUPPORT_SLAVE_CONNECTION))
 	CIS_EVENT,
 #endif /*SUPPORT_CONNECTED_ISOCHRONOUS*/
@@ -101,6 +104,7 @@ typedef enum {
 	COEX_TIMER_EVENT,
 #endif
 #if SUPPORT_MAC
+	RADIO_MAC_TX_DONE_EVENT,
 	RAL_SM_DONE_EVENT,
 	MAC_SM_DONE_EVENT,
 	ED_TMR_EVENT,
@@ -153,7 +157,6 @@ typedef enum {
 #if (NUM_OF_CTSM_EMNGR_HNDLS >= 3)
 	CUSTOM_HANDLE_3,
 #endif
-
 	MAX_EM_HANDLE
 } handler_t;
 /* Exported functions ------------------------------------------------------- */
diff --git a/lib/stm32wba/hci/ll/evnt_schdlr_gnrc_if.h b/lib/stm32wba/hci/ll/evnt_schdlr_gnrc_if.h
index a728c94df..ae5d7e9c2 100644
--- a/lib/stm32wba/hci/ll/evnt_schdlr_gnrc_if.h
+++ b/lib/stm32wba/hci/ll/evnt_schdlr_gnrc_if.h
@@ -1,4 +1,4 @@
-/*$Id: //dwh/bluetooth/DWC_ble154combo/firmware/rel/1.30a-SOW05Patchv6_2/firmware/public_inc/evnt_schdlr_gnrc_if.h#1 $*/
+/*$Id: //dwh/bluetooth/DWC_ble154combo/firmware/rel/1.32a-LCA00/firmware/public_inc/evnt_schdlr_gnrc_if.h#1 $*/
 /**
  ********************************************************************************
  * @file    evnt_schdlr_gnrc_if.h
diff --git a/lib/stm32wba/hci/ll/hci.h b/lib/stm32wba/hci/ll/hci.h
index 08d945f57..302121f0c 100644
--- a/lib/stm32wba/hci/ll/hci.h
+++ b/lib/stm32wba/hci/ll/hci.h
@@ -1,4 +1,4 @@
-/*$Id: //dwh/bluetooth/DWC_ble154combo/firmware/rel/1.30a-SOW05Patchv6_2/firmware/public_inc/hci.h#1 $*/
+/*$Id: //dwh/bluetooth/DWC_ble154combo/firmware/rel/1.32a-LCA00/firmware/public_inc/hci.h#1 $*/
 /**
  ********************************************************************************
  * @file    hci.h
diff --git a/lib/stm32wba/hci/ll/ll_fw_config.h b/lib/stm32wba/hci/ll/ll_fw_config.h
index 621dd1f22..a0a7ce06e 100644
--- a/lib/stm32wba/hci/ll/ll_fw_config.h
+++ b/lib/stm32wba/hci/ll/ll_fw_config.h
@@ -16,7 +16,7 @@
  * THE ENTIRE NOTICE ABOVE MUST BE REPRODUCED ON ALL AUTHORIZED COPIES.
  *
  * <h2><center>&copy; (C) COPYRIGHT 2022 SYNOPSYS, INC.</center></h2>
- * <h2><center>&copy; 	ALL RIGHTS RESERVED</center></h2>
+ * <h2><center>&copy;   ALL RIGHTS RESERVED</center></h2>
  *
  * \n\n<b>References</b>\n
  * -Documents folder .
@@ -41,61 +41,56 @@
 /*************************** BLE Configuration *************************************/
 /*Configurations of BLE will apply only when BLE is enabled*/
 /* Roles configurations */
-#define SUPPORT_EXPLCT_OBSERVER_ROLE				1 /* Enable\Disable Explicit observer role. Enable:1 - Disable:0 */
-#define SUPPORT_EXPLCT_BROADCASTER_ROLE				1 /* Enable\Disable Explicit broadcaster role. Enable:1 - Disable:0 */
-#define SUPPORT_MASTER_CONNECTION					1 /* Enable\Disable Master connection role. Enable:1 - Disable:0 */
-#define SUPPORT_SLAVE_CONNECTION					1 /* Enable\Disable Slave connection role. Enable:1 - Disable:0 */
+#define SUPPORT_EXPLCT_OBSERVER_ROLE                1 /* Enable\Disable Explicit observer role. Enable:1 - Disable:0 */
+#define SUPPORT_EXPLCT_BROADCASTER_ROLE             1 /* Enable\Disable Explicit broadcaster role. Enable:1 - Disable:0 */
+#define SUPPORT_MASTER_CONNECTION                   1 /* Enable\Disable Master connection role. Enable:1 - Disable:0 */
+#define SUPPORT_SLAVE_CONNECTION                    1 /* Enable\Disable Slave connection role. Enable:1 - Disable:0 */
 
 /* Standard features configurations */
-#define SUPPORT_LE_ENCRYPTION						1 /* Enable\Disable Encryption feature. Enable:1 - Disable:0 */
-#define SUPPORT_PRIVACY								1 /* Enable\Disable Privacy feature. Enable:1 - Disable:0 */
+#define SUPPORT_LE_ENCRYPTION                       1 /* Enable\Disable Encryption feature. Enable:1 - Disable:0 */
+#define SUPPORT_PRIVACY                             1 /* Enable\Disable Privacy feature. Enable:1 - Disable:0 */
 
 /* Capabilities configurations */
-#define MAX_NUM_CNCRT_STAT_MCHNS					8 /* Set maximum number of states the controller can support */
-#define USE_NON_ACCURATE_32K_SLEEP_CLK				1 /* Allow to drive the sleep clock by sources other than the default crystal oscillator source.*/
-													   /*LL can use crystal oscillator or RTC or RCO to drive the sleep clock.This selection is done via "DEFAULT_SLEEP_CLOCK_SOURCE" macro. */
-#define SUPPORT_LE_EXTENDED_ADVERTISING				1 /* Enable\Disable Extended advertising feature. Enable:1 - Disable:0 */
-#define SUPPORT_LE_PERIODIC_ADVERTISING				1 /* Enable\Disable Periodic advertising feature. Enable:1 - Disable:0 */
-#define SUPPORT_LE_POWER_CLASS_1					1 /* Enable\Disable Low power class 1 feature. Enable:1 - Disable:0 */
-#define SUPPORT_AOA_AOD								1 /* Enable\Disable AOA_AOD feature. Enable:1 - Disable:0 */
-#define SUPPORT_PERIODIC_SYNC_TRANSFER				1 /* Enable\Disable PAST feature. Enable:1 - Disable:0 */
+#define MAX_NUM_CNCRT_STAT_MCHNS                    8 /* Set maximum number of states the controller can support */
+#define USE_NON_ACCURATE_32K_SLEEP_CLK              1 /* Allow to drive the sleep clock by sources other than the default crystal oscillator source.*/
+                                                       /*LL can use crystal oscillator or RTC or RCO to drive the sleep clock.This selection is done via "DEFAULT_SLEEP_CLOCK_SOURCE" macro. */
+#define SUPPORT_LE_EXTENDED_ADVERTISING             1 /* Enable\Disable Extended advertising feature. Enable:1 - Disable:0 */
+#define SUPPORT_LE_PERIODIC_ADVERTISING             1 /* Enable\Disable Periodic advertising feature. Enable:1 - Disable:0 */
+#define SUPPORT_LE_POWER_CLASS_1                    1 /* Enable\Disable Low power class 1 feature. Enable:1 - Disable:0 */
+#define SUPPORT_AOA_AOD                             1 /* Enable\Disable AOA_AOD feature. Enable:1 - Disable:0 */
+#define SUPPORT_PERIODIC_SYNC_TRANSFER              1 /* Enable\Disable PAST feature. Enable:1 - Disable:0 */
 #define SUPPORT_SLEEP_CLOCK_ACCURCY_UPDATES         1 /* Enable\Disable Sleep Clock Accuracy Updates Feature. Enable:1 - Disable:0 */
 #define SUPPORT_CONNECTED_ISOCHRONOUS               1 /* Enable\Disable Connected Isochronous Channel Feature. Enable:1 - Disable:0 */
-#define SUPPORT_BRD_ISOCHRONOUS               		1 /* Enable\Disable Broadcast Isochronous Channel Feature. Enable:1 - Disable:0 */
-#define SUPPORT_SYNC_ISOCHRONOUS               		1 /* Enable\Disable Broadcast Isochronous Synchronizer Channel Feature. Enable:1 - Disable:0 */
-#define SUPPORT_LE_POWER_CONTROL					1 /* Enable\Disable LE Power Control Feature. Enable:1 - Disable:0 */
+#define SUPPORT_BRD_ISOCHRONOUS                     1 /* Enable\Disable Broadcast Isochronous Channel Feature. Enable:1 - Disable:0 */
+#define SUPPORT_SYNC_ISOCHRONOUS                    1 /* Enable\Disable Broadcast Isochronous Synchronizer Channel Feature. Enable:1 - Disable:0 */
+#define SUPPORT_LE_POWER_CONTROL                    1 /* Enable\Disable LE Power Control Feature. Enable:1 - Disable:0 */
 
 /* 5.3 features */
-#define SUPPORT_PERIODIC_ADV_ADI                                1
-#define SUPPORT_CHANNEL_CLASSIFICATION                          1
-#define SUPPORT_LE_ENHANCED_CONN_UPDATE                         1
-
-/* Capabilities configurations */
-#define MAX_NUM_CNCRT_STAT_MCHNS					8 /* Set maximum number of states the controller can support */
-#define USE_NON_ACCURATE_32K_SLEEP_CLK				1 /* Allow to drive the sleep clock by sources other than the default crystal oscillator source.*/
-													   /*LL can use crystal oscillator or RTC or RCO to drive the sleep clock.This selection is done via "DEFAULT_SLEEP_CLOCK_SOURCE" macro. */
+#define SUPPORT_PERIODIC_ADV_ADI                    1
+#define SUPPORT_CHANNEL_CLASSIFICATION              1
+#define SUPPORT_LE_ENHANCED_CONN_UPDATE             1
 
 /* Non-standard features configurations */
-#define NUM_OF_CTSM_EMNGR_HNDLS						1 /* Number of custom handles in event manager to be used for app specific needs */
-#define SUPPORT_AUGMENTED_BLE_MODE					1 /* Enable\Disable Augmented BLE Support. Enable:1 - Disable:0 */
-#define SUPPORT_PTA							1 /* Enable\Disable PTA Feature. Enable:1 - Disable:0 */
+#define NUM_OF_CTSM_EMNGR_HNDLS                     1 /* Number of custom handles in event manager to be used for app specific needs */
+#define SUPPORT_AUGMENTED_BLE_MODE                  1 /* Enable\Disable Augmented BLE Support. Enable:1 - Disable:0 */
+#define SUPPORT_PTA                                 1 /* Enable\Disable PTA Feature. Enable:1 - Disable:0 */
 
-#define SUPPORT_AUTONOMOUS_POWER_CONTROL_REQ                      (1)
+#define SUPPORT_AUTONOMOUS_POWER_CONTROL_REQ        1
 #define LL_BASIC  0
 
 /*************************** MAC Configuration *************************************/
 /*Configurations of MAC will apply only when MAC is enabled*/
-#define FFD_DEVICE_CONFIG							0 /* Enable\Disable FFD:1 - RFD:0 */
+#define FFD_DEVICE_CONFIG                           0 /* Enable\Disable FFD:1 - RFD:0 */
 #ifdef SUPPORT_AUG_MAC_HCI_UART
-#define RAL_NUMBER_OF_INSTANCE						0 /* The Number of RAL instances supported */
+#define RAL_NUMBER_OF_INSTANCE                      0 /* The Number of RAL instances supported */
 #else
-#define RAL_NUMBER_OF_INSTANCE						0 /* The Number of RAL instances supported */
+#define RAL_NUMBER_OF_INSTANCE                      0 /* The Number of RAL instances supported */
 #endif
-#define MAX_NUMBER_OF_INDIRECT_DATA 				0 /* The maximum number of supported indirect data buffers */
-#define SUPPORT_OPENTHREAD_1_2                  	0 /* Enable / disable FW parts related to new features introduced in openthread 1.2*/
-#define SUPPORT_SEC 								0 /* The MAC Security Supported : 1 - Not Supported:0 */
-#define RADIO_CSMA									0 /* Enable\Disable CSMA Algorithm in Radio Layer, Must be Enabled if MAC_LAYER_BUILD */
-#define SUPPORT_A_MAC								0
-#define SMPL_PRTCL_TEST_ENABLE 						0
+#define MAX_NUMBER_OF_INDIRECT_DATA                 0 /* The maximum number of supported indirect data buffers */
+#define SUPPORT_OPENTHREAD_1_2                      0 /* Enable / disable FW parts related to new features introduced in openthread 1.2*/
+#define SUPPORT_SEC                                 0 /* The MAC Security Supported : 1 - Not Supported:0 */
+#define RADIO_CSMA                                  0 /* Enable\Disable CSMA Algorithm in Radio Layer, Must be Enabled if MAC_LAYER_BUILD */
+#define SUPPORT_A_MAC                               0
+#define SMPL_PRTCL_TEST_ENABLE                      0
 
 #endif /* INCLUDE_LL_FW_CONFIG_H */
diff --git a/lib/stm32wba/hci/ll/ll_intf.h b/lib/stm32wba/hci/ll/ll_intf.h
index ef6f324cf..86c36c07f 100644
--- a/lib/stm32wba/hci/ll/ll_intf.h
+++ b/lib/stm32wba/hci/ll/ll_intf.h
@@ -1,4 +1,4 @@
-/*$Id: //dwh/bluetooth/DWC_ble154combo/firmware/rel/1.30a-SOW05Patchv6_2/firmware/public_inc/ll_intf.h#1 $*/
+/*$Id: //dwh/bluetooth/DWC_ble154combo/firmware/rel/1.32a-LCA00/firmware/public_inc/ll_intf.h#1 $*/
 /**
  ********************************************************************************
  * @file    ll_intf_cmds.h
@@ -4438,7 +4438,7 @@ ble_stat_t ll_intf_get_num_of_antennas(uint8_t *ptr_num_of_antennas);
  * @retval status  : [out] 0:SUCCESS, 0xXX:ERROR_CODE.
  */
 ble_stat_t ll_intf_set_dtm_with_spcfc_pckt_count(uint16_t pckt_count);
-
+#if SUPPORT_TIM_UPDT
 /**
  * @brief  used to update the event timing.
  *
@@ -4447,6 +4447,7 @@ ble_stat_t ll_intf_set_dtm_with_spcfc_pckt_count(uint16_t pckt_count);
  * @retval None
  */
 void ll_intf_config_schdling_time(Evnt_timing_t * p_evnt_timing);
+#endif /* SUPPORT_TIM_UPDT */
 /**@}
 */
 
diff --git a/lib/stm32wba/hci/ll/mem_intf.h b/lib/stm32wba/hci/ll/mem_intf.h
index 1f3e07b62..ddf9b5c9e 100644
--- a/lib/stm32wba/hci/ll/mem_intf.h
+++ b/lib/stm32wba/hci/ll/mem_intf.h
@@ -1,8 +1,4 @@
-/*$Id: //dwh/bluetooth/DWC_ble154combo/firmware/branches/P10164613/issue_2029/firmware/public_inc/mem_intf.h#2 $*/
-/*Version_INFO
-V2  --> Original version is 1.30a-SOW05PatchV6_2
-V2  --> combined patch case 01641860
-*/
+/*$Id: //dwh/bluetooth/DWC_ble154combo/firmware/rel/1.32a-LCA00/firmware/public_inc/mem_intf.h#1 $*/
 /**
  ********************************************************************************
  * @file    mem_intf.h
diff --git a/lib/stm32wba/hci/ll/os_wrapper.h b/lib/stm32wba/hci/ll/os_wrapper.h
index 3606a3990..89fe0ae01 100644
--- a/lib/stm32wba/hci/ll/os_wrapper.h
+++ b/lib/stm32wba/hci/ll/os_wrapper.h
@@ -1,4 +1,4 @@
-/*$Id: //dwh/bluetooth/DWC_ble154combo/firmware/rel/1.30a-SOW05Patchv6_2/firmware/public_inc/os_wrapper.h#1 $*/
+/*$Id: //dwh/bluetooth/DWC_ble154combo/firmware/rel/1.32a-LCA00/firmware/public_inc/os_wrapper.h#1 $*/
 /**
  ********************************************************************************
  * @file    os_wrapper.h
diff --git a/lib/stm32wba/hci/ll/power_table.h b/lib/stm32wba/hci/ll/power_table.h
index b9ca599d4..e032f7fb4 100644
--- a/lib/stm32wba/hci/ll/power_table.h
+++ b/lib/stm32wba/hci/ll/power_table.h
@@ -1,4 +1,4 @@
-/*$Id: //dwh/bluetooth/DWC_ble154combo/firmware/rel/1.30a-SOW05Patchv6_2/firmware/public_inc/power_table.h#1 $*/
+/*$Id: //dwh/bluetooth/DWC_ble154combo/firmware/rel/1.32a-LCA00/firmware/public_inc/power_table.h#1 $*/
 /**
  ******************************************************************************
  * @file    power_table.h
diff --git a/lib/stm32wba/hci/ll_sys.h b/lib/stm32wba/hci/ll_sys.h
index 8a489cd1c..4418212b8 100644
--- a/lib/stm32wba/hci/ll_sys.h
+++ b/lib/stm32wba/hci/ll_sys.h
@@ -60,6 +60,7 @@ typedef enum
 
 /* Link Layer system interface general module functions  ************************************************/
 void ll_sys_init(void);
+void ll_sys_reset(void);
 void ll_sys_delay_us(uint32_t delay);
 void ll_sys_assert(uint8_t condition);
 void ll_sys_get_rng(uint8_t *ptr_rnd, uint32_t len);
@@ -105,4 +106,19 @@ void ll_sys_dp_slp_wakeup_evt_clbk(void const *ptr_arg);
   */
 uint8_t ll_sys_get_concurrent_state_machines_num(void);
 
-#endif /* LL_SYS_H */
+#if BLE
+/**
+  * @brief  Updating Link Layer BLE timings
+  * @param  drift_time[in]: number of Link Layer sleep timer cycles (1 cycle = 31us) for the DRIFT TIME timing.
+  * @param  exec_time[in]: number of Link Layer sleep timer cycles (1 cycle = 31us)  for the EXEC TIME timing.
+  * @note   This interface needs to be called after system initialization
+  *         and before starting any radio activity.
+  * @retval None
+  */
+void ll_sys_config_BLE_schldr_timings(uint8_t drift_time, uint8_t exec_time);
+#endif /* BLE */
+
+uint32_t ll_intf_cmn_get_slptmr_value(void);
+
+
+#endif /* LL_SYS_H */
\ No newline at end of file
diff --git a/lib/stm32wba/hci/ll_sys_cs.c b/lib/stm32wba/hci/ll_sys_cs.c
index aab59dfb5..93f424d95 100644
--- a/lib/stm32wba/hci/ll_sys_cs.c
+++ b/lib/stm32wba/hci/ll_sys_cs.c
@@ -67,4 +67,4 @@ void ll_sys_enable_os_context_switch(void)
 void ll_sys_disable_os_context_switch(void)
 {
   LINKLAYER_PLAT_DisableOSContextSwitch();
-}
+}
\ No newline at end of file
diff --git a/lib/stm32wba/hci/ll_sys_dp_slp.c b/lib/stm32wba/hci/ll_sys_dp_slp.c
index 396316da7..891d40755 100644
--- a/lib/stm32wba/hci/ll_sys_dp_slp.c
+++ b/lib/stm32wba/hci/ll_sys_dp_slp.c
@@ -18,10 +18,7 @@
 
 #include "linklayer_plat.h"
 #include "ll_sys.h"
-#include "ll_intf.h"
-#if defined(MAC)
-#include "platform.h"
-#endif
+#include "ll_intf_cmn.h"
 
 /* Link Layer deep sleep status */
 uint8_t is_Radio_DeepSleep = 0U;
@@ -44,6 +41,9 @@ ll_sys_status_t ll_sys_dp_slp_init(void)
   /* Create link layer timer for handling IP DEEP SLEEP mode */
   radio_dp_slp_tmr_id = os_timer_create((t_timer_callbk)ll_sys_dp_slp_wakeup_evt_clbk, os_timer_once, NULL);
 
+  /* Set priority of deep sleep timer */
+  os_timer_set_prio(radio_dp_slp_tmr_id, hg_prio_tmr);
+
   if (radio_dp_slp_tmr_id != NULL)
   {
     return_status = LL_SYS_OK;
@@ -68,7 +68,7 @@ ll_sys_dp_slp_state_t ll_sys_dp_slp_get_state(void)
   * @retval LL_SYS status
   */
 ll_sys_status_t ll_sys_dp_slp_enter(uint32_t dp_slp_duration){
-  ble_stat_t cmd_status = GENERAL_FAILURE;
+  ble_stat_t cmd_status;
   int32_t os_status = GENERAL_FAILURE;
   ll_sys_status_t return_status = LL_SYS_ERROR;
 
@@ -88,17 +88,7 @@ ll_sys_status_t ll_sys_dp_slp_enter(uint32_t dp_slp_duration){
   if(os_status == SUCCESS)
   {
     /* Switch Link Layer IP to DEEP SLEEP mode */
-#if defined(BLE)
-    /* BLE & Concurrent use case */
-    cmd_status = ll_intf_le_set_dp_slp_mode(DEEP_SLEEP_ENABLE);
-#elif defined(MAC)
-    if (radio_set_dp_slp_mode(DEEP_SLEEP_ENABLE) == OT_ERROR_NONE)
-    {
-      cmd_status = SUCCESS;
-    }
-#else
- #error "neither MAC not BLE defined"
-#endif
+    cmd_status = ll_intf_cmn_le_set_dp_slp_mode(DEEP_SLEEP_ENABLE);
     if(cmd_status == SUCCESS){
       linklayer_dp_slp_state = LL_SYS_DP_SLP_ENABLED;
       return_status = LL_SYS_OK;
@@ -114,7 +104,7 @@ ll_sys_status_t ll_sys_dp_slp_enter(uint32_t dp_slp_duration){
   * @retval LL_SYS status
   */
 ll_sys_status_t ll_sys_dp_slp_exit(void){
-  ble_stat_t cmd_status = GENERAL_FAILURE;
+  ble_stat_t cmd_status;
   ll_sys_status_t return_status = LL_SYS_ERROR;
 
   /* Disable radio interrupt */
@@ -134,17 +124,7 @@ ll_sys_status_t ll_sys_dp_slp_exit(void){
     }
 
     /* Switch Link Layer IP to SLEEP mode (by deactivate DEEP SLEEP mode) */
-#if defined(BLE)
-    /* BLE & Concurrent use case */
-    cmd_status = ll_intf_le_set_dp_slp_mode(DEEP_SLEEP_DISABLE);
-#elif defined(MAC)
-    if (radio_set_dp_slp_mode(DEEP_SLEEP_DISABLE) == OT_ERROR_NONE)
-    {
-      cmd_status = SUCCESS;
-    }
-#else
- #error "neither MAC not BLE defined"
-#endif
+    cmd_status = ll_intf_cmn_le_set_dp_slp_mode(DEEP_SLEEP_DISABLE);
     if(cmd_status == SUCCESS)
     {
       linklayer_dp_slp_state = LL_SYS_DP_SLP_DISABLED;
@@ -164,7 +144,7 @@ ll_sys_status_t ll_sys_dp_slp_exit(void){
   * @retval LL_SYS status
   */
 void ll_sys_dp_slp_wakeup_evt_clbk(void const *ptr_arg){
-  int32_t os_status = GENERAL_FAILURE;
+  int32_t os_status;
 
   /* Stop the Link Layer IP DEEP SLEEP wake-up timer */
   os_status = os_timer_stop(radio_dp_slp_tmr_id);
diff --git a/lib/stm32wba/hci/ll_sys_intf.c b/lib/stm32wba/hci/ll_sys_intf.c
index e8151693d..2b4634035 100644
--- a/lib/stm32wba/hci/ll_sys_intf.c
+++ b/lib/stm32wba/hci/ll_sys_intf.c
@@ -21,6 +21,9 @@
 #include "event_manager.h"
 #include "ll_intf.h"
 
+extern uint8_t AHB5_SwitchedOff;
+extern uint32_t radio_sleep_timer_val;
+
 /**
   * @brief  Initialize the Link Layer SoC dependencies
   * @param  None
@@ -68,9 +71,15 @@ void ll_sys_radio_ack_ctrl(uint8_t enable)
   */
 void ll_sys_radio_wait_for_busclkrdy(void)
 {
-  LINKLAYER_PLAT_WaitHclkRdy();
+  /* Wait on radio bus clock readiness if it has been turned of */
+  if (AHB5_SwitchedOff == 1)
+  {
+    AHB5_SwitchedOff = 0;
+    while (radio_sleep_timer_val == ll_intf_cmn_get_slptmr_value());
+  }
 }
 
+
 /**
   * @brief  Get RNG number for the Link Layer IP
   * @param  None
diff --git a/lib/stm32wba/hci/ll_sys_startup.c b/lib/stm32wba/hci/ll_sys_startup.c
index d2e6fad36..4c8f071dc 100644
--- a/lib/stm32wba/hci/ll_sys_startup.c
+++ b/lib/stm32wba/hci/ll_sys_startup.c
@@ -26,11 +26,16 @@
 #include "st_mac_802_15_4_sap.h"
 #endif /* MAC */
 
+/**
+  * @brief  Missed HCI event flag
+  */
+uint8_t missed_hci_event_flag = 0;
+
 static void ll_sys_dependencies_init(void);
 #ifdef BLE
 static void ll_sys_event_missed_cb( ble_buff_hdr_t* ptr_evnt_hdr )
 {
-
+  missed_hci_event_flag = 1;
 }
 
 /**
@@ -40,7 +45,8 @@ static void ll_sys_event_missed_cb( ble_buff_hdr_t* ptr_evnt_hdr )
   */
 void ll_sys_ble_cntrl_init(hst_cbk hostCallback)
 {
-  const struct hci_dispatch_tbl* p_hci_dis_tbl;
+  const struct hci_dispatch_tbl* p_hci_dis_tbl = NULL;
+
   hci_get_dis_tbl( &p_hci_dis_tbl );
 
   ll_intf_init(p_hci_dis_tbl);
@@ -84,7 +90,14 @@ void ll_sys_thread_init(void)
   */
 static void ll_sys_dependencies_init(void)
 {
-  ll_sys_status_t dp_slp_status = LL_SYS_ERROR;
+  static uint8_t is_ll_initialized = 0;
+  ll_sys_status_t dp_slp_status;
+
+  /* Ensure Link Layer resources are created only once */
+  if (is_ll_initialized == 1) {
+    return;
+  }
+  is_ll_initialized = 1;
 
   /* Deep sleep feature initialization */
   dp_slp_status = ll_sys_dp_slp_init();
@@ -95,4 +108,4 @@ static void ll_sys_dependencies_init(void)
 
   /* Link Layer user parameters application */
   ll_sys_config_params();
-}
+}
\ No newline at end of file
diff --git a/lib/stm32wba/hci/ll_sys_startup.h b/lib/stm32wba/hci/ll_sys_startup.h
index a4e7d2b44..c9018f760 100644
--- a/lib/stm32wba/hci/ll_sys_startup.h
+++ b/lib/stm32wba/hci/ll_sys_startup.h
@@ -26,4 +26,4 @@ void ll_sys_ble_cntrl_init(hst_cbk hostCallback);
 void ll_sys_mac_cntrl_init(void);
 void ll_sys_thread_init(void);
 
-#endif /* LL_SYS_STARTUP_H */
+#endif /* LL_SYS_STARTUP_H */
\ No newline at end of file
diff --git a/lib/stm32wba/hci/log_module.c b/lib/stm32wba/hci/log_module.c
index 74b5c48f3..3fde2be7a 100644
--- a/lib/stm32wba/hci/log_module.c
+++ b/lib/stm32wba/hci/log_module.c
@@ -181,7 +181,7 @@ void Log_Module_PrintWithArg( Log_Verbose_Level_t eVerboseLevel, Log_Region_t eR
   if ( pLogTimeStampFunc != NULL )
   {
      iTempSize = UTIL_ADV_TRACE_TMP_BUF_SIZE - iBuffSize;
-     pLogTimeStampFunc( &szFullText[iBuffSize], &iTempSize );
+     pLogTimeStampFunc( &szFullText[iBuffSize], iTempSize, &iTempSize );
      iBuffSize += iTempSize;
   }
 #endif /* LOG_INSERT_TIME_STAMP_INSIDE_THE_TRACE */
diff --git a/lib/stm32wba/hci/log_module.h b/lib/stm32wba/hci/log_module.h
index 1220b829b..9dfb0a71e 100644
--- a/lib/stm32wba/hci/log_module.h
+++ b/lib/stm32wba/hci/log_module.h
@@ -30,6 +30,7 @@ extern "C" {
 #include <stdarg.h>
 #include <stdint.h>
 #include <stdbool.h>
+#include "app_conf.h"
 
 /* Private includes ----------------------------------------------------------*/
 /* USER CODE BEGIN Includes */
@@ -288,12 +289,24 @@ void Log_Module_PrintWithArg( Log_Verbose_Level_t eVerboseLevel, Log_Region_t eR
 /* USER CODE END EFP */
 
 /* Exported macro ------------------------------------------------------------*/
+/* Display 64 bits number for all compiler. */
+/* Example : LOG_INFO_APP( "New Device : " LOG_DISPLAY64() " installed in %d seconds", LOG_NUMBER64( dlDevice ), iTime ); */
+#define LOG_DISPLAY64()             "0x%08X%08X"
+#define LOG_NUMBER64( number )      (uint32_t)( number >> 32u ), (uint32_t)( number )
+
 /* Module API - Log macros for each region */
 /* LOG_REGION_BLE */
+#if (CFG_LOG_SUPPORTED != 0)
 #define LOG_INFO_BLE(...)         Log_Module_Print( LOG_VERBOSE_INFO, LOG_REGION_BLE, __VA_ARGS__)
 #define LOG_ERROR_BLE(...)        Log_Module_Print( LOG_VERBOSE_ERROR, LOG_REGION_BLE, __VA_ARGS__)
 #define LOG_WARNING_BLE(...)      Log_Module_Print( LOG_VERBOSE_WARNING, LOG_REGION_BLE, __VA_ARGS__)
 #define LOG_DEBUG_BLE(...)        Log_Module_Print( LOG_VERBOSE_DEBUG, LOG_REGION_BLE, __VA_ARGS__)
+#else /* (CFG_LOG_SUPPORTED != 0) */
+#define LOG_INFO_BLE(...)         do {} while(0)
+#define LOG_ERROR_BLE(...)        do {} while(0)
+#define LOG_WARNING_BLE(...)      do {} while(0)
+#define LOG_DEBUG_BLE(...)        do {} while(0)
+#endif /* (CFG_LOG_SUPPORTED != 0) */
 
 /* USER CODE BEGIN LOG_REGION_BLE */
 /**
@@ -310,10 +323,17 @@ void Log_Module_PrintWithArg( Log_Verbose_Level_t eVerboseLevel, Log_Region_t eR
 /* USER CODE END LOG_REGION_BLE */
 
 /* LOG_REGION_SYSTEM */
+#if (CFG_LOG_SUPPORTED != 0)
 #define LOG_INFO_SYSTEM(...)      Log_Module_Print( LOG_VERBOSE_INFO, LOG_REGION_SYSTEM, __VA_ARGS__)
 #define LOG_ERROR_SYSTEM(...)     Log_Module_Print( LOG_VERBOSE_ERROR, LOG_REGION_SYSTEM, __VA_ARGS__)
 #define LOG_WARNING_SYSTEM(...)   Log_Module_Print( LOG_VERBOSE_WARNING, LOG_REGION_SYSTEM, __VA_ARGS__)
 #define LOG_DEBUG_SYSTEM(...)     Log_Module_Print( LOG_VERBOSE_DEBUG, LOG_REGION_SYSTEM, __VA_ARGS__)
+#else /* (CFG_LOG_SUPPORTED != 0) */
+#define LOG_INFO_SYSTEM(...)      do {} while(0)
+#define LOG_ERROR_SYSTEM(...)     do {} while(0)
+#define LOG_WARNING_SYSTEM(...)   do {} while(0)
+#define LOG_DEBUG_SYSTEM(...)     do {} while(0)
+#endif /* (CFG_LOG_SUPPORTED != 0) */
 
 /* USER CODE BEGIN LOG_REGION_SYSTEM */
 /**
@@ -330,10 +350,17 @@ void Log_Module_PrintWithArg( Log_Verbose_Level_t eVerboseLevel, Log_Region_t eR
 /* USER CODE END LOG_REGION_SYSTEM */
 
 /* LOG_REGION_APP */
+#if (CFG_LOG_SUPPORTED != 0)
 #define LOG_INFO_APP(...)       Log_Module_Print( LOG_VERBOSE_INFO, LOG_REGION_APP, __VA_ARGS__)
 #define LOG_ERROR_APP(...)      Log_Module_Print( LOG_VERBOSE_ERROR, LOG_REGION_APP, __VA_ARGS__)
 #define LOG_WARNING_APP(...)    Log_Module_Print( LOG_VERBOSE_WARNING, LOG_REGION_APP, __VA_ARGS__)
 #define LOG_DEBUG_APP(...)      Log_Module_Print( LOG_VERBOSE_DEBUG, LOG_REGION_APP, __VA_ARGS__)
+#else /* (CFG_LOG_SUPPORTED != 0) */
+#define LOG_INFO_APP(...)       do {} while(0)
+#define LOG_ERROR_APP(...)      do {} while(0)
+#define LOG_WARNING_APP(...)    do {} while(0)
+#define LOG_DEBUG_APP(...)      do {} while(0)
+#endif /* (CFG_LOG_SUPPORTED != 0) */
 
 /* USER CODE BEGIN LOG_REGION_APP */
 /**
@@ -354,10 +381,17 @@ void Log_Module_PrintWithArg( Log_Verbose_Level_t eVerboseLevel, Log_Region_t eR
  * Add inside this user section your defines to match the new regions you
  * created into Log_Region_t.
  * Example :
+ * #if (CFG_LOG_SUPPORTED != 0)
  * #define LOG_INFO_CUSTOM(...)       Log_Module_Print( LOG_VERBOSE_INFO, LOG_REGION_CUSTOM, __VA_ARGS__)
  * #define LOG_ERROR_CUSTOM(...)      Log_Module_Print( LOG_VERBOSE_ERROR, LOG_REGION_CUSTOM, __VA_ARGS__)
  * #define LOG_WARNING_CUSTOM(...)    Log_Module_Print( LOG_VERBOSE_WARNING, LOG_REGION_CUSTOM, __VA_ARGS__)
  * #define LOG_DEBUG_CUSTOM(...)      Log_Module_Print( LOG_VERBOSE_DEBUG, LOG_REGION_CUSTOM, __VA_ARGS__)
+ * #else
+ * #define LOG_INFO_CUSTOM(...)       do {} while(0)
+ * #define LOG_ERROR_CUSTOM(...)      do {} while(0)
+ * #define LOG_WARNING_CUSTOM(...)    do {} while(0)
+ * #define LOG_DEBUG_CUSTOM(...)      do {} while(0)
+ * #endif
  */
 
 /* USER CODE END APP_LOG_USER_DEFINES */
diff --git a/lib/stm32wba/hci/pta.h b/lib/stm32wba/hci/pta.h
index 7df639abd..afbed1c55 100644
--- a/lib/stm32wba/hci/pta.h
+++ b/lib/stm32wba/hci/pta.h
@@ -1,4 +1,4 @@
-/*$Id: //dwh/bluetooth/DWC_ble154combo/firmware/rel/1.30a-SOW05Patchv6_2/firmware/public_inc/pta.h#1 $*/
+/*$Id: //dwh/bluetooth/DWC_ble154combo/firmware/rel/1.32a-LCA00/firmware/public_inc/pta.h#1 $*/
 /**
  ******************************************************************************
  * @file    pta.h
diff --git a/lib/stm32wba/hci/scm.c b/lib/stm32wba/hci/scm.c
index 5024e5df2..599725ac0 100644
--- a/lib/stm32wba/hci/scm.c
+++ b/lib/stm32wba/hci/scm.c
@@ -20,11 +20,10 @@
 
 /* Includes ------------------------------------------------------------------*/
 #include "scm.h"
-#if (RT_DEBUG_GPIO_MODULE==1)
 #include "RTDebug.h"
-#endif
+#include "utilities_common.h"
 
-#if (CFG_SCM_SUPPORTED==1)
+#if (CFG_SCM_SUPPORTED == 1)
 
 __weak void SCM_HSI_CLK_ON(void)
 {
@@ -73,7 +72,7 @@ static void SwitchHse32toHse16(void);
 static void SwitchPlltoHse32(void);
 
 /* Private functions ---------------------------------------------------------*/
-static scm_clockconfig_t scm_getmaxfreq(void)
+OPTIMIZED static scm_clockconfig_t scm_getmaxfreq(void)
 {
   uint8_t idx = 0;
   scm_clockconfig_t max = NO_CLOCK_CONFIG;
@@ -89,11 +88,10 @@ static scm_clockconfig_t scm_getmaxfreq(void)
   return max;
 }
 
-static void scm_systemclockconfig(void)
+OPTIMIZED static void scm_systemclockconfig(void)
 {
-#if (RT_DEBUG_GPIO_MODULE==1)
   SYSTEM_DEBUG_SIGNAL_SET(SCM_SYSTEM_CLOCK_CONFIG);
-#endif
+
   switch (scm_system_clock_config.targeted_clock_freq)
   {
     case HSE_16MHZ:
@@ -168,12 +166,11 @@ static void scm_systemclockconfig(void)
     default:
       break;
   }
-#if (RT_DEBUG_GPIO_MODULE==1)
+
   SYSTEM_DEBUG_SIGNAL_RESET(SCM_SYSTEM_CLOCK_CONFIG);
-#endif
 }
 
-static void SwitchHsePre(scm_hse_hsepre_t hse_pre)
+OPTIMIZED static void SwitchHsePre(scm_hse_hsepre_t hse_pre)
 {
   /* Start HSI */
   SCM_HSI_CLK_ON();
@@ -204,7 +201,7 @@ static void SwitchHsePre(scm_hse_hsepre_t hse_pre)
   SCM_HSI_CLK_OFF();
 }
 
-static void SwitchHse16toHse32(void)
+OPTIMIZED static void SwitchHse16toHse32(void)
 {
   /**
     * Switch from HSE_16MHz to HSE_32MHz
@@ -228,7 +225,7 @@ static void SwitchHse16toHse32(void)
   LL_RCC_SetAHB5Divider(LL_RCC_AHB5_DIVIDER_1); /* divided by 1 */
 }
 
-static void SwitchHse32toHse16(void)
+OPTIMIZED static void SwitchHse32toHse16(void)
 {
   /**
     * Switch from HSE_16MHz to HSE_32MHz
@@ -250,7 +247,7 @@ static void SwitchHse32toHse16(void)
   LL_PWR_SetRegulVoltageScaling(LL_PWR_REGU_VOLTAGE_SCALE2);
 }
 
-static void SwitchPlltoHse32(void)
+OPTIMIZED static void SwitchPlltoHse32(void)
 {
   /**
     * Switch from PLL to HSE_32MHz
@@ -270,7 +267,7 @@ static void SwitchPlltoHse32(void)
   scm_setwaitstates(HSE32);
 }
 
-static void ConfigStartPll(void)
+OPTIMIZED static void ConfigStartPll(void)
 {
   /* Enable PLL1 output for SYSCLK (PLL1R) */
   LL_RCC_PLL1_EnableDomain_PLL1R();
@@ -335,7 +332,7 @@ static void ConfigHwPll(scm_pll_config_t *p_hw_config)
   * @param  None
   * @retval None
   */
-void scm_init()
+OPTIMIZED void scm_init()
 {
   /* init scm_system_clock_config with LP config
    * scm_system_clock_config SHALL BE UPDATED BY READING HW CONFIG FROM HAL APIs
@@ -426,11 +423,10 @@ void scm_init()
   * @param  None
   * @retval None
   */
-void scm_setup(void)
+OPTIMIZED void scm_setup(void)
 {
-  #if (RT_DEBUG_GPIO_MODULE==1)
   SYSTEM_DEBUG_SIGNAL_SET(SCM_SETUP);
-#endif
+
   /* System clock is now on HSI 16Mhz, as it exits from stop mode */
 
   /* Start HSE */
@@ -495,7 +491,7 @@ void scm_setup(void)
   * @retval None
   * @note   scm_pll_setconfig to be called before PLL activation (PLL set as system core clock)
   */
-void scm_pll_setconfig(const scm_pll_config_t *p_pll_config)
+OPTIMIZED void scm_pll_setconfig(const scm_pll_config_t *p_pll_config)
 {
   /* Initial PLL configuration */
   scm_system_clock_config.pll.PLLM = p_pll_config->PLLM;
@@ -518,7 +514,7 @@ void scm_pll_setconfig(const scm_pll_config_t *p_pll_config)
   *         running on the PLL with a different configuration that the
   *         one required
   */
-void scm_pll_fractional_update(uint32_t pll_frac)
+OPTIMIZED void scm_pll_fractional_update(uint32_t pll_frac)
 {
   /* PLL1FRACEN set to 0 */
   LL_RCC_PLL1FRACN_Disable();
@@ -544,7 +540,7 @@ void scm_pll_fractional_update(uint32_t pll_frac)
   *         @arg SYS_PLL
   * @retval None
   */
-void scm_setsystemclock(scm_user_id_t user_id, scm_clockconfig_t sysclockconfig)
+OPTIMIZED void scm_setsystemclock(scm_user_id_t user_id, scm_clockconfig_t sysclockconfig)
 {
   scm_clockconfig_t max_freq_requested;
 
@@ -655,7 +651,7 @@ __WEAK void scm_pllready(void)
   *         @arg PLL
   * @retval None
   */
-void scm_setwaitstates(const scm_ws_lp_t ws_lp_config)
+OPTIMIZED void scm_setwaitstates(const scm_ws_lp_t ws_lp_config)
 {
   /* Configure flash and SRAMs */
   switch (ws_lp_config) {
@@ -715,11 +711,10 @@ void scm_setwaitstates(const scm_ws_lp_t ws_lp_config)
   * @param  None
   * @retval None
   */
-void scm_hserdy_isr(void)
+OPTIMIZED void scm_hserdy_isr(void)
 {
-  #if (RT_DEBUG_GPIO_MODULE==1)
   SYSTEM_DEBUG_SIGNAL_SET(SCM_HSERDY_ISR);
-#endif
+
   if(LL_RCC_GetSysClkSource() == LL_RCC_SYS_CLKSOURCE_STATUS_HSI)
   {
     /* Wait until VOS has changed */
@@ -783,7 +778,7 @@ void scm_hserdy_isr(void)
   * @param  None
   * @retval None
   */
-void scm_pllrdy_isr(void)
+OPTIMIZED void scm_pllrdy_isr(void)
 {
   if(scm_system_clock_config.targeted_clock_freq == SYS_PLL)
   {
@@ -821,7 +816,7 @@ void scm_pllrdy_isr(void)
   *         @arg SCM_RADIO_NOT_ACTIVE
   * @retval None
   */
-void scm_notifyradiostate(const scm_radio_state_t radio_state)
+OPTIMIZED void scm_notifyradiostate(const scm_radio_state_t radio_state)
 {
   if(radio_state != SCM_RADIO_NOT_ACTIVE)
   {
@@ -840,7 +835,7 @@ void scm_notifyradiostate(const scm_radio_state_t radio_state)
   * @param  None
   * @retval None
   */
-void scm_standbyexit(void)
+OPTIMIZED void scm_standbyexit(void)
 {
   if(scm_system_clock_config.pll.are_pll_params_initialized == 1)
   {
diff --git a/lib/stm32wba/hci/utilities_common.h b/lib/stm32wba/hci/utilities_common.h
index 46a7e75ff..85e42ad3b 100644
--- a/lib/stm32wba/hci/utilities_common.h
+++ b/lib/stm32wba/hci/utilities_common.h
@@ -140,4 +140,22 @@ extern "C" {
             for(volatile unsigned int cpt = 178 ; cpt!=0 ; --cpt);\
            } while(0)
 
+#define STM32WBA5x_DEFAULT_SCA_RANGE          (0)
+#define STM32WBA5x_REV_ID_A_SCA_RANGE         (STM32WBA5x_DEFAULT_SCA_RANGE)
+#define STM32WBA5x_REV_ID_B_SCA_RANGE         (4)
+
+/* Macro helper for optimizing by speed specific functions.
+ * For IAR only: The functions with this definition will be optimized
+ * by speed only if the project uses a High optimisation level.
+ */
+#if defined(__IAR_SYSTEMS_ICC__)
+#define OPTIMIZED _Pragma("optimize=speed")
+#elif defined(__clang__)
+#define OPTIMIZED   _Pragma("pragma Ofast")
+#elif defined(__GNUC__)
+#define OPTIMIZED   __attribute__((optimize("Ofast")))
+#endif
+
+#define UTIL_UNUSED(X) (void)X      /* To avoid gcc/g++ warnings */
+
 #endif /* UTILITIES_COMMON_H */
diff --git a/lib/stm32wba/hci/utilities_conf.h b/lib/stm32wba/hci/utilities_conf.h
index 56d7d6718..8365e3bdb 100644
--- a/lib/stm32wba/hci/utilities_conf.h
+++ b/lib/stm32wba/hci/utilities_conf.h
@@ -28,7 +28,7 @@ extern "C" {
 
 /* Includes ------------------------------------------------------------------*/
 #include "cmsis_compiler.h"
-
+#include "app_conf.h"
 /* definitions to be provided to "sequencer" utility */
 #include "stm32_mem.h"
 /* definition and callback for tiny_vsnprintf */
@@ -148,9 +148,9 @@ extern "C" {
 #define UTIL_ADV_TRACE_INIT_CRITICAL_SECTION( )    UTILS_INIT_CRITICAL_SECTION()         /*!< init the critical section in trace feature */
 #define UTIL_ADV_TRACE_ENTER_CRITICAL_SECTION( )   UTILS_ENTER_CRITICAL_SECTION()        /*!< enter the critical section in trace feature */
 #define UTIL_ADV_TRACE_EXIT_CRITICAL_SECTION( )    UTILS_EXIT_CRITICAL_SECTION()         /*!< exit the critical section in trace feature */
-#define UTIL_ADV_TRACE_TMP_BUF_SIZE                (256U)                                /*!< default trace buffer size */
-#define UTIL_ADV_TRACE_TMP_MAX_TIMESTMAP_SIZE      (15U)                                 /*!< default trace timestamp size */
-#define UTIL_ADV_TRACE_FIFO_SIZE                   (4096U)                               /*!< default trace fifo size */
+#define UTIL_ADV_TRACE_TMP_BUF_SIZE                (CFG_LOG_TRACE_BUF_SIZE)              /*!< trace buffer size */
+#define UTIL_ADV_TRACE_TMP_MAX_TIMESTMAP_SIZE      (15U)                                 /*!< trace timestamp size */
+#define UTIL_ADV_TRACE_FIFO_SIZE                   (CFG_LOG_TRACE_FIFO_SIZE)             /*!< trace fifo size */
 #define UTIL_ADV_TRACE_MEMSET8( dest, value, size) UTIL_MEM_set_8((dest),(value),(size)) /*!< memset utilities interface to trace feature */
 #define UTIL_ADV_TRACE_VSNPRINTF(...)              vsnprintf(__VA_ARGS__)      /*!< vsnprintf utilities interface to trace feature */
 
diff --git a/zephyr/module.yml b/zephyr/module.yml
index 9118f3cdb..5c09d1d24 100644
--- a/zephyr/module.yml
+++ b/zephyr/module.yml
@@ -5,16 +5,16 @@ build:
     dts_root: .
 blobs:
   - path: stm32wba/lib/LinkLayer_BLE_Full_lib.a
-    sha256: 28e351fb2c64ae9ddc15b3e29aa80bd5ce265a6fb9b03a9c604b54554c5c068b 
+    sha256: 733fb35f978080e6e39ddaa18e37fc6ab1c694550c5b3c863f30457fa6d3968a
     type: lib
-    version: '1.3.1'
+    version: '1.4.1'
     license-path: zephyr/blobs/stm32wba/lib/license.md
-    url: https://github.com/STMicroelectronics/STM32CubeWBA/raw/v1.3.1/Middlewares/ST/STM32_WPAN/link_layer/ll_cmd_lib/lib/LinkLayer_BLE_Full_lib.a
+    url: https://github.com/STMicroelectronics/STM32CubeWBA/raw/v1.4.1/Middlewares/ST/STM32_WPAN/link_layer/ll_cmd_lib/lib/LinkLayer_BLE_Full_lib.a
     description: "Binary Link Layer library for the STM32WBA Bluetooth subsystem"
   - path: stm32wba/lib/stm32wba_ble_stack_llo.a
-    sha256: 8f0fb725f1c3facf0b53a67af5c001f16eb2e056f3d319f64c7f94799065e358
+    sha256: 1fb1287b04105ee6de2709a0239ffb849aa55f577b5234fdfff401b9dec9fcb7
     type: lib
-    version: '1.3.1'
+    version: '1.4.1'
     license-path: zephyr/blobs/stm32wba/lib/license.md
-    url: https://github.com/STMicroelectronics/STM32CubeWBA/raw/v1.3.1/Middlewares/ST/STM32_WPAN/ble/stack/lib/stm32wba_ble_stack_llo.a
+    url: https://github.com/STMicroelectronics/STM32CubeWBA/raw/v1.4.1/Middlewares/ST/STM32_WPAN/ble/stack/lib/stm32wba_ble_stack_llo.a
     description: "Binary Stack library for the STM32WBA Bluetooth subsystem"