diff --git a/dts/arm/silabs/efr32bg22.dtsi b/dts/arm/silabs/efr32bg22.dtsi
index 87b14206936932..9d0bd14c6b93ac 100644
--- a/dts/arm/silabs/efr32bg22.dtsi
+++ b/dts/arm/silabs/efr32bg22.dtsi
@@ -54,6 +54,10 @@
 	clocks = <&cmu CLOCK_GPIO CLOCK_BRANCH_PCLK>;
 };
 
+&dma0 {
+	interrupts = <21 0>;
+};
+
 &i2c0 {
 	interrupts = <27 0>;
 	clocks = <&cmu CLOCK_I2C0 CLOCK_BRANCH_LSPCLK>;
diff --git a/dts/arm/silabs/efr32bg27.dtsi b/dts/arm/silabs/efr32bg27.dtsi
index 3a3b7e181affbb..1a39b55a975330 100644
--- a/dts/arm/silabs/efr32bg27.dtsi
+++ b/dts/arm/silabs/efr32bg27.dtsi
@@ -103,3 +103,7 @@
 &dcdc {
 	interrupts = <8 0>;
 };
+
+&dma0 {
+	interrupts = <26 0>;
+};
diff --git a/dts/arm/silabs/efr32bg2x.dtsi b/dts/arm/silabs/efr32bg2x.dtsi
index b5104346e65aaa..fb88bb9555f0e0 100644
--- a/dts/arm/silabs/efr32bg2x.dtsi
+++ b/dts/arm/silabs/efr32bg2x.dtsi
@@ -343,6 +343,14 @@
 			reg = <0x5003c440 0xbc0>;
 		};
 
+		dma0: dma@40040000{
+			compatible = "silabs,ldma";
+			reg = <0x40040000 0x4000>;
+			#dma-cells = <3>;
+			dma_channels = <8>;
+			status = "disabled";
+		};
+
 		wdog0: wdog@4a018000 {
 			compatible = "silabs,gecko-wdog";
 			reg = <0x4A018000 0x3028>;
diff --git a/dts/arm/silabs/efr32mg21.dtsi b/dts/arm/silabs/efr32mg21.dtsi
index 8bf0900a9bf7f8..925969d7dfcb08 100644
--- a/dts/arm/silabs/efr32mg21.dtsi
+++ b/dts/arm/silabs/efr32mg21.dtsi
@@ -329,6 +329,15 @@
 			status = "okay";
 		};
 
+		dma0: dma@40040000{
+			compatible = "silabs,ldma";
+			reg = <0x40040000 0x4000>;
+			interrupts = <21 0>;
+			#dma-cells = <3>;
+			dma_channels = <8>;
+			status = "disabled";
+		};
+
 		wdog0: wdog@5a018000 {
 			compatible = "silabs,gecko-wdog";
 			reg = <0x5a018000 0x2C>;
diff --git a/dts/arm/silabs/efr32mg24.dtsi b/dts/arm/silabs/efr32mg24.dtsi
index bf40ebc5078669..ac2873152b2c49 100644
--- a/dts/arm/silabs/efr32mg24.dtsi
+++ b/dts/arm/silabs/efr32mg24.dtsi
@@ -394,6 +394,15 @@
 			reg = <0x5003c440 0xbc0>;
 		};
 
+		dma0: dma@40040000 {
+			compatible = "silabs,ldma";
+			reg = <0x40040000 0x4000>;
+			interrupts = <21 0>;
+			#dma-cells = <3>;
+			dma_channels = <8>;
+			status = "disabled";
+		};
+
 		wdog0: wdog@5b004000 {
 			compatible = "silabs,gecko-wdog";
 			reg = <0x5b004000 0x2C>;
diff --git a/dts/bindings/dma/silabs,ldma.yaml b/dts/bindings/dma/silabs,ldma.yaml
new file mode 100644
index 00000000000000..b27f9ada0eff23
--- /dev/null
+++ b/dts/bindings/dma/silabs,ldma.yaml
@@ -0,0 +1,26 @@
+# Copyright (c) 2024 Silicon Laboratories Inc.
+# SPDX-License-Identifier: Apache-2.0
+
+description: |
+  Silabs LDMA controller
+
+  The Silabs LDMA is a general-purpose direct memory access controller
+  capable of supporting 8 independent DMA channels. It supports specific
+  functions like scatter-gather.
+
+  It is present on silabs radio board devices like EFR32xG21
+
+compatible: "silabs,ldma"
+
+include: dma-controller.yaml
+
+properties:
+  reg:
+    required: true
+
+  interrupts:
+    required: true
+
+  dma_channels:
+    type: int
+    required: true