diff --git a/boards/others/esp32c3_supermini/Kconfig b/boards/others/esp32c3_supermini/Kconfig new file mode 100644 index 00000000000000..02cddb3b85c765 --- /dev/null +++ b/boards/others/esp32c3_supermini/Kconfig @@ -0,0 +1,8 @@ +# ESP32C3 supermini board configuration + +# Copyright (c) 2024 Arrel Neumiller +# SPDX-License-Identifier: Apache-2.0 + +config HEAP_MEM_POOL_ADD_SIZE_BOARD + int + default 2048 diff --git a/boards/others/esp32c3_supermini/Kconfig.esp32c3_supermini b/boards/others/esp32c3_supermini/Kconfig.esp32c3_supermini new file mode 100644 index 00000000000000..3b1718b1480aae --- /dev/null +++ b/boards/others/esp32c3_supermini/Kconfig.esp32c3_supermini @@ -0,0 +1,5 @@ +# Copyright (c) 2024 Arrel Neumiller +# SPDX-License-Identifier: Apache-2.0 + +config BOARD_ESP32C3_SUPERMINI + select SOC_ESP32C3_FH4 diff --git a/boards/others/esp32c3_supermini/Kconfig.sysbuild b/boards/others/esp32c3_supermini/Kconfig.sysbuild new file mode 100644 index 00000000000000..f4b8b8fb2beb13 --- /dev/null +++ b/boards/others/esp32c3_supermini/Kconfig.sysbuild @@ -0,0 +1,10 @@ +# Copyright (c) 2024 Arrel Neumiller +# SPDX-License-Identifier: Apache-2.0 + +choice BOOTLOADER + default BOOTLOADER_MCUBOOT +endchoice + +choice BOOT_SIGNATURE_TYPE + default BOOT_SIGNATURE_TYPE_NONE +endchoice diff --git a/boards/others/esp32c3_supermini/board.cmake b/boards/others/esp32c3_supermini/board.cmake new file mode 100644 index 00000000000000..4c8b1b1822e712 --- /dev/null +++ b/boards/others/esp32c3_supermini/board.cmake @@ -0,0 +1,10 @@ +# Copyright (c) 2024 Arrel Neumiller +# SPDX-License-Identifier: Apache-2.0 + +if(NOT "${OPENOCD}" MATCHES "^${ESPRESSIF_TOOLCHAIN_PATH}/.*") + set(OPENOCD OPENOCD-NOTFOUND) +endif() +find_program(OPENOCD openocd PATHS ${ESPRESSIF_TOOLCHAIN_PATH}/openocd-esp32/bin NO_DEFAULT_PATH) + +include(${ZEPHYR_BASE}/boards/common/esp32.board.cmake) +include(${ZEPHYR_BASE}/boards/common/openocd.board.cmake) diff --git a/boards/others/esp32c3_supermini/board.yml b/boards/others/esp32c3_supermini/board.yml new file mode 100644 index 00000000000000..ee28029260b20b --- /dev/null +++ b/boards/others/esp32c3_supermini/board.yml @@ -0,0 +1,9 @@ +# Copyright (c) 2024 Arrel Neumiller +# SPDX-License-Identifier: Apache-2.0 + +board: + name: esp32c3_supermini + full_name: ESP32-C3-SUPERMINI + vendor: others + socs: + - name: esp32c3 diff --git a/boards/others/esp32c3_supermini/doc/img/esp32c3_supermini.webp b/boards/others/esp32c3_supermini/doc/img/esp32c3_supermini.webp new file mode 100644 index 00000000000000..59e34716261dcd Binary files /dev/null and b/boards/others/esp32c3_supermini/doc/img/esp32c3_supermini.webp differ diff --git a/boards/others/esp32c3_supermini/doc/index.rst b/boards/others/esp32c3_supermini/doc/index.rst new file mode 100644 index 00000000000000..7a7ff21dbd1e41 --- /dev/null +++ b/boards/others/esp32c3_supermini/doc/index.rst @@ -0,0 +1,249 @@ +.. zephyr:board:: esp32c3_supermini + +Overview +******** + +ESP32-C3-SUPERMINI is based on the ESP32-C3, a single-core Wi-Fi and Bluetooth 5 (LE) microcontroller SoC, +based on the open-source RISC-V architecture. This board also includes a Type-C USB Serial/JTAG port. +There may be multiple variations depending on the specific vendor. For more information a reasonbly well documented version of this board can be found at `ESP32-C3-SUPERMINI`_ + +Hardware +******** + +SoC Features: + +- IEEE 802.11 b/g/n-compliant +- Bluetooth 5, Bluetooth mesh +- 32-bit RISC-V single-core processor, up to 160MHz +- 384 KB ROM +- 400 KB SRAM (16 KB for cache) +- 8 KB SRAM in RTC +- 22 x programmable GPIOs +- 3 x SPI +- 2 x UART +- 1 x I2C +- 1 x I2S +- 2 x 54-bit general-purpose timers +- 3 x watchdog timers +- 1 x 52-bit system timer +- Remote Control Peripheral (RMT) +- LED PWM controller (LEDC) +- Full-speed USB Serial/JTAG controller +- General DMA controller (GDMA) +- 1 x TWAI® +- 2 x 12-bit SAR ADCs, up to 6 channels +- 1 x soc core temperature sensor + +For more information on the ESP32-C3 SOC, check the datasheet at `ESP32-C3 Datasheet`_ or the technical reference +manual at `ESP32-C3 Technical Reference Manual`_. + +Supported Features +================== + +Currently Zephyr's ``esp32c3_supermini`` board target supports the following features: + ++------------+------------+-------------------------------------+ +| Interface | Controller | Driver/Component | ++============+============+=====================================+ +| UART | on-chip | serial port | ++------------+------------+-------------------------------------+ +| GPIO | on-chip | gpio | ++------------+------------+-------------------------------------+ +| PINMUX | on-chip | pinmux | ++------------+------------+-------------------------------------+ +| USB-JTAG | on-chip | hardware interface | ++------------+------------+-------------------------------------+ +| SPI Master | on-chip | spi | ++------------+------------+-------------------------------------+ +| Timers | on-chip | counter | ++------------+------------+-------------------------------------+ +| Watchdog | on-chip | watchdog | ++------------+------------+-------------------------------------+ +| TRNG | on-chip | entropy | ++------------+------------+-------------------------------------+ +| LEDC | on-chip | pwm | ++------------+------------+-------------------------------------+ +| SPI DMA | on-chip | spi | ++------------+------------+-------------------------------------+ +| TWAI | on-chip | can | ++------------+------------+-------------------------------------+ +| USB-CDC | on-chip | serial | ++------------+------------+-------------------------------------+ +| ADC | on-chip | adc | ++------------+------------+-------------------------------------+ +| Wi-Fi | on-chip | | ++------------+------------+-------------------------------------+ +| Bluetooth | on-chip | | ++------------+------------+-------------------------------------+ + +System requirements +******************* + +Prerequisites +============= + +Espressif HAL requires WiFi and Bluetooth binary blobs in order work. Run the command +below to retrieve those files. + +.. code-block:: console + + west blobs fetch hal_espressif + +.. note:: + + It is recommended running the command above after :file:`west update`. + +Building & Flashing +******************* + +Simple boot +=========== + +The board could be loaded using the single binary image, without 2nd stage bootloader. +It is the default option when building the application without additional configuration. + +.. note:: + + Simple boot does not provide any security features nor OTA updates. + +MCUboot bootloader +================== + +User may choose to use MCUboot bootloader instead. In that case the bootloader +must be built (and flashed) at least once. + +There are two options to be used when building an application: + +1. Sysbuild +2. Manual build + +.. note:: + + User can select the MCUboot bootloader by adding the following line + to the board default configuration file. + + .. code:: cfg + + CONFIG_BOOTLOADER_MCUBOOT=y + +Sysbuild +======== + +The sysbuild makes possible to build and flash all necessary images needed to +bootstrap the board with the ESP32 SoC. + +To build the sample application using sysbuild use the command: + +.. zephyr-app-commands:: + :tool: west + :zephyr-app: samples/hello_world + :board: esp32c3_supermini + :goals: build + :west-args: --sysbuild + :compact: + +By default, the ESP32 sysbuild creates bootloader (MCUboot) and application +images. But it can be configured to create other kind of images. + +Build directory structure created by sysbuild is different from traditional +Zephyr build. Output is structured by the domain subdirectories: + +.. code-block:: + + build/ + ├── hello_world + │ └── zephyr + │ ├── zephyr.elf + │ └── zephyr.bin + ├── mcuboot + │ └── zephyr + │ ├── zephyr.elf + │ └── zephyr.bin + └── domains.yaml + +.. note:: + + With ``--sysbuild`` option the bootloader will be re-build and re-flash + every time the pristine build is used. + +For more information about the system build please read the :ref:`sysbuild` documentation. + +Manual build +============ + +During the development cycle, it is intended to build & flash as quickly possible. +For that reason, images can be built one at a time using traditional build. + +The instructions following are relevant for both manual build and sysbuild. +The only difference is the structure of the build directory. + +.. note:: + + Remember that bootloader (MCUboot) needs to be flash at least once. + +Build and flash applications as usual (see :ref:`build_an_application` and +:ref:`application_run` for more details). + +.. zephyr-app-commands:: + :zephyr-app: samples/hello_world + :board: esp32c3_supermini + :goals: build + +The usual ``flash`` target will work with the ``esp32c3_supermini`` board +configuration. Here is an example for the :zephyr:code-sample:`hello_world` +application. + +.. zephyr-app-commands:: + :zephyr-app: samples/hello_world + :board: esp32c3_supermini + :goals: flash + +Open the serial monitor using the following command: + +.. code-block:: shell + + west espressif monitor + +After the board has automatically reset and booted, you should see the following +message in the monitor: + +.. code-block:: console + + ***** Booting Zephyr OS vx.x.x-xxx-gxxxxxxxxxxxx ***** + Hello World! esp32c3_supermini + +Debugging +********* + +As with much custom hardware, the ESP32-C3 modules require patches to +OpenOCD that are not upstreamed yet. Espressif maintains their own fork of +the project. The custom OpenOCD can be obtained at `OpenOCD ESP32`_. + +The Zephyr SDK uses a bundled version of OpenOCD by default. You can overwrite that behavior by adding the +``-DOPENOCD= -DOPENOCD_DEFAULT_PATH=`` +parameter when building. + +Here is an example for building the :zephyr:code-sample:`hello_world` application. + +.. zephyr-app-commands:: + :zephyr-app: samples/hello_world + :board: esp32c3_supermini + :goals: build flash + :gen-args: -DOPENOCD= -DOPENOCD_DEFAULT_PATH= + +You can debug an application in the usual way. Here is an example for the :zephyr:code-sample:`hello_world` application. + +.. zephyr-app-commands:: + :zephyr-app: samples/hello_world + :board: esp32c3_supermini + :goals: debug + +References +********** + +.. target-notes:: + +.. _`ESP32-C3-SUPERMINI`: https://www.nologo.tech/product/esp32/esp32c3SuperMini/esp32C3SuperMini.html +.. _`ESP32-C3 Datasheet`: https://www.espressif.com/sites/default/files/documentation/esp32-c3_datasheet_en.pdf +.. _`ESP32-C3 Technical Reference Manual`: https://espressif.com/sites/default/files/documentation/esp32-c3_technical_reference_manual_en.pdf +.. _`OpenOCD ESP32`: https://github.com/espressif/openocd-esp32/releases diff --git a/boards/others/esp32c3_supermini/esp32c3_supermini-pinctrl.dtsi b/boards/others/esp32c3_supermini/esp32c3_supermini-pinctrl.dtsi new file mode 100644 index 00000000000000..9ac04070866a9a --- /dev/null +++ b/boards/others/esp32c3_supermini/esp32c3_supermini-pinctrl.dtsi @@ -0,0 +1,44 @@ +/* + * Copyright (c) 2024 Arrel Neumiller + * SPDX-License-Identifier: Apache-2.0 + */ + +#include +#include +#include + +&pinctrl { + + uart0_default: uart0_default { + group1 { + pinmux = ; + output-high; + }; + group2 { + pinmux = ; + bias-pull-up; + }; + }; + + spim2_default: spim2_default { + group1 { + pinmux = , + , + ; + }; + group2 { + pinmux = ; + output-low; + }; + }; + + i2c0_default: i2c0_default { + group1 { + pinmux = , + ; + bias-pull-up; + drive-open-drain; + output-high; + }; + }; +}; diff --git a/boards/others/esp32c3_supermini/esp32c3_supermini.dts b/boards/others/esp32c3_supermini/esp32c3_supermini.dts new file mode 100644 index 00000000000000..ebbd64d4f81f28 --- /dev/null +++ b/boards/others/esp32c3_supermini/esp32c3_supermini.dts @@ -0,0 +1,91 @@ +/* + * Copyright (c) 2024 Arrel Neumiller + * SPDX-License-Identifier: Apache-2.0 + */ + +/dts-v1/; + +#include +#include "esp32c3_supermini-pinctrl.dtsi" +#include +#include +#include + +/ { + model = "ESP32C3-SUPERMINI"; + compatible = "espressif,esp32c3_supermini"; + + chosen { + zephyr,sram = &sram0; + zephyr,console = &usb_serial; + zephyr,shell-uart = &usb_serial; + zephyr,flash = &flash0; + zephyr,code-partition = &slot0_partition; + }; + + aliases { + led0 = &blue_led_0; + sw0 = &user_button1; + i2c-0 = &i2c0; + watchdog0 = &wdt0; + }; + + gpio_keys { + compatible = "gpio-keys"; + user_button1: button_1 { + label = "User SW1"; + gpios = <&gpio0 9 (GPIO_PULL_UP | GPIO_ACTIVE_LOW)>; + zephyr,code = ; + }; + }; + + leds { + compatible = "gpio-leds"; + blue_led_0: led_0 { + gpios = <&gpio0 8 GPIO_ACTIVE_HIGH>; + label = "Blue LED 0"; + }; + }; + +}; + +&spi2 { + #address-cells = <1>; + #size-cells = <0>; + status = "okay"; + pinctrl-0 = <&spim2_default>; + pinctrl-names = "default"; + +}; + +&usb_serial { + status = "okay"; +}; + + +&i2c0 { + status = "okay"; + clock-frequency = ; + pinctrl-0 = <&i2c0_default>; + pinctrl-names = "default"; +}; + +&trng0 { + status = "okay"; +}; + +&gpio0 { + status = "okay"; +}; + +&wdt0 { + status = "okay"; +}; + +&uart0 { + status = "disabled"; +}; + +&esp32_bt_hci { + status = "okay"; +}; diff --git a/boards/others/esp32c3_supermini/esp32c3_supermini.yaml b/boards/others/esp32c3_supermini/esp32c3_supermini.yaml new file mode 100644 index 00000000000000..edc7252f583e0f --- /dev/null +++ b/boards/others/esp32c3_supermini/esp32c3_supermini.yaml @@ -0,0 +1,21 @@ +# Copyright (c) 2024 Arrel Neumiller +# SPDX-License-Identifier: Apache-2.0 + +identifier: esp32c3_supermini +name: ESP32-C3-SUPERMINI +type: mcu +arch: riscv +toolchain: + - zephyr +supported: + - adc + - gpio + - i2c + - watchdog + - uart + - dma + - pwm + - spi + - counter + - entropy +vendor: others diff --git a/boards/others/esp32c3_supermini/esp32c3_supermini_defconfig b/boards/others/esp32c3_supermini/esp32c3_supermini_defconfig new file mode 100644 index 00000000000000..c5ef331aa760c0 --- /dev/null +++ b/boards/others/esp32c3_supermini/esp32c3_supermini_defconfig @@ -0,0 +1,7 @@ +# Copyright (c) 2024 Arrel Neumiller +# SPDX-License-Identifier: Apache-2.0 + +CONFIG_CONSOLE=y +CONFIG_SERIAL=y +CONFIG_UART_CONSOLE=y +CONFIG_GPIO=y diff --git a/boards/others/esp32c3_supermini/support/openocd.cfg b/boards/others/esp32c3_supermini/support/openocd.cfg new file mode 100644 index 00000000000000..7fa9d136247572 --- /dev/null +++ b/boards/others/esp32c3_supermini/support/openocd.cfg @@ -0,0 +1,14 @@ +# Copyright (c) 2024 Arrel Neumiller +# SPDX-License-Identifier: Apache-2.0 + +set ESP_RTOS none + +# ESP32C3 has built-in JTAG interface over USB port in pins GPIO18/GPIO19 (D-/D+). +# Uncomment the line below to enable USB debugging. +#source [find interface/esp_usb_jtag.cfg] + +# Otherwise, use external JTAG programmer as ESP-Prog +source [find interface/ftdi/esp32_devkitj_v1.cfg] + +source [find target/esp32c3.cfg] +adapter speed 5000