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mcuboot: enable use on RISC-V with ram load mode #81276
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mcuboot: enable use on RISC-V with ram load mode #81276
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Changes look OK, one nit.
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We have some problems in ci, now that |
The CI issues will have to be addressed. |
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if (DEFINED CONFIG_ARM OR DEFINED CONFIG_X86 OR DEFINED CONFIG_ARM64 | ||
OR DEFINED CONFIG_SOC_OPENISA_RV32M1) | ||
OR (DEFINED CONFIG_RISCV AND CONFIG_ROM_START_OFFSET GREATER 0)) |
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why is CONFIG_ROM_START_OFFSET > 0
needed here but only for risc?
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- I don't wanted to change it for the other archs
- there are some riscv soc, that don't work, so the part to add a offset is only used, if that offset is needed
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If the others are failing, they should be fixed, this is adding a hack (would suggest getting build logs from CI then pinging the maintainers of those platforms since they would be broken)
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the problem was mainly opentitan, which needs to put a other rom header in front. maybe @snematbakhsh can help
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@nordicjm the opentitan one is not compatible with having a CONFIG_ROM_START_OFFSET, because it has to put something soc specific in front in the linker.
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for the opentitan soc the offset is now forced to be 0x0
.
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for the opentitan soc the offset is now forced to be 0x0.
so can the CONFIG_ROM_START_OFFSET GREATER 0
be removed then ?
I agree with @nordicjm that this is not a nice adjustment.
Or can you elaborate so much on the issue that we might find another way to handle this ?
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no CONFIG_ROM_START_OFFSET GREATER 0
is necessary , so that
zephyr_linker_sources(ROM_START SORT_KEY ! rom_start_address.ld)
# Some linkers fill unspecified region with pattern other than 0x00. Include
# fill_with_zeros.ld file which forces the linker to use 0x00 pattern. Please
# note that the pattern will affect empty spaces created after FILL(0x00).
zephyr_linker_sources(ROM_START SORT_KEY $ fill_with_zeros.ld)
zephyr_linker_sources(ROM_START SORT_KEY 0x0 rom_start_offset.ld)
is not used on the opentitan soc
add flash_img_get_upload_slot() to get current upload slot. when CONFIG_MCUBOOT_BOOTLOADER_MODE_RAM_LOAD is enabled, it is not based on the DT. Signed-off-by: Fin Maaß <[email protected]>
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don't assume, that the slot to upload is the second. Signed-off-by: Fin Maaß <[email protected]>
don't assume, that the slot to upload is the second. Signed-off-by: Fin Maaß <[email protected]>
don't select USE_DT_CODE_PARTITION, when MCUBOOT_BOOTLOADER_MODE_RAM_LOAD Signed-off-by: Fin Maaß <[email protected]>
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be able to use ROM_START_OFFSET on RISCV. Signed-off-by: Fin Maaß <[email protected]>
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this enables the use of mcuboot on riscv with ram load mode.
for that a function to get the flash_img_get_upload_slot() is needed.