Skip to content

Latest commit

 

History

History
6 lines (4 loc) · 501 Bytes

README.md

File metadata and controls

6 lines (4 loc) · 501 Bytes

TCC

This repository keep the main files of my graduation project. I am developing a synthesizable Genetic Algorithm written in SystemVerilog.

The repo contain the folders src/ and sim_src/. The src/ folder hold all the modules designed for the Genetic Algorithm and the sim_src/ folder hold the simulation testbench file, used to test the top module GA.

Este repositório está sob a licença GPLv3 que pode ser lida em LICENSE.txt.