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The source files for my graduation project. The project is basically a synthesizable Genetic Algorithm written in SystemVerilog.

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TCC

This repository keep the main files of my graduation project. I am developing a synthesizable Genetic Algorithm written in SystemVerilog.

The repo contain the folders src/ and sim_src/. The src/ folder hold all the modules designed for the Genetic Algorithm and the sim_src/ folder hold the simulation testbench file, used to test the top module GA.

Este repositório está sob a licença GPLv3 que pode ser lida em LICENSE.txt.

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The source files for my graduation project. The project is basically a synthesizable Genetic Algorithm written in SystemVerilog.

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