Tang75

Tang75 is a HUB75 Display Driver written in Verilog for Sipeed Tang Nano 9k

You can find an Educational Article in Lushay Labs written in a didactical way for a better explanation about how the driver works.

The article was split in two parts:

• 01: Single Red Pixel Top Right Corner
• 02: Static Image

Build Instructions

# Select Lesson
cd 01
# build
make
# flash into FPGA (needs openFPGALoader)
make flash

Wiring

Check wiring.md in docs folder.

Requirements

• Sipeed Tang Nano 9k
• HUB75 Matrix LED Display
• Verilator (optional, for simulation purposes)
• GNU Make to build the bitstream
• Gowin-Nextpnr to Place and Route tool
• Yosys to Verilog Interpreter
• GTKWave (optional, for .vcd file reading)
• openFPGALoader (optional, to flash the bitstream into th FPGA)

Display Specs

The HUB75 display used in source code has these technical specifications:

• 64 pixels by 32 pixels display
• 1/16 scan
• 256mm x 128mm size
• Address lines are pins A, B, C and D

The Source Code can be tweaked to meet your display specs, feel free to add it to your design!

Simulate

Use verilator to simulate waveform by running:

make sim

the output will be a .vcd file, which can be read in GTKWave.

TO DO

• Implement the Framebuffer using BRAM