Adding documentation for ADC module and its testbench

modules/adc/include/adc.hpp

@@ -5,23 +5,50 @@
 #include "vunit.hpp"
 
 
+/**
+ * @brief Analog to Digital Converter module representation
+ * This module generates a N-bit digital signal based on the [Vmin, Vmax]
+ * voltage range
+ * 
+ * @tparam BITS - the number of output bits of the digital code
+ * @tparam VMIN - lowest voltage value
+ * @tparam VMAX - highest voltage value
+ * @tparam VU - voltage unit based on VUnit
+ */
 template <unsigned int BITS = 8, int VMIN = 0, int VMAX = 5, VUnit VU = VUnit::v>
-SCA_TDF_MODULE(dac)
+SCA_TDF_MODULE(adc)
 {
 protected:
-  const double V_MAX = static_cast<double>(VMAX) / static_cast<double>(VU);
+  // Min voltage value based on the voltage units
   const double V_MIN = static_cast<double>(VMIN) / static_cast<double>(VU);
+  // Max voltage value based on the voltage units
+  const double V_MAX = static_cast<double>(VMAX) / static_cast<double>(VU);
+  // Max digital output code
   const double MAX_DIG = static_cast<double>((1 << BITS) - 1);
 public:
+  // Input analog voltage
   sca_tdf::sca_in<double> in;
+  // Output digital code
   sca_tdf::sca_out<sc_dt::sc_uint<BITS> > out;
 
-  SCA_CTOR(dac) : in("in"), out("out") {
+  /**
+   * @brief Construct a new adc object
+   * 
+   */
+  SCA_CTOR(adc) : in("in"), out("out") {
+    // Propagation time from input to output
     set_timestep(sca_core::sca_time(0.1, sc_core::SC_US));
   }
 
+  /**
+   * @brief Convert the analog signal into digital signal
+   * The analog signal in a range from Vmin to Vmax is converted into a N-bit
+   * digital signal
+   * 
+   */
   void processing()
   {
+
     double normalized_ana_in = (in.read() - V_MIN) / (V_MAX - V_MIN);
     unsigned int dig_code = static_cast<unsigned int>(normalized_ana_in * MAX_DIG);
 

modules/adc/include/test_adc.hpp → modules/adc/include/seq_item_adc.hpp

@@ -1,16 +1,23 @@
-#ifndef IPS_TEST_ADC_HPP
-#define IPS_TEST_ADC_HPP
+#ifndef IPS_SEQ_ITEM_ADC_HPP
+#define IPS_SEQ_ITEM_ADC_HPP
 
 #include <cstdlib>
 
 
+/**
+ * @brief This class is used to generate the analog signal for the test
+ * 
+ * @tparam N 
+ */
 template <unsigned int N>
-SCA_TDF_MODULE(test_adc) {
+SCA_TDF_MODULE(seq_item_adc)
+{
 public:
   sca_tdf::sca_out<double> o_ana;
   const int MAX_CODE = (1 << N);
 
-  SCA_CTOR(test_adc) {
+  SCA_CTOR(seq_item_adc)
+  {
     set_timestep(sca_core::sca_time(0.1, sc_core::SC_US));
   }
 
@@ -20,4 +27,4 @@ SCA_TDF_MODULE(test_adc) {
   }
 };
 
-#endif // IPS_TEST_ADC_HPP
+#endif // IPS_SEQ_ITEM_ADC_HPP

modules/adc/src/tb_adc.cpp

@@ -1,29 +1,41 @@
 #include <systemc-ams.h>
 #include "adc.hpp"
-#include "test_adc.hpp"
+#include "seq_item_adc.hpp"
 
 #define N 8
 
 
 int sc_main(int, char*[])
 {
+  // Max number of sequence items to test
+  const int MAX_SEQ_ITEMS = (1 << N) - 1;
+
+  // Signals to connect
   sca_tdf::sca_signal<double> s_ana;
   sca_tdf::sca_signal<sc_dt::sc_uint<N> > s_dig_out;
 
-  const int MAX_ITER = (1 << N) - 1;
-
-  dac<N> ips_adc("ips_adc");
+  // DUT
+  adc<N> ips_adc("ips_adc");
   ips_adc.in(s_ana);
   ips_adc.out(s_dig_out);
 
-  test_adc<N> ips_test_adc("ips_test_adc");
-  ips_test_adc.o_ana(s_ana);
+  // Sequence item generator for ADC
+  seq_item_adc<N> ips_seq_item_adc("ips_seq_item_adc");
+  ips_seq_item_adc.o_ana(s_ana);
 
+  // Dump waveform
   sca_util::sca_trace_file* tf = sca_util::sca_create_vcd_trace_file("ips_adc");
   sca_util::sca_trace(tf, s_ana, "in");
   sca_util::sca_trace(tf, s_dig_out, "out");
 
-  sc_start(MAX_ITER * 0.1, SC_US);
+  // Start time
+  std::cout << "@" << sc_time_stamp() << std::endl;
+
+  // Run test
+  sc_start(MAX_SEQ_ITEMS * 0.1, SC_US);
+
+  // End time
+  std::cout << "@" << sc_time_stamp() << std::endl;
 
   sca_util::sca_close_vcd_trace_file(tf);