Added to test-examples a the ECP5 example ColorLight-5A-75B-V8/Blinky…

… for testing. This is a straight verilog project but can replaced later with a IceStudion version.
FPGAwars · Sep 29, 2024 · 5f92c9a · 5f92c9a
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diff --git a/test-examples/ColorLight-5A-75B-V8/Blinky/Blinky.v b/test-examples/ColorLight-5A-75B-V8/Blinky/Blinky.v
@@ -0,0 +1,17 @@
+//------------------------------------------------------------------
+//-- Blinking LED
+//------------------------------------------------------------------
+
+module Test (
+  input CLK,    // 25MHz clock
+  output led,   // LED to blink
+);
+
+  reg [23:0] counter = 0;
+
+  always @(posedge CLK) 
+    counter <= counter + 1;
+
+  assign led = counter[23];
+
+endmodule
diff --git a/test-examples/ColorLight-5A-75B-V8/Blinky/apio.ini b/test-examples/ColorLight-5A-75B-V8/Blinky/apio.ini
@@ -0,0 +1,4 @@
+[env]
+board = ColorLight-5A-75B-V8
+top-module = Test
+
diff --git a/test-examples/ColorLight-5A-75B-V8/Blinky/info b/test-examples/ColorLight-5A-75B-V8/Blinky/info
@@ -0,0 +1 @@
+Blinking LED
diff --git a/test-examples/ColorLight-5A-75B-V8/Blinky/pinout.lpf b/test-examples/ColorLight-5A-75B-V8/Blinky/pinout.lpf
@@ -0,0 +1,12 @@
+# -- Board: ColorLight-5A-75E-V71_(FT2232H)
+
+# -- CLK
+LOCATE COMP "CLK" SITE "P6";
+IOBUF  PORT "CLK" PULLMODE=NONE IO_TYPE=LVCMOS33 DRIVE=4;
+
+# -- LED
+LOCATE COMP "led" SITE "T6";
+IOBUF PORT "led" PULLMODE=NONE IO_TYPE=LVCMOS33 DRIVE=4; 
+
+
+