Bug fixed: #363: Error when executing apio graph

FPGAwars · Mar 26, 2024 · 6965024 · 6965024
1 parent f91e967
commit 6965024
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Showing 2 changed files with 2 additions and 2 deletions.
diff --git a/apio/resources/ecp5/SConstruct b/apio/resources/ecp5/SConstruct
@@ -214,7 +214,7 @@ iverilog = Builder(
 env.Append(BUILDERS={'IVerilog': iverilog})
 
 dot_builder = Builder(
-    action='yosys -p \"show -format dot -colors 1 -prefix hardware {0}\" {1} $SOURCES'.format(
+    action='yosys -f verilog -p \"show -format dot -colors 1 -prefix hardware {0}\" {1} $SOURCES'.format(
         YOSYS_TOP if YOSYS_TOP else 'unknown_top',
         '' if VERBOSE_ALL else '-q'
     ),

diff --git a/apio/resources/ice40/SConstruct b/apio/resources/ice40/SConstruct
@@ -219,7 +219,7 @@ iverilog = Builder(
 env.Append(BUILDERS={'IVerilog': iverilog})
 
 dot_builder = Builder(
-    action='yosys -p \"show -format dot -colors 1 -prefix hardware {0}\" {1} $SOURCES'.format(
+    action='yosys -f verilog -p \"show -format dot -colors 1 -prefix hardware {0}\" {1} $SOURCES'.format(
         YOSYS_TOP if YOSYS_TOP else 'unknown_top',
         '' if VERBOSE_ALL else '-q'
     ),