Add wideint exponentation instructions WDEX and WQEX

fuel-asm/src/args/wideint.rs

@@ -140,6 +140,40 @@ impl MulArgs {
     }
 }
 
+/// Additional arguments for WDEX and WQEX instructions.
+#[derive(Debug, Clone, Copy, PartialEq, Eq)]
+#[cfg_attr(feature = "typescript", wasm_bindgen::prelude::wasm_bindgen)]
+#[must_use]
+pub struct ExpArgs {
+    /// Load LHSS from register if true, otherwise zero-extend register value
+    pub indirect_lhs: bool,
+    /// Load RHS from register if true, otherwise zero-extend register value
+    pub indirect_rhs: bool,
+}
+
+impl ExpArgs {
+    /// Convert to immediate value.
+    pub fn to_imm(self) -> Imm06 {
+        let mut bits = 0u8;
+        bits |= (self.indirect_lhs as u8) << 4;
+        bits |= (self.indirect_rhs as u8) << 5;
+        Imm06(bits)
+    }
+
+    /// Construct from `Imm06`. Returns `None` if the value has reserved flags set.
+    pub fn from_imm(bits: Imm06) -> Option<Self> {
+        let indirect_lhs = ((bits.0 >> 4) & 1) == 1;
+        let indirect_rhs = ((bits.0 >> 5) & 1) == 1;
+        if (bits.0 & 0b1111) != 0 {
+            return None;
+        }
+        Some(Self {
+            indirect_lhs,
+            indirect_rhs,
+        })
+    }
+}
+
 /// Additional arguments for WMDV and WDDV instructions.
 #[derive(Debug, Clone, Copy, PartialEq, Eq)]
 #[cfg_attr(feature = "typescript", wasm_bindgen::prelude::wasm_bindgen)]
@@ -234,6 +268,29 @@ mod tests {
         }
     }
 
+    #[rstest::rstest]
+    fn encode_decode_exp(
+        #[values(true, false)] indirect_lhs: bool,
+        #[values(true, false)] indirect_rhs: bool,
+    ) {
+        let orig = ExpArgs {
+            indirect_lhs,
+            indirect_rhs,
+        };
+        let decoded = ExpArgs::from_imm(orig.to_imm()).expect("decode error");
+        assert_eq!(orig, decoded);
+    }
+
+    #[test]
+    fn decode_encode_exp() {
+        for imm in 0..Imm06::MAX.0 {
+            let bits = Imm06::from(imm);
+            if let Some(decoded) = ExpArgs::from_imm(bits) {
+                assert_eq!(decoded.to_imm().0, imm);
+            }
+        }
+    }
+
     #[rstest::rstest]
     fn encode_decode_div(#[values(true, false)] indirect_rhs: bool) {
         let orig = DivArgs { indirect_rhs };

fuel-asm/src/lib.rs

@@ -337,6 +337,10 @@ impl_instructions! {
     0xac WDMM wdmm [dst: RegId mul_lhs: RegId mul_rhs: RegId modulo: RegId]
     "MulMod 256bit"
     0xad WQMM wqmm [dst: RegId mul_lhs: RegId mul_rhs: RegId modulo: RegId]
+    "Exponentiate 128bit"
+    0xae WDEX wdex [dst: RegId base: RegId exp: RegId flags: Imm06]
+    "Exponentiate 256bit"
+    0xaf WQEX wqex [dst: RegId base: RegId exp: RegId flags: Imm06]
 
     "Call external function"
     0xb0 ECAL ecal [a: RegId b: RegId c: RegId d: RegId]
@@ -696,12 +700,12 @@ impl Opcode {
         match self {
             ADD | AND | DIV | EQ | EXP | GT | LT | MLOG | MROO | MOD | MOVE | MUL
             | NOT | OR | SLL | SRL | SUB | XOR | WDCM | WQCM | WDOP | WQOP | WDML
-            | WQML | WDDV | WQDV | WDMD | WQMD | WDAM | WQAM | WDMM | WQMM | PSHH
-            | PSHL | POPH | POPL | RET | ALOC | MCL | MCP | MEQ | ECK1 | ECR1 | ED19
-            | K256 | S256 | NOOP | FLAG | ADDI | ANDI | DIVI | EXPI | MODI | MULI
-            | MLDV | ORI | SLLI | SRLI | SUBI | XORI | JNEI | LB | LW | SB | SW
-            | MCPI | MCLI | GM | MOVI | JNZI | JI | JMP | JNE | JMPF | JMPB | JNZF
-            | JNZB | JNEF | JNEB | CFEI | CFSI | CFE | CFS | GTF => true,
+            | WQML | WDDV | WQDV | WDMD | WQMD | WDAM | WQAM | WDMM | WQMM | WDEX
+            | WQEX | PSHH | PSHL | POPH | POPL | RET | ALOC | MCL | MCP | MEQ | ECK1
+            | ECR1 | ED19 | K256 | S256 | NOOP | FLAG | ADDI | ANDI | DIVI | EXPI
+            | MODI | MULI | MLDV | ORI | SLLI | SRLI | SUBI | XORI | JNEI | LB | LW
+            | SB | SW | MCPI | MCLI | GM | MOVI | JNZI | JI | JMP | JNE | JMPF | JMPB
+            | JNZF | JNZB | JNEF | JNEB | CFEI | CFSI | CFE | CFS | GTF => true,
             _ => false,
         }
     }