Verilog-Tutorial

PDF Slides and links for learning Verilog + iverilog simulation

Helpful links for learning verilog:

Verilog Tutorial - Chip Verify
Verilog Tutorial - javaTpoint

iverilog Terminal Command Lines

You can copy these commands from here:

iverilog -o Module_Name.vvp Module_Name_Testbench.v
vvp Module_Name.vvp
gtkwave Module_Name.vcd  

PDF Slides

All the files, images and graphics provided in this directory belong to their respective owners and we or this organization do not claim any right over them.

• UC Berkeley - Verilog HDL courtesy of Sofia Shao, PhD. (University of California, Berkeley)
• Cornell University - Verilog Usage Rules ECE 5745 Complex Digital ASIC Design, revision: 2021-03-04-12-20
• University of Crete, Greece - Verilog HDL courtesy of Thanasis Oikonomou, MSc. (University of Crete, Greece)
• Sharif University of Technology - Verilog HDL courtesy of Mohammad-Reza Movahedin, PhD. (Sharif Univeristy of Technology)