DFU for D457 recovery device

Tracked-by: [RSDSO-19297] - [D457]: LRS applications cannot recognized cameras in recovery mode
IntelRealSense · May 28, 2024 · af31745 · af31745
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diff --git a/0001-Jetson-Orin-JP6-install.patch b/0001-Jetson-Orin-JP6-install.patch
@@ -0,0 +1,44 @@
+From 13de8e8afacb1a56c63875cf978f5070c6d05a61 Mon Sep 17 00:00:00 2001
+From: Dmitry Perchanov <[email protected]>
+Date: Mon, 18 Mar 2024 11:54:03 +0200
+Subject: [PATCH] Jetson-Orin-JP6-install
+
+Signed-off-by: Dmitry Perchanov <[email protected]>
+---
+ doc/installation_jetson.md | 9 +++++++--
+ 1 file changed, 7 insertions(+), 2 deletions(-)
+
+diff --git a/doc/installation_jetson.md b/doc/installation_jetson.md
+index b1c4febd2..22095737d 100644
+--- a/doc/installation_jetson.md
++++ b/doc/installation_jetson.md
+@@ -8,12 +8,15 @@
+
+ ### 1. Prerequisites
+
+-* Nvidia® **Jetson Nano™**, **Jetson TX2™** and **Jetson AGX Xavier™** board (may also work on other Jetson devices)
++* Nvidia® **Jetson Nano™**, **Jetson TX2™**, **Jetson AGX Xavier™** and **Jetson Orin** board (may also work on other Jetson devices)
+ * RealSense **D415**, **D435**, **D435i**, **D455** and **L515** Camera devices.
+
+ ### 2. Establish Developer's Environment
+
+-Follow [official instructions](https://developer.nvidia.com/embedded/learn/getting-started-jetson) to get your board ready. This guide will assume you are using **Nvidia® L4T Ubuntu 16.04/18.04/20.04** image with kernels 4.9/5.10. Note that in most cases it is necessary to install a toll named "SDK Manager" to flash and install **Jetson** boards with both the L4T (Linux for Tegra) and Nvidia-specific software packages (CUDA, Tensor Flow, AI, etc.)
++Follow [official instructions](https://developer.nvidia.com/embedded/learn/getting-started-jetson) to get your board ready. This guide will assume you are using **Nvidia® L4T Ubuntu 16.04/18.04/20.04/22.04** image with kernels 4.9/5.10/5.15. Note that in most cases it is necessary to install a toll named "SDK Manager" to flash and install **Jetson** boards with both the L4T (Linux for Tegra) and Nvidia-specific software packages (CUDA, Tensor Flow, AI, etc.)
++
++For **Jetson Orin™** with JetPack 6.0 you will need to follow build for MIPI driver as Nvidia released Kernel 5.15 default configuration with disabled HID: [Intel® RealSense™ camera driver for GMSL* interface](https://github.com/IntelRealSense/realsense_mipi_platform_driver)
++
+ For **Jetson Nano™** we strongly recommend enabling the Barrel Jack connector for extra power (See [jetsonhacks.com/jetson-nano-use-more-power/](https://www.jetsonhacks.com/2019/04/10/jetson-nano-use-more-power/) to learn how)
+
+ ![Jetson Nano](./img/jetson.jpg)
+@@ -94,6 +97,8 @@ The method was verified with **Jetson AGX** boards with JetPack **4.2.3**[L4T 32
+
+ The method has not yet been verified on the **Jetson Nano** board.
+
++This method incompatible for board **Jetson Orin™** with JetPack 6.0, checkout [Intel® RealSense™ camera driver for GMSL* interface](https://github.com/IntelRealSense/realsense_mipi_platform_driver)
++
+ * **Prerequisite**
+
+   * Verify the board type and Jetpack versions compatibility.  
+-- 
+2.34.1
+
diff --git a/0001-backend-mipi-dfu-default-nodes.patch b/0001-backend-mipi-dfu-default-nodes.patch
@@ -0,0 +1,38 @@
+From 85631659a87f9ecaabc5d6290db5c311770a2da3 Mon Sep 17 00:00:00 2001
+From: Dmitry Perchanov <[email protected]>
+Date: Tue, 12 Mar 2024 14:12:24 +0200
+Subject: [PATCH] backend: mipi dfu default nodes
+
+Tracked-by: [RSDSO-19611]
+
+Signed-off-by: Dmitry Perchanov <[email protected]>
+---
+ src/linux/backend-v4l2.cpp | 12 +++++++++++-
+ 1 file changed, 11 insertions(+), 1 deletion(-)
+
+diff --git a/src/linux/backend-v4l2.cpp b/src/linux/backend-v4l2.cpp
+index 6455a6f26..974827d48 100644
+--- a/src/linux/backend-v4l2.cpp
++++ b/src/linux/backend-v4l2.cpp
+@@ -886,7 +886,17 @@ namespace librealsense
+             // assign unique id for mipi by appending camera id to bus_info (bus_info is same for each mipi port)
+             // Note - jetson can use only bus_info, as card is different for each sensor and metadata node.
+             info.unique_id = bus_info + "-" + std::to_string(cam_id); // use bus_info as per camera unique id for mipi
+-            info.dfu_device_path = "/dev/d4xx-dfu504"; // Use legacy DFU device node used in firmware_update_manager
++            // Get DFU node for MIPI camera
++            std::array<std::string, 2> dfu_device_paths = {"/dev/d4xx-dfu504", "/dev/d4xx-dfu-30-0010"};
++            for (const auto& dfu_device_path: dfu_device_paths) {
++                int vfd = open(dfu_device_path.c_str(), O_RDONLY | O_NONBLOCK);
++                if (vfd >= 0) {
++                    // Use legacy DFU device node used in firmware_update_manager
++                    info.dfu_device_path = dfu_device_path;
++                    ::close(vfd); // file exists, close file and continue to assign it
++                    break;
++                }
++            }
+             info.conn_spec = usb_specification;
+             info.uvc_capabilities = get_dev_capabilities(dev_name).device_caps;
+
+-- 
+2.34.1
+
diff --git a/0001-l4t-uvc-patch-fix-localversion.patch b/0001-l4t-uvc-patch-fix-localversion.patch
@@ -0,0 +1,26 @@
+From 677c571238452c72331e35a864e957511ebbc04d Mon Sep 17 00:00:00 2001
+From: Dmitry Perchanov <[email protected]>
+Date: Tue, 26 Mar 2024 14:43:26 +0200
+Subject: [PATCH] l4t: uvc patch fix localversion
+
+Signed-off-by: Dmitry Perchanov <[email protected]>
+---
+ scripts/patch-realsense-ubuntu-L4T.sh | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+diff --git a/scripts/patch-realsense-ubuntu-L4T.sh b/scripts/patch-realsense-ubuntu-L4T.sh
+index e58a2c79a..4205bc6b2 100755
+--- a/scripts/patch-realsense-ubuntu-L4T.sh
++++ b/scripts/patch-realsense-ubuntu-L4T.sh
+@@ -140,7 +140,7 @@ if [ "4.4" = "$PATCHES_REV" ]; then
+ 	sed -i '/CONFIG_HID_SENSOR_GYRO_3D/c\CONFIG_HID_SENSOR_GYRO_3D=m' .config
+ 	sed -i '/CONFIG_HID_SENSOR_IIO_COMMON/c\CONFIG_HID_SENSOR_IIO_COMMON=m\nCONFIG_HID_SENSOR_IIO_TRIGGER=m' .config
+ fi
+-make ARCH=arm64 prepare modules_prepare  -j$(($(nproc)-1))
++make ARCH=arm64 prepare modules_prepare LOCALVERSION='' -j$(($(nproc)-1))
+
+ #Remove previously applied patches
+ git reset --hard
+-- 
+2.34.1
+
diff --git a/media-ctl_print-dot.txt b/media-ctl_print-dot.txt
@@ -0,0 +1,111 @@
+digraph board {
+	rankdir=TB
+	n00000001 [label="{{<port0> 0} | 13e10000.host1x:nvcsi@15a00000-\n/dev/v4l-subdev0 | {<port1> 1}}", shape=Mrecord, style=filled, fillcolor=green]
+	n00000001:port1 -> n0000002f
+	n00000004 [label="{{<port0> 0} | 13e10000.host1x:nvcsi@15a00000-\n/dev/v4l-subdev1 | {<port1> 1}}", shape=Mrecord, style=filled, fillcolor=green]
+	n00000004:port1 -> n0000006b
+	n00000007 [label="{{<port0> 0} | 13e10000.host1x:nvcsi@15a00000-\n/dev/v4l-subdev2 | {<port1> 1}}", shape=Mrecord, style=filled, fillcolor=green]
+	n00000007:port1 -> n00000097
+	n0000000a [label="{{<port0> 0} | 13e10000.host1x:nvcsi@15a00000-\n/dev/v4l-subdev3 | {<port1> 1}}", shape=Mrecord, style=filled, fillcolor=green]
+	n0000000a:port1 -> n000000bf
+	n0000000d [label="{{<port0> 0} | 13e10000.host1x:nvcsi@15a00000-\n/dev/v4l-subdev4 | {<port1> 1}}", shape=Mrecord, style=filled, fillcolor=green]
+	n0000000d:port1 -> n000000e7
+	n00000010 [label="{{<port0> 0} | 13e10000.host1x:nvcsi@15a00000-\n/dev/v4l-subdev5 | {<port1> 1}}", shape=Mrecord, style=filled, fillcolor=green]
+	n00000010:port1 -> n00000113
+	n00000013 [label="{{<port0> 0} | 13e10000.host1x:nvcsi@15a00000-\n/dev/v4l-subdev6 | {<port1> 1}}", shape=Mrecord, style=filled, fillcolor=green]
+	n00000013:port1 -> n0000013f
+	n00000016 [label="{{<port0> 0} | 13e10000.host1x:nvcsi@15a00000-\n/dev/v4l-subdev7 | {<port1> 1}}", shape=Mrecord, style=filled, fillcolor=green]
+	n00000016:port1 -> n00000167
+	n00000019 [label="{{<port1> 1 | <port2> 2 | <port3> 3 | <port4> 4} | DS5 mux 30-001a\n/dev/v4l-subdev12 | {<port0> 0}}", shape=Mrecord, style=filled, fillcolor=green]
+	n00000019:port0 -> n00000001:port0
+	n0000001f [label="{{} | D4XX depth 30-001a\n/dev/v4l-subdev8 | {<port0> 0}}", shape=Mrecord, style=filled, fillcolor=green]
+	n0000001f:port0 -> n00000019:port1 [style=bold]
+	n00000023 [label="{{} | D4XX ir 30-001a\n/dev/v4l-subdev9 | {<port0> 0}}", shape=Mrecord, style=filled, fillcolor=green]
+	n00000023:port0 -> n00000019:port3 [style=bold]
+	n00000027 [label="{{} | D4XX rgb 30-001a\n/dev/v4l-subdev10 | {<port0> 0}}", shape=Mrecord, style=filled, fillcolor=green]
+	n00000027:port0 -> n00000019:port2 [style=bold]
+	n0000002b [label="{{} | D4XX imu 30-001a\n/dev/v4l-subdev11 | {<port0> 0}}", shape=Mrecord, style=filled, fillcolor=green]
+	n0000002b:port0 -> n00000019:port4 [style=bold]
+	n0000002f [label="vi-output, DS5 mux 30-001a\n/dev/video4", shape=box, style=filled, fillcolor=yellow]
+	n00000037 [label="tegra-capture-vi-metadata-0\n/dev/video5", shape=box, style=filled, fillcolor=yellow]
+	n00000055 [label="{{<port1> 1 | <port2> 2 | <port3> 3 | <port4> 4} | DS5 mux 31-001a\n/dev/v4l-subdev17 | {<port0> 0}}", shape=Mrecord, style=filled, fillcolor=green]
+	n00000055:port0 -> n00000004:port0
+	n0000005b [label="{{} | D4XX depth 31-001a\n/dev/v4l-subdev13 | {<port0> 0}}", shape=Mrecord, style=filled, fillcolor=green]
+	n0000005b:port0 -> n00000055:port1 [style=bold]
+	n0000005f [label="{{} | D4XX ir 31-001a\n/dev/v4l-subdev14 | {<port0> 0}}", shape=Mrecord, style=filled, fillcolor=green]
+	n0000005f:port0 -> n00000055:port3 [style=bold]
+	n00000063 [label="{{} | D4XX rgb 31-001a\n/dev/v4l-subdev15 | {<port0> 0}}", shape=Mrecord, style=filled, fillcolor=green]
+	n00000063:port0 -> n00000055:port2 [style=bold]
+	n00000067 [label="{{} | D4XX imu 31-001a\n/dev/v4l-subdev16 | {<port0> 0}}", shape=Mrecord, style=filled, fillcolor=green]
+	n00000067:port0 -> n00000055:port4 [style=bold]
+	n0000006b [label="vi-output, DS5 mux 31-001a\n/dev/video6", shape=box, style=filled, fillcolor=yellow]
+	n00000073 [label="tegra-capture-vi-metadata-0\n/dev/video7", shape=box, style=filled, fillcolor=yellow]
+	n00000081 [label="{{<port1> 1 | <port2> 2 | <port3> 3 | <port4> 4} | DS5 mux 32-001a\n/dev/v4l-subdev22 | {<port0> 0}}", shape=Mrecord, style=filled, fillcolor=green]
+	n00000081:port0 -> n00000007:port0
+	n00000087 [label="{{} | D4XX depth 32-001a\n/dev/v4l-subdev18 | {<port0> 0}}", shape=Mrecord, style=filled, fillcolor=green]
+	n00000087:port0 -> n00000081:port1 [style=bold]
+	n0000008b [label="{{} | D4XX ir 32-001a\n/dev/v4l-subdev19 | {<port0> 0}}", shape=Mrecord, style=filled, fillcolor=green]
+	n0000008b:port0 -> n00000081:port3 [style=bold]
+	n0000008f [label="{{} | D4XX rgb 32-001a\n/dev/v4l-subdev20 | {<port0> 0}}", shape=Mrecord, style=filled, fillcolor=green]
+	n0000008f:port0 -> n00000081:port2 [style=bold]
+	n00000093 [label="{{} | D4XX imu 32-001a\n/dev/v4l-subdev21 | {<port0> 0}}", shape=Mrecord, style=filled, fillcolor=green]
+	n00000093:port0 -> n00000081:port4 [style=bold]
+	n00000097 [label="vi-output, DS5 mux 32-001a\n/dev/video8", shape=box, style=filled, fillcolor=yellow]
+	n000000a9 [label="{{<port1> 1 | <port2> 2 | <port3> 3 | <port4> 4} | DS5 mux 33-001a\n/dev/v4l-subdev27 | {<port0> 0}}", shape=Mrecord, style=filled, fillcolor=green]
+	n000000a9:port0 -> n0000000a:port0
+	n000000af [label="{{} | D4XX depth 33-001a\n/dev/v4l-subdev23 | {<port0> 0}}", shape=Mrecord, style=filled, fillcolor=green]
+	n000000af:port0 -> n000000a9:port1 [style=bold]
+	n000000b3 [label="{{} | D4XX ir 33-001a\n/dev/v4l-subdev24 | {<port0> 0}}", shape=Mrecord, style=filled, fillcolor=green]
+	n000000b3:port0 -> n000000a9:port3 [style=bold]
+	n000000b7 [label="{{} | D4XX rgb 33-001a\n/dev/v4l-subdev25 | {<port0> 0}}", shape=Mrecord, style=filled, fillcolor=green]
+	n000000b7:port0 -> n000000a9:port2 [style=bold]
+	n000000bb [label="{{} | D4XX imu 33-001a\n/dev/v4l-subdev26 | {<port0> 0}}", shape=Mrecord, style=filled, fillcolor=green]
+	n000000bb:port0 -> n000000a9:port4 [style=bold]
+	n000000bf [label="vi-output, DS5 mux 33-001a\n/dev/video9", shape=box, style=filled, fillcolor=yellow]
+	n000000d1 [label="{{<port1> 1 | <port2> 2 | <port3> 3 | <port4> 4} | DS5 mux 34-001b\n/dev/v4l-subdev32 | {<port0> 0}}", shape=Mrecord, style=filled, fillcolor=green]
+	n000000d1:port0 -> n0000000d:port0
+	n000000d7 [label="{{} | D4XX depth 34-001b\n/dev/v4l-subdev28 | {<port0> 0}}", shape=Mrecord, style=filled, fillcolor=green]
+	n000000d7:port0 -> n000000d1:port1 [style=bold]
+	n000000db [label="{{} | D4XX ir 34-001b\n/dev/v4l-subdev29 | {<port0> 0}}", shape=Mrecord, style=filled, fillcolor=green]
+	n000000db:port0 -> n000000d1:port3 [style=bold]
+	n000000df [label="{{} | D4XX rgb 34-001b\n/dev/v4l-subdev30 | {<port0> 0}}", shape=Mrecord, style=filled, fillcolor=green]
+	n000000df:port0 -> n000000d1:port2 [style=bold]
+	n000000e3 [label="{{} | D4XX imu 34-001b\n/dev/v4l-subdev31 | {<port0> 0}}", shape=Mrecord, style=filled, fillcolor=green]
+	n000000e3:port0 -> n000000d1:port4 [style=bold]
+	n000000e7 [label="vi-output, DS5 mux 34-001b\n/dev/video10", shape=box, style=filled, fillcolor=yellow]
+	n000000ef [label="tegra-capture-vi-metadata-0\n/dev/video11", shape=box, style=filled, fillcolor=yellow]
+	n000000fd [label="{{<port1> 1 | <port2> 2 | <port3> 3 | <port4> 4} | DS5 mux 35-001b\n/dev/v4l-subdev37 | {<port0> 0}}", shape=Mrecord, style=filled, fillcolor=green]
+	n000000fd:port0 -> n00000010:port0
+	n00000103 [label="{{} | D4XX depth 35-001b\n/dev/v4l-subdev33 | {<port0> 0}}", shape=Mrecord, style=filled, fillcolor=green]
+	n00000103:port0 -> n000000fd:port1 [style=bold]
+	n00000107 [label="{{} | D4XX ir 35-001b\n/dev/v4l-subdev34 | {<port0> 0}}", shape=Mrecord, style=filled, fillcolor=green]
+	n00000107:port0 -> n000000fd:port3 [style=bold]
+	n0000010b [label="{{} | D4XX rgb 35-001b\n/dev/v4l-subdev35 | {<port0> 0}}", shape=Mrecord, style=filled, fillcolor=green]
+	n0000010b:port0 -> n000000fd:port2 [style=bold]
+	n0000010f [label="{{} | D4XX imu 35-001b\n/dev/v4l-subdev36 | {<port0> 0}}", shape=Mrecord, style=filled, fillcolor=green]
+	n0000010f:port0 -> n000000fd:port4 [style=bold]
+	n00000113 [label="vi-output, DS5 mux 35-001b\n/dev/video12", shape=box, style=filled, fillcolor=yellow]
+	n0000011b [label="tegra-capture-vi-metadata-0\n/dev/video13", shape=box, style=filled, fillcolor=yellow]
+	n00000129 [label="{{<port1> 1 | <port2> 2 | <port3> 3 | <port4> 4} | DS5 mux 36-001b\n/dev/v4l-subdev42 | {<port0> 0}}", shape=Mrecord, style=filled, fillcolor=green]
+	n00000129:port0 -> n00000013:port0
+	n0000012f [label="{{} | D4XX depth 36-001b\n/dev/v4l-subdev38 | {<port0> 0}}", shape=Mrecord, style=filled, fillcolor=green]
+	n0000012f:port0 -> n00000129:port1 [style=bold]
+	n00000133 [label="{{} | D4XX ir 36-001b\n/dev/v4l-subdev39 | {<port0> 0}}", shape=Mrecord, style=filled, fillcolor=green]
+	n00000133:port0 -> n00000129:port3 [style=bold]
+	n00000137 [label="{{} | D4XX rgb 36-001b\n/dev/v4l-subdev40 | {<port0> 0}}", shape=Mrecord, style=filled, fillcolor=green]
+	n00000137:port0 -> n00000129:port2 [style=bold]
+	n0000013b [label="{{} | D4XX imu 36-001b\n/dev/v4l-subdev41 | {<port0> 0}}", shape=Mrecord, style=filled, fillcolor=green]
+	n0000013b:port0 -> n00000129:port4 [style=bold]
+	n0000013f [label="vi-output, DS5 mux 36-001b\n/dev/video14", shape=box, style=filled, fillcolor=yellow]
+	n00000151 [label="{{<port1> 1 | <port2> 2 | <port3> 3 | <port4> 4} | DS5 mux 37-001b\n/dev/v4l-subdev47 | {<port0> 0}}", shape=Mrecord, style=filled, fillcolor=green]
+	n00000151:port0 -> n00000016:port0
+	n00000157 [label="{{} | D4XX depth 37-001b\n/dev/v4l-subdev43 | {<port0> 0}}", shape=Mrecord, style=filled, fillcolor=green]
+	n00000157:port0 -> n00000151:port1 [style=bold]
+	n0000015b [label="{{} | D4XX ir 37-001b\n/dev/v4l-subdev44 | {<port0> 0}}", shape=Mrecord, style=filled, fillcolor=green]
+	n0000015b:port0 -> n00000151:port3 [style=bold]
+	n0000015f [label="{{} | D4XX rgb 37-001b\n/dev/v4l-subdev45 | {<port0> 0}}", shape=Mrecord, style=filled, fillcolor=green]
+	n0000015f:port0 -> n00000151:port2 [style=bold]
+	n00000163 [label="{{} | D4XX imu 37-001b\n/dev/v4l-subdev46 | {<port0> 0}}", shape=Mrecord, style=filled, fillcolor=green]
+	n00000163:port0 -> n00000151:port4 [style=bold]
+	n00000167 [label="vi-output, DS5 mux 37-001b\n/dev/video15", shape=box, style=filled, fillcolor=yellow]
+}