Add DIMC SW testing #1860
lint.yml
on: pull_request
Lint Verilog sources
40s
Check bender vendor up-to-date
15s
Check Opcodes Up-to-Date
8s
Check License headers
6s
Lint YAML Sources
6s
Lint Python Sources
5s
Lint C/C++ Sources
10s
Lint Editorconfig
4s
Matrix: Lint Scala Files
Annotations
10 errors and 8 warnings
Artifacts
Produced during runtime
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verible-linter
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164 Bytes |
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