grammar and header changes for SPV_INTEL_subgroup_matrix_multiply_acc…

…umulate (#471)
KhronosGroup · Jan 16, 2025 · 2b2e05e · 2b2e05e
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commit 2b2e05e
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diff --git a/include/spirv/unified1/spirv.bf b/include/spirv/unified1/spirv.bf
@@ -1288,6 +1288,7 @@ namespace Spv
             Subgroup2DBlockIOINTEL = 6228,
             Subgroup2DBlockTransformINTEL = 6229,
             Subgroup2DBlockTransposeINTEL = 6230,
+            SubgroupMatrixMultiplyAccumulateINTEL = 6236,
             GroupUniformArithmeticKHR = 6400,
             MaskedGatherScatterINTEL = 6427,
             CacheControlsINTEL = 6441,
@@ -1528,6 +1529,44 @@ namespace Spv
             Max = 0x7fffffff,
         }
 
+        [AllowDuplicates, CRepr] public enum MatrixMultiplyAccumulateOperandsShift
+        {
+            MatrixASignedComponentsINTEL = 0,
+            MatrixBSignedComponentsINTEL = 1,
+            MatrixCBFloat16INTEL = 2,
+            MatrixResultBFloat16INTEL = 3,
+            MatrixAPackedInt8INTEL = 4,
+            MatrixBPackedInt8INTEL = 5,
+            MatrixAPackedInt4INTEL = 6,
+            MatrixBPackedInt4INTEL = 7,
+            MatrixATF32INTEL = 8,
+            MatrixBTF32INTEL = 9,
+            MatrixAPackedFloat16INTEL = 10,
+            MatrixBPackedFloat16INTEL = 11,
+            MatrixAPackedBFloat16INTEL = 12,
+            MatrixBPackedBFloat16INTEL = 13,
+            Max = 0x7fffffff,
+        }
+
+        [AllowDuplicates, CRepr] public enum MatrixMultiplyAccumulateOperandsMask
+        {
+            MaskNone = 0,
+            MatrixASignedComponentsINTEL = 0x00000001,
+            MatrixBSignedComponentsINTEL = 0x00000002,
+            MatrixCBFloat16INTEL = 0x00000004,
+            MatrixResultBFloat16INTEL = 0x00000008,
+            MatrixAPackedInt8INTEL = 0x00000010,
+            MatrixBPackedInt8INTEL = 0x00000020,
+            MatrixAPackedInt4INTEL = 0x00000040,
+            MatrixBPackedInt4INTEL = 0x00000080,
+            MatrixATF32INTEL = 0x00000100,
+            MatrixBTF32INTEL = 0x00000200,
+            MatrixAPackedFloat16INTEL = 0x00000400,
+            MatrixBPackedFloat16INTEL = 0x00000800,
+            MatrixAPackedBFloat16INTEL = 0x00001000,
+            MatrixBPackedBFloat16INTEL = 0x00002000,
+        }
+
         [AllowDuplicates, CRepr] public enum RawAccessChainOperandsShift
         {
             RobustnessPerComponentNV = 0,
@@ -2314,6 +2353,7 @@ namespace Spv
             OpSubgroup2DBlockLoadTransposeINTEL = 6233,
             OpSubgroup2DBlockPrefetchINTEL = 6234,
             OpSubgroup2DBlockStoreINTEL = 6235,
+            OpSubgroupMatrixMultiplyAccumulateINTEL = 6237,
             OpGroupIMulKHR = 6401,
             OpGroupFMulKHR = 6402,
             OpGroupBitwiseAndKHR = 6403,

diff --git a/include/spirv/unified1/spirv.core.grammar.json b/include/spirv/unified1/spirv.core.grammar.json
@@ -10224,6 +10224,22 @@
       "capabilities" : [ "Subgroup2DBlockIOINTEL" ],
       "version" : "None"
     },
+    {
+      "opname" : "OpSubgroupMatrixMultiplyAccumulateINTEL",
+      "class"  : "Group",
+      "opcode" : 6237,
+      "operands" : [
+        { "kind" : "IdResultType" },
+        { "kind" : "IdResult" },
+        { "kind" : "IdRef", "name" : "'K Dim'" },
+        { "kind" : "IdRef", "name" : "'Matrix A'" },
+        { "kind" : "IdRef", "name" : "'Matrix B'" },
+        { "kind" : "IdRef", "name" : "'Matrix C'" },
+        { "kind" : "MatrixMultiplyAccumulateOperands", "quantifier" : "?" }
+      ],
+      "capabilities" : [ "SubgroupMatrixMultiplyAccumulateINTEL" ],
+      "version" : "None"
+    },
     {
       "opname" : "OpGroupIMulKHR",
       "class"  : "Group",
@@ -16706,6 +16722,12 @@
           "extensions": [ "SPV_INTEL_2d_block_io" ],
           "version" : "None"
         },
+        {
+          "enumerant" : "SubgroupMatrixMultiplyAccumulateINTEL",
+          "value" : 6236,
+          "extensions": [ "SPV_INTEL_subgroup_matrix_multiply_accumulate" ],
+          "version" : "None"
+        },
         {
           "enumerant" : "GroupUniformArithmeticKHR",
           "value" : 6400,
@@ -17065,6 +17087,87 @@
         }
       ]
     },
+    {
+      "category" : "BitEnum",
+      "kind" : "MatrixMultiplyAccumulateOperands",
+      "enumerants" : [
+        {
+          "enumerant" : "None",
+          "value" : "0x0",
+          "version" : "None"
+        },
+        {
+          "enumerant" : "MatrixASignedComponentsINTEL",
+          "value" : "0x1",
+          "version" : "None"
+        },
+        {
+          "enumerant" : "MatrixBSignedComponentsINTEL",
+          "value" : "0x2",
+          "version" : "None"
+        },
+        {
+          "enumerant" : "MatrixCBFloat16INTEL",
+          "value" : "0x4",
+          "version" : "None"
+        },
+        {
+          "enumerant" : "MatrixResultBFloat16INTEL",
+          "value" : "0x8",
+          "version" : "None"
+        },
+        {
+          "enumerant" : "MatrixAPackedInt8INTEL",
+          "value" : "0x10",
+          "version" : "None"
+        },
+        {
+          "enumerant" : "MatrixBPackedInt8INTEL",
+          "value" : "0x20",
+          "version" : "None"
+        },
+        {
+          "enumerant" : "MatrixAPackedInt4INTEL",
+          "value" : "0x40",
+          "version" : "None"
+        },
+        {
+          "enumerant" : "MatrixBPackedInt4INTEL",
+          "value" : "0x80",
+          "version" : "None"
+        },
+        {
+          "enumerant" : "MatrixATF32INTEL",
+          "value" : "0x100",
+          "version" : "None"
+        },
+        {
+          "enumerant" : "MatrixBTF32INTEL",
+          "value" : "0x200",
+          "version" : "None"
+        },
+        {
+          "enumerant" : "MatrixAPackedFloat16INTEL",
+          "value" : "0x400",
+          "version" : "None"
+        },
+        {
+          "enumerant" : "MatrixBPackedFloat16INTEL",
+          "value" : "0x800",
+          "version" : "None"
+        },
+        {
+          "enumerant" : "MatrixAPackedBFloat16INTEL",
+          "value" : "0x1000",
+          "version" : "None"
+        },
+        {
+          "enumerant" : "MatrixBPackedBFloat16INTEL",
+          "value" : "0x2000",
+          "version" : "None"
+        }
+      ]
+    },
     {
       "category" : "ValueEnum",
       "kind" : "FPEncoding",

diff --git a/include/spirv/unified1/spirv.cs b/include/spirv/unified1/spirv.cs
@@ -1287,6 +1287,7 @@ public enum Capability
             Subgroup2DBlockIOINTEL = 6228,
             Subgroup2DBlockTransformINTEL = 6229,
             Subgroup2DBlockTransposeINTEL = 6230,
+            SubgroupMatrixMultiplyAccumulateINTEL = 6236,
             GroupUniformArithmeticKHR = 6400,
             MaskedGatherScatterINTEL = 6427,
             CacheControlsINTEL = 6441,
@@ -1527,6 +1528,44 @@ public enum NamedMaximumNumberOfRegisters
             Max = 0x7fffffff,
         }
 
+        public enum MatrixMultiplyAccumulateOperandsShift
+        {
+            MatrixASignedComponentsINTEL = 0,
+            MatrixBSignedComponentsINTEL = 1,
+            MatrixCBFloat16INTEL = 2,
+            MatrixResultBFloat16INTEL = 3,
+            MatrixAPackedInt8INTEL = 4,
+            MatrixBPackedInt8INTEL = 5,
+            MatrixAPackedInt4INTEL = 6,
+            MatrixBPackedInt4INTEL = 7,
+            MatrixATF32INTEL = 8,
+            MatrixBTF32INTEL = 9,
+            MatrixAPackedFloat16INTEL = 10,
+            MatrixBPackedFloat16INTEL = 11,
+            MatrixAPackedBFloat16INTEL = 12,
+            MatrixBPackedBFloat16INTEL = 13,
+            Max = 0x7fffffff,
+        }
+
+        public enum MatrixMultiplyAccumulateOperandsMask
+        {
+            MaskNone = 0,
+            MatrixASignedComponentsINTEL = 0x00000001,
+            MatrixBSignedComponentsINTEL = 0x00000002,
+            MatrixCBFloat16INTEL = 0x00000004,
+            MatrixResultBFloat16INTEL = 0x00000008,
+            MatrixAPackedInt8INTEL = 0x00000010,
+            MatrixBPackedInt8INTEL = 0x00000020,
+            MatrixAPackedInt4INTEL = 0x00000040,
+            MatrixBPackedInt4INTEL = 0x00000080,
+            MatrixATF32INTEL = 0x00000100,
+            MatrixBTF32INTEL = 0x00000200,
+            MatrixAPackedFloat16INTEL = 0x00000400,
+            MatrixBPackedFloat16INTEL = 0x00000800,
+            MatrixAPackedBFloat16INTEL = 0x00001000,
+            MatrixBPackedBFloat16INTEL = 0x00002000,
+        }
+
         public enum RawAccessChainOperandsShift
         {
             RobustnessPerComponentNV = 0,
@@ -2313,6 +2352,7 @@ public enum Op
             OpSubgroup2DBlockLoadTransposeINTEL = 6233,
             OpSubgroup2DBlockPrefetchINTEL = 6234,
             OpSubgroup2DBlockStoreINTEL = 6235,
+            OpSubgroupMatrixMultiplyAccumulateINTEL = 6237,
             OpGroupIMulKHR = 6401,
             OpGroupFMulKHR = 6402,
             OpGroupBitwiseAndKHR = 6403,

diff --git a/include/spirv/unified1/spirv.h b/include/spirv/unified1/spirv.h
@@ -1258,6 +1258,7 @@ typedef enum SpvCapability_ {
     SpvCapabilitySubgroup2DBlockIOINTEL = 6228,
     SpvCapabilitySubgroup2DBlockTransformINTEL = 6229,
     SpvCapabilitySubgroup2DBlockTransposeINTEL = 6230,
+    SpvCapabilitySubgroupMatrixMultiplyAccumulateINTEL = 6236,
     SpvCapabilityGroupUniformArithmeticKHR = 6400,
     SpvCapabilityMaskedGatherScatterINTEL = 6427,
     SpvCapabilityCacheControlsINTEL = 6441,
@@ -1472,6 +1473,42 @@ typedef enum SpvNamedMaximumNumberOfRegisters_ {
     SpvNamedMaximumNumberOfRegistersMax = 0x7fffffff,
 } SpvNamedMaximumNumberOfRegisters;
 
+typedef enum SpvMatrixMultiplyAccumulateOperandsShift_ {
+    SpvMatrixMultiplyAccumulateOperandsMatrixASignedComponentsINTELShift = 0,
+    SpvMatrixMultiplyAccumulateOperandsMatrixBSignedComponentsINTELShift = 1,
+    SpvMatrixMultiplyAccumulateOperandsMatrixCBFloat16INTELShift = 2,
+    SpvMatrixMultiplyAccumulateOperandsMatrixResultBFloat16INTELShift = 3,
+    SpvMatrixMultiplyAccumulateOperandsMatrixAPackedInt8INTELShift = 4,
+    SpvMatrixMultiplyAccumulateOperandsMatrixBPackedInt8INTELShift = 5,
+    SpvMatrixMultiplyAccumulateOperandsMatrixAPackedInt4INTELShift = 6,
+    SpvMatrixMultiplyAccumulateOperandsMatrixBPackedInt4INTELShift = 7,
+    SpvMatrixMultiplyAccumulateOperandsMatrixATF32INTELShift = 8,
+    SpvMatrixMultiplyAccumulateOperandsMatrixBTF32INTELShift = 9,
+    SpvMatrixMultiplyAccumulateOperandsMatrixAPackedFloat16INTELShift = 10,
+    SpvMatrixMultiplyAccumulateOperandsMatrixBPackedFloat16INTELShift = 11,
+    SpvMatrixMultiplyAccumulateOperandsMatrixAPackedBFloat16INTELShift = 12,
+    SpvMatrixMultiplyAccumulateOperandsMatrixBPackedBFloat16INTELShift = 13,
+    SpvMatrixMultiplyAccumulateOperandsMax = 0x7fffffff,
+} SpvMatrixMultiplyAccumulateOperandsShift;
+
+typedef enum SpvMatrixMultiplyAccumulateOperandsMask_ {
+    SpvMatrixMultiplyAccumulateOperandsMaskNone = 0,
+    SpvMatrixMultiplyAccumulateOperandsMatrixASignedComponentsINTELMask = 0x00000001,
+    SpvMatrixMultiplyAccumulateOperandsMatrixBSignedComponentsINTELMask = 0x00000002,
+    SpvMatrixMultiplyAccumulateOperandsMatrixCBFloat16INTELMask = 0x00000004,
+    SpvMatrixMultiplyAccumulateOperandsMatrixResultBFloat16INTELMask = 0x00000008,
+    SpvMatrixMultiplyAccumulateOperandsMatrixAPackedInt8INTELMask = 0x00000010,
+    SpvMatrixMultiplyAccumulateOperandsMatrixBPackedInt8INTELMask = 0x00000020,
+    SpvMatrixMultiplyAccumulateOperandsMatrixAPackedInt4INTELMask = 0x00000040,
+    SpvMatrixMultiplyAccumulateOperandsMatrixBPackedInt4INTELMask = 0x00000080,
+    SpvMatrixMultiplyAccumulateOperandsMatrixATF32INTELMask = 0x00000100,
+    SpvMatrixMultiplyAccumulateOperandsMatrixBTF32INTELMask = 0x00000200,
+    SpvMatrixMultiplyAccumulateOperandsMatrixAPackedFloat16INTELMask = 0x00000400,
+    SpvMatrixMultiplyAccumulateOperandsMatrixBPackedFloat16INTELMask = 0x00000800,
+    SpvMatrixMultiplyAccumulateOperandsMatrixAPackedBFloat16INTELMask = 0x00001000,
+    SpvMatrixMultiplyAccumulateOperandsMatrixBPackedBFloat16INTELMask = 0x00002000,
+} SpvMatrixMultiplyAccumulateOperandsMask;
+
 typedef enum SpvRawAccessChainOperandsShift_ {
     SpvRawAccessChainOperandsRobustnessPerComponentNVShift = 0,
     SpvRawAccessChainOperandsRobustnessPerElementNVShift = 1,
@@ -2254,6 +2291,7 @@ typedef enum SpvOp_ {
     SpvOpSubgroup2DBlockLoadTransposeINTEL = 6233,
     SpvOpSubgroup2DBlockPrefetchINTEL = 6234,
     SpvOpSubgroup2DBlockStoreINTEL = 6235,
+    SpvOpSubgroupMatrixMultiplyAccumulateINTEL = 6237,
     SpvOpGroupIMulKHR = 6401,
     SpvOpGroupFMulKHR = 6402,
     SpvOpGroupBitwiseAndKHR = 6403,
@@ -3029,6 +3067,7 @@ inline void SpvHasResultAndType(SpvOp opcode, bool *hasResult, bool *hasResultTy
     case SpvOpSubgroup2DBlockLoadTransposeINTEL: *hasResult = false; *hasResultType = false; break;
     case SpvOpSubgroup2DBlockPrefetchINTEL: *hasResult = false; *hasResultType = false; break;
     case SpvOpSubgroup2DBlockStoreINTEL: *hasResult = false; *hasResultType = false; break;
+    case SpvOpSubgroupMatrixMultiplyAccumulateINTEL: *hasResult = true; *hasResultType = true; break;
     case SpvOpGroupIMulKHR: *hasResult = true; *hasResultType = true; break;
     case SpvOpGroupFMulKHR: *hasResult = true; *hasResultType = true; break;
     case SpvOpGroupBitwiseAndKHR: *hasResult = true; *hasResultType = true; break;
@@ -3964,6 +4003,7 @@ inline const char* SpvCapabilityToString(SpvCapability value) {
     case SpvCapabilitySubgroup2DBlockIOINTEL: return "Subgroup2DBlockIOINTEL";
     case SpvCapabilitySubgroup2DBlockTransformINTEL: return "Subgroup2DBlockTransformINTEL";
     case SpvCapabilitySubgroup2DBlockTransposeINTEL: return "Subgroup2DBlockTransposeINTEL";
+    case SpvCapabilitySubgroupMatrixMultiplyAccumulateINTEL: return "SubgroupMatrixMultiplyAccumulateINTEL";
     case SpvCapabilityGroupUniformArithmeticKHR: return "GroupUniformArithmeticKHR";
     case SpvCapabilityMaskedGatherScatterINTEL: return "MaskedGatherScatterINTEL";
     case SpvCapabilityCacheControlsINTEL: return "CacheControlsINTEL";
@@ -4882,6 +4922,7 @@ inline const char* SpvOpToString(SpvOp value) {
     case SpvOpSubgroup2DBlockLoadTransposeINTEL: return "OpSubgroup2DBlockLoadTransposeINTEL";
     case SpvOpSubgroup2DBlockPrefetchINTEL: return "OpSubgroup2DBlockPrefetchINTEL";
     case SpvOpSubgroup2DBlockStoreINTEL: return "OpSubgroup2DBlockStoreINTEL";
+    case SpvOpSubgroupMatrixMultiplyAccumulateINTEL: return "OpSubgroupMatrixMultiplyAccumulateINTEL";
     case SpvOpGroupIMulKHR: return "OpGroupIMulKHR";
     case SpvOpGroupFMulKHR: return "OpGroupFMulKHR";
     case SpvOpGroupBitwiseAndKHR: return "OpGroupBitwiseAndKHR";