Minor changes

Ledmington · Nov 17, 2024 · 312023e · 312023e
1 parent 719f6eb
commit 312023e
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Showing 2 changed files with 15 additions and 18 deletions.
diff --git a/emu/src/main/java/com/ledmington/emu/X86Cpu.java b/emu/src/main/java/com/ledmington/emu/X86Cpu.java
@@ -138,21 +138,13 @@ public void executeOne(final Instruction inst) {
 				}
 			}
 			case XOR -> {
-				if (inst.firstOperand() instanceof Register op1 && inst.secondOperand() instanceof Register op2) {
-					switch (op1.bits()) {
-						case 8 -> {
-							final byte r1 = rf.get((Register8) op1);
-							final byte r2 = rf.get((Register8) op2);
-							rf.set((Register8) op1, BitUtils.xor(r1, r2));
-						}
-						case 32 -> {
-							final int r1 = rf.get((Register32) op1);
-							final int r2 = rf.get((Register32) op2);
-							rf.set((Register32) op1, r1 ^ r2);
-						}
-						default -> throw new IllegalArgumentException(
-								String.format("Don't know what to do when XOR has %,d bits", op1.bits()));
-					}
+				if (inst.firstOperand() instanceof Register8 r1_8 && inst.secondOperand() instanceof Register8 r2_8) {
+					rf.set(r1_8, BitUtils.xor(rf.get(r1_8), rf.get(r2_8)));
+				} else if (inst.firstOperand() instanceof Register32 r1_32
+						&& inst.secondOperand() instanceof Register8 r2_32) {
+					rf.set(r1_32, rf.get(r1_32) ^ rf.get(r2_32));
+				} else {
+					throw new IllegalArgumentException(String.format("Don't know what to do with %s", inst));
 				}
 			}
 			case AND -> {
@@ -195,7 +187,8 @@ public void executeOne(final Instruction inst) {
 						switch (inst.firstOperand()) {
 							case Register64 r64 -> rf.get(r64);
 							case Immediate imm -> imm.asLong();
-							default -> throw new IllegalArgumentException("Unexpected value: " + inst.firstOperand());
+							default -> throw new IllegalArgumentException(
+									String.format("Unexpected argument %s", inst.firstOperand()));
 						};
 
 				final long rsp = rf.get(Register64.RSP);
@@ -242,7 +235,7 @@ public void executeOne(final Instruction inst) {
 			}
 			case ENDBR64 -> logger.warning("ENDBR64 not implemented");
 			case HLT -> state = State.HALTED;
-			default -> throw new IllegalStateException(String.format("Unknwon instruction %s", inst.toIntelSyntax()));
+			default -> throw new IllegalStateException(String.format("Unknown instruction %s", inst.toIntelSyntax()));
 		}
 	}
 

diff --git a/id/src/main/java/com/ledmington/cpu/x86/InstructionDecoderV1.java b/id/src/main/java/com/ledmington/cpu/x86/InstructionDecoderV1.java
@@ -1876,7 +1876,11 @@ yield new Instruction(
 			case (byte) 0xf2 -> throw new UnrecognizedPrefix("REPNE", b.getPosition());
 			case (byte) 0xf3 -> throw new UnrecognizedPrefix("REP", b.getPosition());
 			default -> {
-				logger.debug("0x%02x 0x%02x 0x%02x 0x%02x", opcodeFirstByte, b.read1(), b.read1(), b.read1());
+				final long pos = b.getPosition();
+				logger.debug(
+						"Unknown opcode: 0x%02x 0x%02x 0x%02x 0x%02x",
+						opcodeFirstByte, b.read1(), b.read1(), b.read1());
+				b.setPosition(pos);
 				throw new UnknownOpcode(opcodeFirstByte);
 			}
 		};