make sure data and addr lines set correctly during read #781

MEGA65 · Feb 18, 2024 · cf2c7a1 · cf2c7a1
1 parent a3f9c23
commit cf2c7a1
Showing 1 changed file with 7 additions and 1 deletion.
diff --git a/src/vhdl/tb_cartridges.vhdl b/src/vhdl/tb_cartridges.vhdl
@@ -204,7 +204,13 @@ begin
           -- Correctly model when we are cross-driving cart_d lines
           if cart_data_dir='1' then
             report "CART64K: cart_data_dir set to output when cart was asked to present cart_d lines: CROSS DRIVING";
-            cart_d_in <= (others => 'X');
+            cart_d_in <= (others => 'X'); 
+         elsif cart_data_en='1' then
+            report "CART64K: cart_data_en not asserted";
+            cart_d_in <= (others => 'U');
+         elsif cart_addr_en='1' or cart_haddr_dir='0' or cart_laddr_dir='0' then
+            report "CART64K: Address lines not set to output";
+            cart_d_in <= (others => 'U');
           else
             cart_d_in <= to_unsigned(to_integer(cart_a(7 downto 0)) + cart_bank,8);
             cart_driving <= '1';