enhanve tests for keypad_i2c #798

src/vhdl/pca9555.vhdl

@@ -28,6 +28,16 @@ entity pca9555 is
     reset: in std_logic;
     scl: in std_logic;
     sda: inout std_logic;
+
+    debug_reg0: inout unsigned(7 downto 0);
+    debug_reg1: inout unsigned(7 downto 0);
+    debug_reg2: inout unsigned(7 downto 0);
+    debug_reg3: inout unsigned(7 downto 0);
+    debug_reg4: inout unsigned(7 downto 0);
+    debug_reg5: inout unsigned(7 downto 0);
+    debug_reg6: inout unsigned(7 downto 0);
+    debug_reg7: inout unsigned(7 downto 0);
+
     port0: inout unsigned(7 downto 0);
     port1: inout unsigned(7 downto 0));
 end entity pca9555;
@@ -133,6 +143,7 @@ begin
             if data_in_valid then
               registers(to_integer(selected_register_index)) <= data_in;
               state <= wait_for_event_released;
+              report "PCA9555: Writing $" & to_hexstring(data_in) & " to register " & integer'image(to_integer(selected_register_index));
             end if;
             if data_out_requested then
               report "PCA9555: Reading regsiter $" & to_hexstring(selected_register_index)
@@ -166,6 +177,17 @@ begin
             port1(i) <= registers(3)(i) xor registers(5)(i);
           end if;
         end loop;
+
+        -- Expose other registers for debug
+        debug_reg0 <= registers(0);
+        debug_reg1 <= registers(1);
+        debug_reg2 <= registers(2);
+        debug_reg3 <= registers(3);
+        debug_reg4 <= registers(4);
+        debug_reg5 <= registers(5);
+        debug_reg6 <= registers(6);
+        debug_reg7 <= registers(7);
+
       end if;
     end if;
   end process;

src/vhdl/tb_keypad_i2c.vhdl

@@ -32,6 +32,15 @@ architecture test_arch of tb_keypad_i2c is
   signal port0 : unsigned(7 downto 0) := x"00";
   signal port1 : unsigned(7 downto 0) := x"50";
 
+  signal debug_reg0: unsigned(7 downto 0);
+  signal debug_reg1: unsigned(7 downto 0);
+  signal debug_reg2: unsigned(7 downto 0);
+  signal debug_reg3: unsigned(7 downto 0);
+  signal debug_reg4: unsigned(7 downto 0);
+  signal debug_reg5: unsigned(7 downto 0);
+  signal debug_reg6: unsigned(7 downto 0);
+  signal debug_reg7: unsigned(7 downto 0);
+
   signal reset_high : std_logic;
 
 begin
@@ -44,6 +53,16 @@ begin
                reset => reset_high,
                scl => scl,
                sda => sda,
+
+               debug_reg0 => debug_reg0,
+               debug_reg1 => debug_reg1,
+               debug_reg2 => debug_reg2,
+               debug_reg3 => debug_reg3,
+               debug_reg4 => debug_reg4,
+               debug_reg5 => debug_reg5,
+               debug_reg6 => debug_reg6,
+               debug_reg7 => debug_reg7,
+
                port0 => port0,
                port1 => port1);
 
@@ -162,15 +181,19 @@ begin
           end if;
         end loop;
 
+        -- Give time for register update to propagate
+        wait_a_while(10);       
+
         if debug_write_pending_count = 0 then
           assert false report "write job was never marked pending";
         end if;
         if debug_write_count = 0 then
           assert false report "write job was never completed";
         end if;
 
-        report "debug_write_pending_count = " & integer'image(debug_write_pending_count);
-        report "debug_write_count = " & integer'image(debug_write_count);
+        if debug_reg6 /= x"91" then
+          assert false report "PCA9555 register had $91 written to it, but contained $" & to_hexstring(debug_reg6) & " after the write.";
+        end if;
 
       end if;
     end loop;