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Removal of Notice from readme as updated RISC-V HAL and MIV_RV32 solv…
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…e the issue.
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CLappin committed Apr 10, 2024
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16 changes: 0 additions & 16 deletions FlashPro_Express_Projects/README.md
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This folder contains FlashPro Express v2024.1 projects for the Arrow Everest Board Mi-V sample designs.

## Notice
1) Due to an issue specific to the MIV_RV32 v3.1.100 with the MTVECs address, it is not recommended to use MIV_RV32 v3.1.100 for any FreeRTOS examples. You may use MIV_RV32 v3.0 or the latest MIV_RV32 v3.1.200 with the FreeRTOS examples.

2) There is also an issue which effects all MIV_RV32 cores up to v3.1.100, when using fast interrupts where the return address can become corrupted. There software workaround can be applied in the entry.S in MIV_RV32 HAL file as shown below until the issue is fixed in the IP.

.macro STORE_CONTEXT
addi sp, sp, -SP_SHIFT_OFFSET*REGBYTES
SREG x1, 0 * REGBYTES(sp)
SREG x1, 0 * REGBYTES(sp) // re-write the return address to workaround
SREG x2, 1 * REGBYTES(sp)
SREG x3, 2 * REGBYTES(sp)

Please see the latest MIV_RV32 HAL available [here](https://github.com/Mi-V-Soft-RISC-V/platform/tree/main/miv_rv32_hal).

A new version of the MIV_RV32 will be released to fix both the issues mentioned above.

## FlashPro Express
The programming files contained under this folder were exported from the designs in the Libero_Projects folder in this repository. Select the desired programming file (.job) and program your device using FlashPro Express.

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17 changes: 0 additions & 17 deletions Libero_Projects/README.md
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# Arrow Everest Board Mi-V Sample FPGA Designs
This folder contains Tcl scripts that build Libero SoC v2024.1 design projects for the Arrow Everest Board. These scripts are executed in Libero SoC to generate the sample designs. All cores boot from memory at 0x8000_0000.

## Notice
1) Due to an issue specific to the MIV_RV32 v3.1.100 with the MTVECs address, it is not recommended to use MIV_RV32 v3.1.100 for any FreeRTOS examples. You may use MIV_RV32 v3.0 or the latest MIV_RV32 v3.1.200 with the FreeRTOS examples.

2) There is also an issue which effects all MIV_RV32 cores up to v3.1.100, when using fast interrupts where the return address can become corrupted. There software workaround can be applied in the entry.S in MIV_RV32 HAL file as shown below until the issue is fixed in the IP.

.macro STORE_CONTEXT
addi sp, sp, -SP_SHIFT_OFFSET*REGBYTES
SREG x1, 0 * REGBYTES(sp)
SREG x1, 0 * REGBYTES(sp) // re-write the return address to workaround
SREG x2, 1 * REGBYTES(sp)
SREG x3, 2 * REGBYTES(sp)

Please see the latest MIV_RV32 HAL available [here](https://github.com/Mi-V-Soft-RISC-V/platform/tree/main/miv_rv32_hal).

A new version of the MIV_RV32 will be released to fix both the issues mentioned above.


#### PF_Everest_MIV_RV32_BaseDesign

| Config | Description|
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