Merged miv-udma source code version 2.0.114

Mi-V-Soft-RISC-V · Oct 18, 2022 · df95c83 · df95c83
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diff --git a/driver-examples/miv-udma/miv-rv32-udma/.cproject b/driver-examples/miv-udma/miv-rv32-udma/.cproject
diff --git a/driver-examples/miv-udma/miv-rv32-udma/.gitignore b/driver-examples/miv-udma/miv-rv32-udma/.gitignore
@@ -0,0 +1,7 @@
+/*Debug*/
+/*Release*/
+/.settings*/
+/miv-rv32i-debug/
+/miv-rv32-imc-debug/
+/miv-rv32-imc-release/
+/miv-rv32i-release/
diff --git a/driver-examples/miv-udma/miv-rv32-udma/.project b/driver-examples/miv-udma/miv-rv32-udma/.project
@@ -0,0 +1,26 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<projectDescription>
+	<name>miv-rv32-udma</name>
+	<comment></comment>
+	<projects>
+	</projects>
+	<buildSpec>
+		<buildCommand>
+			<name>org.eclipse.cdt.managedbuilder.core.genmakebuilder</name>
+			<triggers>clean,full,incremental,</triggers>
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+			</arguments>
+		</buildCommand>
+		<buildCommand>
+			<name>org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder</name>
+			<triggers>full,incremental,</triggers>
+			<arguments>
+			</arguments>
+		</buildCommand>
+	</buildSpec>
+	<natures>
+		<nature>org.eclipse.cdt.core.cnature</nature>
+		<nature>org.eclipse.cdt.managedbuilder.core.managedBuildNature</nature>
+		<nature>org.eclipse.cdt.managedbuilder.core.ScannerConfigNature</nature>
+	</natures>
+</projectDescription>
diff --git a/driver-examples/miv-udma/miv-rv32-udma/README.md b/driver-examples/miv-udma/miv-rv32-udma/README.md
@@ -0,0 +1,58 @@
+# MIV uDMA Example
+
+This project demonstrates the Mi-V Soft IP uDMA module functionality, which is delivered as a
+part of MIV Extended Sub System(MIV_ESS).  
+This project sets up the data transfer between two memory blocks, based on the
+configuration the uDMA controller will generate the interrupt for error or
+success of the transfer.   
+The uDMA IRQ from the MIV_ESS can be connected to
+any of the external interrupt pins on the MIV_RV32, so the application
+developer should perform the interrupt handling in respective interrupt handler.
+
+
+There are 2 different build configurations provided with this project which configure
+this SoftConsole project for RISC-V IMC instruction extension.
+The Following configurations are provided with the example.
+ - miv32imc-Debug
+ - miv32imc-Release
+
+ To use this project, configure the COM port interface as below:
+  - 115200 baud
+  - 8 data bits
+  - 1 stop bit
+  - no parity
+  - no flow control
+
+## fpga_design_config (formerly known as hw_config.h)
+The SoftConsole project targeted for Mi-V processors now use an improved
+directory structure. Detailed description of the folder structure is available
+at https://github.com/Mi-V-Soft-RISC-V/miv-rv32-documentation.
+The fpga_design_config.h must be stored as shown below
+
+`
+    <project-root>/boards/<board-name>/fpga_design_config/fpga_design_config.h
+`
+
+Currently, this file must be hand crafted when using the Mi-V Soft Processor.
+In future, all the design and soft IP configurations will be automatically
+generated from the Libero design description data.
+
+You can use the sample file provided with MIV_RV32 HAL as an example.
+Rename it from sample_fpga_design_config.h to fpga_design_config.h and then
+customize it per your hardware design such as SYS_CLK_FREQ, peripheral
+BASE addresses, interrupt numbers, definition of MSCC_STDIO_UART_BASE_ADDR if
+you want a CoreUARTapb mapped to STDIO, etc.
+
+## Linker script changes
+
+You must make sure that in addition to the reset vector, all other memory address
+configurations in the Mi-V soft processor match with the memory layout defined
+in the linker script.
+
+## Target hardware
+This project is tested on PolarFire Eval Kit MIV_RV32 IMC Core.    
+Libero example/job URL here:
+https://mi-v-soft-risc-v.github.io/PolarFire-Eval-Kit/
+
+## Mi-V soft processor revision dependencies
+This project is tested with MIV_RV32 v3.0
diff --git a/driver-examples/miv-udma/miv-rv32-udma/miv-rv32-udma hw attach.launch b/driver-examples/miv-udma/miv-rv32-udma/miv-rv32-udma hw attach.launch
@@ -0,0 +1,59 @@
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diff --git a/driver-examples/miv-udma/miv-rv32-udma/miv-rv32-udma hw debug.launch b/driver-examples/miv-udma/miv-rv32-udma/miv-rv32-udma hw debug.launch
@@ -0,0 +1,61 @@
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diff --git a/driver-examples/miv-udma/miv-rv32-udma/src/application/main.c b/driver-examples/miv-udma/miv-rv32-udma/src/application/main.c
@@ -0,0 +1,163 @@
+/*******************************************************************************
+ * Copyright 2022 Microchip FPGA Embedded Systems Solutions.
+ *
+ * SPDX-License-Identifier: MIT
+ *
+ * MIV uDMA Example project
+ *
+ * This project will demonstrate the use of MIV uDMA Bare-metal software driver.
+ * A 32-bit data is written into the source address and the uDMA controller
+ * will copy the data from src_addr to dest_addr.
+ * A verify function will check if the correct data is read or not, and based
+ * on the response, UART messages will be printed.
+ *
+ * Please refer README.md in the root folder of this project for more details.
+ */
+
+#include <stdio.h>
+#include "miv_rv32_hal/miv_rv32_hal.h"
+#include "fpga_design_config/fpga_design_config.h"
+#include "drivers/fpga_ip/CoreUARTapb/core_uart_apb.h"
+#include "drivers/fpga_ip/miv_udma/miv_udma.h"
+
+/******************************************************************************
+ * Peripheral instance data.
+ *****************************************************************************/
+UART_instance_t g_uart;
+
+miv_udma_instance_t g_miv_ess_udma;
+
+/* Local function to verify the uDMA transaction */
+static uint8_t
+verify_write
+(
+    uint32_t* write_buff,
+    uint32_t* read_buff,
+    uint16_t size
+);
+
+/*
+ *  Local Constants to hold the source and destination address
+ *  Application developer should update these values as per requirements.
+ */
+#define MIV_UDMA_TRANSFER_SRC_ADDR              0x89000000u
+#define MIV_UDMA_TRANSFER_DEST_ADDR             0x8A000000u
+
+/*==============================================================================
+ * Messages displayed over the UART.
+ */
+const uint8_t g_greeting_msg[] =
+"\r\n\r\n\t\t **** PolarFire MiV uDMA Example ****\n\n\n\r\
+This application will demonstrate the use of MIV uDMA bare-metal driver.\r\n\n\
+It will copy the data from MIV_UDMA_TRANSFER_SRC_ADDR to MIV_UDMA_TRANSFER_DEST_ADDR.\r\n\n\
+";
+
+static void display_greeting(void);
+
+uint32_t g_udma_status = 0u;
+
+/*==============================================================================
+ * Display greeting message when application is started.
+ */
+static void display_greeting(void)
+{
+    UART_polled_tx_string(&g_uart, g_greeting_msg);
+}
+
+/* MIV RV32 External interrupt handlers for MIV_ESS uDMA */
+void MSYS_EI1_IRQHandler()
+{
+    g_udma_status = MIV_uDMA_read_status(&g_miv_ess_udma);
+
+    MIV_uDMA_reset(&g_miv_ess_udma);
+}
+
+/******************************************************************************
+ * main function.
+ *****************************************************************************/
+void main(void)
+{
+    size_t rx_size;
+    uint8_t rx_buff[1] = {0x00};
+    uint32_t counter = 0u;
+
+    /* Initialize CoreUARTapb with its base address, baud value, and line
+     * configuration.
+     */
+    UART_init(&g_uart, COREUARTAPB0_BASE_ADDR, BAUD_VALUE_115200, (DATA_8_BITS | NO_PARITY));
+
+    display_greeting();
+
+    MRV_enable_local_irq(MRV32_MSYS_EIE1_IRQn);
+
+    HAL_enable_interrupts();
+
+    uint32_t *src_addr = (uint32_t*)MIV_UDMA_TRANSFER_SRC_ADDR;
+    uint32_t *dest_addr = (uint32_t*)MIV_UDMA_TRANSFER_DEST_ADDR;
+
+    /* Write some data in the source memory */
+    *src_addr = 0xAFAFAFAF;
+
+    MIV_uDMA_init(&g_miv_ess_udma, MIV_ESS_uDMA_BASE_ADDR);
+
+    MIV_uDMA_config(&g_miv_ess_udma, MIV_UDMA_TRANSFER_SRC_ADDR ,
+                    MIV_UDMA_TRANSFER_DEST_ADDR, 0x8, MIV_uDMA_CTRL_IRQ_CONFIG);
+
+    MIV_uDMA_start(&g_miv_ess_udma);
+
+    while(1)
+    {
+        if (g_udma_status == MIV_uDMA_STATUS_BUSY)
+        {
+            UART_polled_tx_string(&g_uart,
+            (const uint8_t *)"\r\n uDMA busy");
+
+            g_udma_status = 0xff;
+        }
+        else if (g_udma_status == MIV_uDMA_STATUS_ERROR)
+        {
+            UART_polled_tx_string(&g_uart,
+            (const uint8_t *)"\r\n uDMA error");
+            g_udma_status = 0xff;
+        }
+        else if (g_udma_status == 0u)
+        {
+            counter = verify_write(src_addr, dest_addr, 8u);
+            if (counter == 0u)
+            {
+                UART_polled_tx_string(&g_uart,
+                        (const uint8_t *)"\r\n uDMA Success");
+                g_udma_status = 0xff;
+            }
+            else
+            {
+                UART_polled_tx_string(&g_uart,
+                        (const uint8_t *)"\r\n uDMA wrong data");
+                g_udma_status = 0xff;
+            }
+        }
+    }
+}
+
+/**************************************************************************//**
+ * Read the data from destination memory and compare the same with source
+ * address contents.
+ */
+static uint8_t verify_write(uint32_t* write_buff, uint32_t* read_buff, uint16_t size)
+{
+    uint8_t error = 0U;
+    uint16_t index = 0U;
+
+    while(size != 0U)
+    {
+        if(write_buff[index] != read_buff[index])
+        {
+            error = 1U;
+            break;
+        }
+        index++;
+        size--;
+    }
+
+    return error;
+}
diff --git a/...v32-udma/src/boards/polarfire-eval-kit/fpga_design/design_description/README.md b/...v32-udma/src/boards/polarfire-eval-kit/fpga_design/design_description/README.md
@@ -0,0 +1,2 @@
+# Desgin desctription
+The Libero generated design desctription will be stored here.
Original file line number	Diff line number	Diff line change
		@@ -0,0 +1,2 @@
		# Desgin desctription
		The Libero generated design desctription will be stored here.