SoC/evalsoc: Enable BPU for 900 series for iar to speed up benchmark

Forget to enable BPU in iar startup code, which is done in gcc,

coremark increased for 900 with optimized for speed - high - no size
constraint in iar v3.30.1

Tested on n900_best_config_mmu_ku060_ku060_50M_6243f32eb0_099494c69_202409061040.bit

CSV, Benchmark, Iterations, Cycles, CoreMark/MHz
CSV, CoreMark, 600, 197530259, 3.037
IPC = Instret/Cycle = 130191265/197530259 = 0.659

Increased to

CSV, Benchmark, Iterations, Cycles, CoreMark/MHz
CSV, CoreMark, 600, 109047259, 5.502
IPC = Instret/Cycle = 130191265/109047259 = 1.193

Signed-off-by: Huaqi Fang <[email protected]>

SoC/evalsoc/Common/Source/IAR/startup_evalsoc.c

@@ -191,6 +191,9 @@ int __low_level_init(void)
         IAR_DATA_INIT();
     }
 
+    /* Enable BPU before enter to main, for 900, by default is off */
+    __RV_CSR_SET(CSR_MMISC_CTL, MMISC_CTL_BPU);
+
     /* Sync multiple harts */
     __sync_harts();