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workaround mingw bug in overwrite files while copying in filesystem api
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coolbreeze413 committed Sep 6, 2024
1 parent fd895fa commit c0616d4
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Showing 2 changed files with 31 additions and 15 deletions.
8 changes: 8 additions & 0 deletions src/Compiler/CompilerOpenFPGA_ql.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -2339,6 +2339,10 @@ bool CompilerOpenFPGA_ql::Synthesize() {

// copy the source file to the target file path:
// std::cout << "copying:" << relative_file_path << std::endl;
// MinGW g++ bug? overwrite_existing, still throws error if it exists? hence the check below.
if(FileUtils::FileExists(target_file_path_yosys_share)) {
std::filesystem::remove(target_file_path_yosys_share);
}
std::filesystem::copy_file(source_file_path,
target_file_path_yosys_share,
std::filesystem::copy_options::overwrite_existing,
Expand Down Expand Up @@ -2385,6 +2389,10 @@ bool CompilerOpenFPGA_ql::Synthesize() {

// copy the source file to the target file path:
// std::cout << "copying:" << relative_file_path << std::endl;
// MinGW g++ bug? overwrite_existing, still throws error if it exists? hence the check below.
if(FileUtils::FileExists(target_file_path_tabby_share)) {
std::filesystem::remove(target_file_path_tabby_share);
}
std::filesystem::copy_file(source_file_path,
target_file_path_tabby_share,
std::filesystem::copy_options::overwrite_existing,
Expand Down
38 changes: 23 additions & 15 deletions src/Compiler/QLDeviceManager.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -1935,6 +1935,10 @@ int QLDeviceManager::encryptDevice(std::string family, std::string foundry, std:
}

// copy the source encrypted file to the target encrypted file path:
// MinGW g++ bug? overwrite_existing, still throws error if it exists? hence the check below.
if(FileUtils::FileExists(target_en_file_path)) {
std::filesystem::remove(target_en_file_path);
}
std::cout << "copying:" << relative_en_file_path << std::endl;
std::filesystem::copy_file(source_en_file_path,
target_en_file_path,
Expand Down Expand Up @@ -1975,6 +1979,10 @@ int QLDeviceManager::encryptDevice(std::string family, std::string foundry, std:
target_device_data_dir_path / relative_cryptdb_path;

// copy the source cryptdb file to the target cryptdb file path:
// MinGW g++ bug? overwrite_existing, still throws error if it exists? hence the check below.
if(FileUtils::FileExists(target_cryptdb_path)) {
std::filesystem::remove(target_cryptdb_path);
}
std::cout << "copying:" << relative_cryptdb_path << std::endl;
std::filesystem::copy_file(source_cryptdb_path,
target_cryptdb_path,
Expand Down Expand Up @@ -2229,7 +2237,7 @@ std::filesystem::path QLDeviceManager::deviceYosysScriptFile(QLDeviceTarget devi
std::filesystem::path(deviceTypeDirPath(device_target) / std::string("aurora_template_script.ys"));
}

std::cout << "[zyxw]" << "using ys template: " << aurora_template_script_yosys_path.string() << std::endl;
// std::cout << "[zyxw]" << "using ys template: " << aurora_template_script_yosys_path.string() << std::endl;

if(!FileUtils::FileExists(aurora_template_script_yosys_path)) {

Expand Down Expand Up @@ -2296,7 +2304,7 @@ std::filesystem::path QLDeviceManager::deviceOpenFPGAScriptFile(QLDeviceTarget d
std::string("aurora_template_script.openfpga"));
}

std::cout << "[zyxw]" << "using openfpga template: " << aurora_template_script_openfpga_path.string() << std::endl;
// std::cout << "[zyxw]" << "using openfpga template: " << aurora_template_script_openfpga_path.string() << std::endl;

if(!FileUtils::FileExists(aurora_template_script_openfpga_path)) {

Expand Down Expand Up @@ -2365,7 +2373,7 @@ std::filesystem::path QLDeviceManager::deviceVPRArchitectureFile(QLDeviceTarget
}
}

std::cout << "[zyxw]" << "using vpr arch file: " << vpr_architecture_file_path.string() << std::endl;
// std::cout << "[zyxw]" << "using vpr arch file: " << vpr_architecture_file_path.string() << std::endl;

return vpr_architecture_file_path;
}
Expand Down Expand Up @@ -2428,7 +2436,7 @@ std::filesystem::path QLDeviceManager::deviceOpenFPGAArchitectureFile(QLDeviceTa
}
}

std::cout << "[zyxw]" << "using openfpga arch file: " << openfpga_architecture_file_path.string() << std::endl;
// std::cout << "[zyxw]" << "using openfpga arch file: " << openfpga_architecture_file_path.string() << std::endl;

return openfpga_architecture_file_path;
}
Expand Down Expand Up @@ -2491,7 +2499,7 @@ std::filesystem::path QLDeviceManager::deviceOpenFPGABitstreamAnnotationFile(QLD
}
}

std::cout << "[zyxw]" << "using bitstream annotation file: " << bitstream_annotation_file_path.string() << std::endl;
// std::cout << "[zyxw]" << "using bitstream annotation file: " << bitstream_annotation_file_path.string() << std::endl;

return bitstream_annotation_file_path;
}
Expand Down Expand Up @@ -2554,7 +2562,7 @@ std::filesystem::path QLDeviceManager::deviceOpenFPGARepackDesignConstraintFile(
}
}

std::cout << "[zyxw]" << "using repack design contraint file: " << repack_design_constraint_file_path.string() << std::endl;
// std::cout << "[zyxw]" << "using repack design contraint file: " << repack_design_constraint_file_path.string() << std::endl;

return repack_design_constraint_file_path;
}
Expand Down Expand Up @@ -2617,7 +2625,7 @@ std::filesystem::path QLDeviceManager::deviceOpenFPGAFixedSimFile(QLDeviceTarget
}
}

std::cout << "[zyxw]" << "using fixed sim file: " << fixed_sim_file_path.string() << std::endl;
// std::cout << "[zyxw]" << "using fixed sim file: " << fixed_sim_file_path.string() << std::endl;

return fixed_sim_file_path;
}
Expand Down Expand Up @@ -2718,12 +2726,12 @@ std::filesystem::path QLDeviceManager::deviceOpenFPGAFabricKeyFile(QLDeviceTarge
}
}

if(fabric_key_file_path.empty()) {
std::cout << "[zyxw]" << "no fabric key available, use autogenerated one" << std::endl;
}
else {
std::cout << "[zyxw]" << "using fabric key file: " << fabric_key_file_path.string() << std::endl;
}
// if(fabric_key_file_path.empty()) {
// // std::cout << "[zyxw]" << "no fabric key available, use autogenerated one" << std::endl;
// }
// else {
// // std::cout << "[zyxw]" << "using fabric key file: " << fabric_key_file_path.string() << std::endl;
// }

return fabric_key_file_path;
}
Expand Down Expand Up @@ -2896,7 +2904,7 @@ std::filesystem::path QLDeviceManager::deviceOpenFPGAPinTableFile(QLDeviceTarget
return empty_path;
}
else {
std::cout << "[zyxw]" << "using pin table file: " << pin_table_file_path.string() << std::endl;
// std::cout << "[zyxw]" << "using pin table file: " << pin_table_file_path.string() << std::endl;
}

return pin_table_file_path;
Expand Down Expand Up @@ -3070,7 +3078,7 @@ std::filesystem::path QLDeviceManager::deviceOpenFPGAIOMapFile(QLDeviceTarget de
return empty_path;
}
else {
std::cout << "[zyxw]" << "using io map file: " << io_map_file_path.string() << std::endl;
// std::cout << "[zyxw]" << "using io map file: " << io_map_file_path.string() << std::endl;
}

return io_map_file_path;
Expand Down

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