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| cd /d E:\OpenOCD-0.12.0\bin | ||
| pyocd.exe flash --target=unknow --erase=auto --frequency=5000 D:\RT-ThreadStudio\workspace\pico-template\Debug\rtthread.bin |
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| # Adapter section | ||
| adapter driver picoprobe | ||
| adapter speed 5000 |
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| source [find target/swj-dp.tcl] | ||
| source [find mem_helper.tcl] | ||
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| set _CHIPNAME rp2040 | ||
| set _CPUTAPID 0x01002927 | ||
| set _ENDIAN little | ||
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| swj_newdap $_CHIPNAME.core0 cpu -dp-id $_CPUTAPID -instance-id 0 | ||
| swj_newdap $_CHIPNAME.core1 cpu -dp-id $_CPUTAPID -instance-id 1 | ||
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| # NOTE target smp makes both targets act a single virtual target on one port for gdb | ||
| # (without it you should be able to debug separately on two ports) | ||
| # NOTE: "-rtos hwthread" creates a thread per core in smp mode (otherwise it is a single thread for the virtual target) | ||
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| # Give OpenOCD SRAM1 (64k) to use for e.g. flash programming bounce buffers (should avoid algo stack etc) | ||
| # Don't require save/restore, because this isn't something we'd do whilst a user app is running | ||
| set _WORKSIZE 0x10000 | ||
| set _WORKBASE 0x20010000 | ||
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| #core 0 | ||
| set _TARGETNAME_0 $_CHIPNAME.core0 | ||
| dap create $_TARGETNAME_0.dap -chain-position $_CHIPNAME.core0.cpu | ||
| target create $_TARGETNAME_0 cortex_m -endian $_ENDIAN -coreid 0 -dap $_TARGETNAME_0.dap -rtos hwthread | ||
| $_TARGETNAME_0 configure -work-area-phys $_WORKBASE -work-area-size $_WORKSIZE -work-area-backup 0 | ||
| cortex_m reset_config sysresetreq | ||
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| #core 1 | ||
| set _TARGETNAME_1 $_CHIPNAME.core1 | ||
| dap create $_TARGETNAME_1.dap -chain-position $_CHIPNAME.core1.cpu | ||
| target create $_TARGETNAME_1 cortex_m -endian $_ENDIAN -coreid 1 -dap $_TARGETNAME_1.dap -rtos hwthread | ||
| $_TARGETNAME_1 configure -work-area-phys $_WORKBASE -work-area-size $_WORKSIZE -work-area-backup 0 | ||
| cortex_m reset_config sysresetreq | ||
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| target smp $_TARGETNAME_0 $_TARGETNAME_1 | ||
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| set _FLASHNAME $_CHIPNAME.flash | ||
| set _FLASHSIZE 0x200000 | ||
| set _FLASHBASE 0x10000000 | ||
| # name driver base, size in bytes, chip_width, bus_width, target used to access | ||
| flash bank $_FLASHNAME rp2040_flash $_FLASHBASE $_FLASHSIZE 1 32 $_TARGETNAME_0 | ||
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| # Openocd associates a flash bank with a target (in our case a core) and | ||
| # running `openocd -c "program foo.elf"` just grabs the last selected core | ||
| # from the TCL context. Select `core0` by default so that flash probe | ||
| # succeeds. Note gdb understands there are 2 cores -- this is only for TCL. | ||
| targets rp2040.core0 | ||
| targets rp2040.core1 | ||
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| # srst is not fitted so use SYSRESETREQ to perform a soft reset | ||
| reset_config srst_nogate | ||
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| gdb_flash_program enable | ||
| gdb_memory_map enable | ||
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| <?xml version="1.0"?> | ||
| <ArrayOfUniversalUsbDriver xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xmlns:xsd="http://www.w3.org/2001/XMLSchema"> | ||
| <UniversalUsbDriver> | ||
| <UniversalDriverName>FTDI CDM</UniversalDriverName> | ||
| <PrimaryInfFile>ftdibus.inf</PrimaryInfFile> | ||
| <UniqueDriverId>com.sysprogs.ftdi</UniqueDriverId> | ||
| </UniversalUsbDriver> | ||
| </ArrayOfUniversalUsbDriver> |
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