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Merge pull request #15 from Rbb666/5.1.0
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修复创建芯片工程时排除不必要文件的问题
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@eclipsesw
eclipsesw authored Jun 4, 2024
2 parents 9b4ee12 + 2276309 commit dec6d10
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Showing 196 changed files with 35,277 additions and 6 deletions.
62 changes: 62 additions & 0 deletions bsp/stm32/libraries/HAL_Drivers/Kconfig
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if BSP_USING_USBD
config BSP_USBD_TYPE_FS
bool
# "USB Full Speed (FS) Core"
config BSP_USBD_TYPE_HS
bool
# "USB High Speed (HS) Core"

config BSP_USBD_SPEED_HS
bool
# "USB High Speed (HS) Mode"
config BSP_USBD_SPEED_HSINFS
bool
# "USB High Speed (HS) Core in FS mode"

config BSP_USBD_PHY_EMBEDDED
bool
# "Using Embedded phy interface"
config BSP_USBD_PHY_UTMI
bool
# "UTMI: USB 2.0 Transceiver Macrocell Interace"
config BSP_USBD_PHY_ULPI
bool
# "ULPI: UTMI+ Low Pin Interface"
endif

config BSP_USING_CRC
bool "Enable CRC (CRC-32 0x04C11DB7 Polynomial)"
select RT_USING_HWCRYPTO
select RT_HWCRYPTO_USING_CRC
# "Crypto device frame dose not support above 8-bits granularity"
# "Reserve progress, running well, about 32-bits granularity, such as stm32f1, stm32f4"
depends on (SOC_SERIES_STM32L4 || SOC_SERIES_STM32F0 || SOC_SERIES_STM32F7 || SOC_SERIES_STM32H7 || SOC_SERIES_STM32MP1)
default n

config BSP_USING_RNG
bool "Enable RNG (Random Number Generator)"
select RT_USING_HWCRYPTO
select RT_HWCRYPTO_USING_RNG
depends on (SOC_SERIES_STM32L4 || SOC_SERIES_STM32F4 || SOC_SERIES_STM32F7 || \
SOC_SERIES_STM32H7 || SOC_SERIES_STM32MP1)
default n

config BSP_USING_HASH
bool "Enable HASH (Hash House Harriers)"
select RT_USING_HWCRYPTO
select RT_HWCRYPTO_USING_HASH
depends on (SOC_SERIES_STM32MP1)
default n

config BSP_USING_CRYP
bool "Enable CRYP (Encrypt And Decrypt Data)"
select RT_USING_HWCRYPTO
select RT_HWCRYPTO_USING_CRYP
depends on (SOC_SERIES_STM32MP1)
default n

config BSP_USING_UDID
bool "Enable UDID (Unique Device Identifier)"
select RT_USING_HWCRYPTO
default n

46 changes: 46 additions & 0 deletions bsp/stm32/libraries/HAL_Drivers/config/f0/adc_config.h
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/*
* Copyright (c) 2006-2023, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
* 2018-12-24 zylx first version
*/

#ifndef __ADC_CONFIG_H__
#define __ADC_CONFIG_H__

#include <rtthread.h>

#ifdef __cplusplus
extern "C" {
#endif

#ifdef BSP_USING_ADC1
#ifndef ADC1_CONFIG
#define ADC1_CONFIG \
{ \
.Instance = ADC1, \
.Init.ClockPrescaler = ADC_CLOCK_ASYNC_DIV1, \
.Init.Resolution = ADC_RESOLUTION_12B, \
.Init.DataAlign = ADC_DATAALIGN_RIGHT, \
.Init.ScanConvMode = ADC_SCAN_DIRECTION_FORWARD, \
.Init.EOCSelection = ADC_EOC_SINGLE_CONV, \
.Init.LowPowerAutoWait = DISABLE, \
.Init.LowPowerAutoPowerOff = DISABLE, \
.Init.ContinuousConvMode = DISABLE, \
.Init.DiscontinuousConvMode = ENABLE, \
.Init.ExternalTrigConv = ADC_SOFTWARE_START, \
.Init.ExternalTrigConvEdge = ADC_EXTERNALTRIGCONVEDGE_NONE, \
.Init.DMAContinuousRequests = ENABLE, \
.Init.Overrun = ADC_OVR_DATA_OVERWRITTEN, \
}
#endif /* ADC1_CONFIG */
#endif /* BSP_USING_ADC1 */

#ifdef __cplusplus
}
#endif

#endif /* __ADC_CONFIG_H__ */
57 changes: 57 additions & 0 deletions bsp/stm32/libraries/HAL_Drivers/config/f0/dma_config.h
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/*
* Copyright (c) 2006-2023, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
* 2018-01-05 zylx first version
* 2019-01-08 SummerGift clean up the code
*/

#ifndef __DMA_CONFIG_H__
#define __DMA_CONFIG_H__

#include <rtthread.h>

#ifdef __cplusplus
extern "C" {
#endif

/* DMA1 channel1 */

/* DMA1 channel2-3 DMA2 channel1-2 */
#if defined(BSP_UART1_RX_USING_DMA) && !defined(UART1_RX_DMA_INSTANCE)
#define UART1_DMA_RX_IRQHandler DMA1_Ch2_3_DMA2_Ch1_2_IRQHandler
#define UART1_RX_DMA_RCC RCC_AHBENR_DMA1EN
#define UART1_RX_DMA_INSTANCE DMA1_Channel3
#define UART1_RX_DMA_IRQ DMA1_Ch2_3_DMA2_Ch1_2_IRQn
#elif defined(BSP_SPI1_RX_USING_DMA) && !defined(SPI1_RX_DMA_INSTANCE)
#define SPI1_DMA_RX_TX_IRQHandler DMA1_Ch2_3_DMA2_Ch1_2_IRQHandler
#define SPI1_RX_DMA_RCC RCC_AHBENR_DMA1EN
#define SPI1_RX_DMA_INSTANCE DMA1_Channel2
#define SPI1_RX_DMA_IRQ DMA1_Ch2_3_DMA2_Ch1_2_IRQn
#endif

#if defined(BSP_SPI1_TX_USING_DMA) && !defined(SPI1_TX_DMA_INSTANCE)
#define SPI1_DMA_RX_TX_IRQHandler DMA1_Ch2_3_DMA2_Ch1_2_IRQHandler
#define SPI1_TX_DMA_RCC RCC_AHBENR_DMA1EN
#define SPI1_TX_DMA_INSTANCE DMA1_Channel3
#define SPI1_TX_DMA_IRQ DMA1_Ch2_3_DMA2_Ch1_2_IRQn
#endif
/* DMA1 channel2-3 DMA2 channel1-2 */

/* DMA1 channel4-7 DMA2 channel3-5 */
#if defined(BSP_UART2_RX_USING_DMA) && !defined(UART2_RX_DMA_INSTANCE)
#define UART2_DMA_RX_IRQHandler DMA1_Ch4_7_DMA2_Ch3_5_IRQHandler
#define UART2_RX_DMA_RCC RCC_AHBENR_DMA1EN
#define UART2_RX_DMA_INSTANCE DMA1_Channel5
#define UART2_RX_DMA_IRQ DMA1_Ch4_7_DMA2_Ch3_5_IRQn
#endif
/* DMA1 channel4-7 DMA2 channel3-5 */

#ifdef __cplusplus
}
#endif

#endif /* __DMA_CONFIG_H__ */
196 changes: 196 additions & 0 deletions bsp/stm32/libraries/HAL_Drivers/config/f0/pwm_config.h
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/*
* Copyright (c) 2006-2023, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
* 2018-12-24 zylx first version
* 2023-04-08 Wangyuqiang complete PWM defination
*/

#ifndef __PWM_CONFIG_H__
#define __PWM_CONFIG_H__

#include <rtthread.h>

#ifdef __cplusplus
extern "C" {
#endif

#ifdef BSP_USING_PWM1
#define PWM1_CONFIG \
{ \
.tim_handle.Instance = TIM1, \
.name = "pwm1", \
.channel = RT_NULL \
}
#endif /* BSP_USING_PWM1 */

#ifdef BSP_USING_PWM2
#define PWM2_CONFIG \
{ \
.tim_handle.Instance = TIM2, \
.name = "pwm2", \
.channel = RT_NULL \
}
#endif /* BSP_USING_PWM2 */

#ifdef BSP_USING_PWM3
#define PWM3_CONFIG \
{ \
.tim_handle.Instance = TIM3, \
.name = "pwm3", \
.channel = RT_NULL \
}
#endif /* BSP_USING_PWM3 */

#ifdef BSP_USING_PWM4
#define PWM4_CONFIG \
{ \
.tim_handle.Instance = TIM4, \
.name = "pwm4", \
.channel = RT_NULL \
}
#endif /* BSP_USING_PWM4 */

#ifdef BSP_USING_PWM5
#define PWM5_CONFIG \
{ \
.tim_handle.Instance = TIM5, \
.name = "pwm5", \
.channel = RT_NULL \
}
#endif /* BSP_USING_PWM5 */

#ifdef BSP_USING_PWM6
#define PWM6_CONFIG \
{ \
.tim_handle.Instance = TIM6, \
.name = "pwm6", \
.channel = RT_NULL \
}
#endif /* BSP_USING_PWM6 */

#ifdef BSP_USING_PWM7
#define PWM7_CONFIG \
{ \
.tim_handle.Instance = TIM7, \
.name = "pwm7", \
.channel = RT_NULL \
}
#endif /* BSP_USING_PWM7 */

#ifdef BSP_USING_PWM8
#define PWM8_CONFIG \
{ \
.tim_handle.Instance = TIM8, \
.name = "pwm8", \
.channel = RT_NULL \
}
#endif /* BSP_USING_PWM8 */

#ifdef BSP_USING_PWM9
#define PWM9_CONFIG \
{ \
.tim_handle.Instance = TIM9, \
.name = "pwm9", \
.channel = RT_NULL \
}
#endif /* BSP_USING_PWM9 */

#ifdef BSP_USING_PWM10
#define PWM10_CONFIG \
{ \
.tim_handle.Instance = TIM10, \
.name = "pwm10", \
.channel = RT_NULL \
}
#endif /* BSP_USING_PWM10 */

#ifdef BSP_USING_PWM11
#define PWM11_CONFIG \
{ \
.tim_handle.Instance = TIM11, \
.name = "pwm11", \
.channel = RT_NULL \
}
#endif /* BSP_USING_PWM11 */

#ifdef BSP_USING_PWM12
#define PWM12_CONFIG \
{ \
.tim_handle.Instance = TIM12, \
.name = "pwm12", \
.channel = RT_NULL \
}
#endif /* BSP_USING_PWM12 */

#ifdef BSP_USING_PWM13
#define PWM13_CONFIG \
{ \
.tim_handle.Instance = TIM13, \
.name = "pwm13", \
.channel = RT_NULL \
}
#endif /* BSP_USING_PWM13 */

#ifdef BSP_USING_PWM14
#define PWM14_CONFIG \
{ \
.tim_handle.Instance = TIM14, \
.name = "pwm14", \
.channel = RT_NULL \
}
#endif /* BSP_USING_PWM14 */

#ifdef BSP_USING_PWM15
#define PWM15_CONFIG \
{ \
.tim_handle.Instance = TIM15, \
.name = "pwm15", \
.channel = RT_NULL \
}
#endif /* BSP_USING_PWM15 */

#ifdef BSP_USING_PWM16
#define PWM16_CONFIG \
{ \
.tim_handle.Instance = TIM16, \
.name = "pwm16", \
.channel = RT_NULL \
}
#endif /* BSP_USING_PWM16 */

#ifdef BSP_USING_PWM17
#define PWM17_CONFIG \
{ \
.tim_handle.Instance = TIM17, \
.name = "pwm17", \
.channel = RT_NULL \
}
#endif /* BSP_USING_PWM17 */

#ifdef BSP_USING_PWM18
#define PWM18_CONFIG \
{ \
.tim_handle.Instance = TIM18, \
.name = "pwm18", \
.channel = RT_NULL \
}
#endif /* BSP_USING_PWM18 */

#ifdef BSP_USING_PWM19
#define PWM19_CONFIG \
{ \
.tim_handle.Instance = TIM19, \
.name = "pwm19", \
.channel = RT_NULL \
}
#endif /* BSP_USING_PWM19 */

#ifdef __cplusplus
}
#endif

#endif /* __PWM_CONFIG_H__ */
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