MIOB - Mobile Input Output Box

MIOB, the Mobile IO Box is a flexible unit for interconnecting laboratory equipment and measurements.

Built around a Xilinx Ultrascale+ VC106 FPGA evaluation board, it provides both computation power and IO flexibility for various interfacing tasks in a laboratory.

This repository contains the construction drawings, bill of materials, software and general documentation for building your own MIOB.

Documentation

• Xilinx HWserver
• Touchpanel Display
  • Kiosk Mode
• VILLAScontroller

Control FPGA Power from Raspberry:

#Set pin as output
raspi-gpio set 24 op

#Turn off FPGA Power
raspi-gpio set 24 dh

#Turn on FPGA Power
raspi-gpio set 24 dl

Access Zynq Boot Shell from Raspberry

sudo picocom --baud 115200 --flow n /dev/ttyUSB0

Xilinx Vivado Set-up

1. Include all necessary design sources, constraints and simulation sources

   • e.g. for zcu106_aurora_dino:
     • aurora_reset
     • axi_read_cache
     • config_timer
     • dinoif_dac
     • dinoif_fast_nologic
     • prepend_seqnum
     • registerif
     • dino-rev-b

2. If available, execute Tcl file

    source <file.tcl>

3. Create HDL Wrapper

   • right-click on block design and select "Create HDL Wrapper"

4. Set as Top

   • right-click on wrapped block design and select "Set as Top"

Photos

Authors

• Niklas Eiling (@n-eiling), Institute for Automation of Complex Power Systems, RWTH Aachen University)
• Steffen Vogel (@stv0g, Institute for Automation of Complex Power Systems, RWTH Aachen University)

License

The contents of this repository are licensed under the weakly-reciprocal version of the CERN Open Hardware Licence Version 2

Funding acknowledment

The development of MIOB has been supported by the following projects:

• ERIGrid 2.0 project of the H2020 Programme under Grant Agreement No. 870620
• Urban Energy Lab 4.0 sub-project InFIS.