NOTE: This is only SIMPLE model (made by Robert) to illustrate the concept and the process
All ratified (as of 2023/11/30) RISC-V specifications (newest on top):
2023/11/30, RISC-V Cycle and Instret Privilege Mode Filtering (Smcntrpmf), v1.0, riscv-smcntrpmf-v1.0.pdf
2022/05/05, Efficient Trace for RISC-V, v2.0, riscv-etrace-v2.0.pdf
2021/12/03, The RISC-V Instruction Set Manual Volume II: Privileged Architecture, 20211203, riscv-privileged-20211203.pdf
2019/12/13, The RISC-V Instruction Set Manual, Volume I: Unprivileged ISA, 20191213, riscv-spec-20191213.pdf
2019/03/22, RISC-V External Debug Support, v0.13.2, riscv-debug-v0.13.2.pdf
2020/03/20, RISC-V Processor Trace, v1.0, riscv-etrace-v1.0.pdf