8344526: RISC-V: implement -XX:+VerifyActivationFrameSize

Co-authored-by: Fei Yang <[email protected]> Reviewed-by: mli, fyang
SAP · Nov 21, 2024 · 4fbf272 · 4fbf272
1 parent 1343911
commit 4fbf272
Showing 1 changed file with 8 additions and 1 deletion.
diff --git a/src/hotspot/cpu/riscv/interp_masm_riscv.cpp b/src/hotspot/cpu/riscv/interp_masm_riscv.cpp
@@ -441,7 +441,14 @@ void InterpreterMacroAssembler::dispatch_base(TosState state,
                                               Register Rs) {
   // Pay attention to the argument Rs, which is acquiesce in t0.
   if (VerifyActivationFrameSize) {
-    Unimplemented();
+    Label L;
+    sub(t1, fp, esp);
+    int min_frame_size =
+      (frame::link_offset - frame::interpreter_frame_initial_sp_offset + frame::metadata_words) * wordSize;
+    sub(t1, t1, min_frame_size);
+    bgez(t1, L);
+    stop("broken stack frame");
+    bind(L);
   }
   if (verifyoop && state == atos) {
     verify_oop(x10);