staff update from: rel-0.0-29-g3637f78-dirty

ScottSWu · Sep 6, 2015 · 03cfa0d · 03cfa0d
1 parent 7c78dfc
commit 03cfa0d
Showing 1 changed file with 1 addition and 0 deletions.
diff --git a/sim/tut3_pymtl/regincr/RegIncrNstage.py b/sim/tut3_pymtl/regincr/RegIncrNstage.py
@@ -29,6 +29,7 @@ def __init__( s, nstages=2 ):
     # This model is incomplete. As part of the tutorial you will insert
     # code here to connect the stages together.
     # ''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''\/
+
     # Connect last reg_incr in chain to output port
 
     s.connect( s.reg_incrs[-1].out, s.out )