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I O Ports
There are two additional registers in the redstone processor, the ports and adc registers. The mode of the four ports of the processor are controlled by these special registers.
If the upper nibble of the ports register is zero, the bottom nibble sets whether the ports are in input or output mode. Setting a bit to 1 in lower nibble will set the mode of the corresponding port to be an input port, or an output if set to 0.
To set a port into reset mode, set the corresponding bit to 1 in both the upper and lower nibble. When a port is in reset mode, and redstone signal received on that port will reset the processor. Reset ports can be useful for synchronizing multiple processors together.
The eight bit ports register is logically split in 2 nibbles, the top is used to set reset mode and is denoted by ` after the bit name. The bits pr, pl, pb, pf stand for Right Port, Left Port, Back Port and Front Port respectively.
| 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|
| pr’ | pl’ | pb’ | pf’ | pr | pl | pb | pf |
Only the lower nibble of the adc register is used. Setting a bit to one will put the corresponding port into ADC mode. A port in ADC mode can act as an ADC or DAC based on wither it is set as an input or output port in the ports register.
If the port is in ADC mode and is set as an input it will operate as an ADC, converting the redstone power level at that port into a number from 0 to 15 in the corresponding port register. If the port was set to an output it would operate as an DAC, converting the value in the lower nibble of that port's register into a redstone signal.
| 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|
| -- | -- | -- | -- | pr | pl | pb | pf |