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Merge tag 'mips-20211206' of https://github.com/philmd/qemu into staging
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MIPS fixes

- Do not emit SD instruction on 32-bit CPU (Jiaxun Yang)
- Correctly catch load_elf() errors on Boston board (Jiaxun Yang)
- Revert bogus CLI fix for ISA VGA devices (Alex Bennée)

# gpg: Signature made Mon 06 Dec 2021 03:03:24 AM PST
# gpg:                using RSA key FAABE75E12917221DCFD6BB2E3E32C2CDEADC0DE
# gpg: Good signature from "Philippe Mathieu-Daudé (F4BUG) <[email protected]>" [full]

* tag 'mips-20211206' of https://github.com/philmd/qemu:
  Revert "vga: don't abort when adding a duplicate isa-vga device"
  hw/mips/boston: Fix load_elf() error detection
  hw/mips/bootloader: Fix write_ulong()

Signed-off-by: Richard Henderson <[email protected]>
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rth7680 committed Dec 6, 2021
2 parents 99fc083 + ac5837e commit 2f8eb08
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Showing 3 changed files with 8 additions and 13 deletions.
10 changes: 0 additions & 10 deletions hw/display/vga-isa.c
Original file line number Diff line number Diff line change
Expand Up @@ -33,7 +33,6 @@
#include "hw/loader.h"
#include "hw/qdev-properties.h"
#include "qom/object.h"
#include "qapi/error.h"

#define TYPE_ISA_VGA "isa-vga"
OBJECT_DECLARE_SIMPLE_TYPE(ISAVGAState, ISA_VGA)
Expand Down Expand Up @@ -62,15 +61,6 @@ static void vga_isa_realizefn(DeviceState *dev, Error **errp)
MemoryRegion *vga_io_memory;
const MemoryRegionPortio *vga_ports, *vbe_ports;

/*
* make sure this device is not being added twice, if so
* exit without crashing qemu
*/
if (object_resolve_path_type("", TYPE_ISA_VGA, NULL)) {
error_setg(errp, "at most one %s device is permitted", TYPE_ISA_VGA);
return;
}

s->global_vmstate = true;
vga_common_init(s, OBJECT(dev));
s->legacy_address_space = isa_address_space(isadev);
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6 changes: 5 additions & 1 deletion hw/mips/bootloader.c
Original file line number Diff line number Diff line change
Expand Up @@ -182,7 +182,11 @@ void bl_gen_write_ulong(uint32_t **p, target_ulong addr, target_ulong val)
{
bl_gen_load_ulong(p, BL_REG_K0, val);
bl_gen_load_ulong(p, BL_REG_K1, addr);
bl_gen_sd(p, BL_REG_K0, BL_REG_K1, 0x0);
if (bootcpu_supports_isa(ISA_MIPS3)) {
bl_gen_sd(p, BL_REG_K0, BL_REG_K1, 0x0);
} else {
bl_gen_sw(p, BL_REG_K0, BL_REG_K1, 0x0);
}
}

void bl_gen_write_u32(uint32_t **p, target_ulong addr, uint32_t val)
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5 changes: 3 additions & 2 deletions hw/mips/boston.c
Original file line number Diff line number Diff line change
Expand Up @@ -777,14 +777,15 @@ static void boston_mach_init(MachineState *machine)
exit(1);
}
} else if (machine->kernel_filename) {
uint64_t kernel_entry, kernel_high, kernel_size;
uint64_t kernel_entry, kernel_high;
ssize_t kernel_size;

kernel_size = load_elf(machine->kernel_filename, NULL,
cpu_mips_kseg0_to_phys, NULL,
&kernel_entry, NULL, &kernel_high,
NULL, 0, EM_MIPS, 1, 0);

if (kernel_size) {
if (kernel_size > 0) {
int dt_size;
g_autofree const void *dtb_file_data, *dtb_load_data;
hwaddr dtb_paddr = QEMU_ALIGN_UP(kernel_high, 64 * KiB);
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