This repository contains the methodolgy of Reverse Engineering the Rocket Chip. For more information on Reverse engineering of Rocket Chip, please consult our MERL-UIT technical team at
https://www.merledupk.org/ .
- Rocket Chip Overview
- Rocket-Chip Micro-Architecture
- Rocket-Chip Code Complexity
- Rocket Core Scala Files
- Reverse Engineering of Rocket Chip
- Micro Architecture Specification (MAS) Document Rocket Chip
- Motivation And Scope of (MAS) Document Rocket Chip
- Methodology of MAS Document
- Aghaz(آغاز) SoC The Beginning
- Specifications of Aghaz(آغاز) SoC
- How did we do it?
- Blocks of Aghaz(آغاز) Core
- Blocks of Aghaz(آغاز) Tile
- References
- Rocket chip is a chip generator that is used for generating a multi-core system with Rocket scalar cores, Z-Scale control processors, and a coherent memory system
- Rocket chip generator is coded in Scala that compiles using Chisel compiler to generate a SoC in descriptive RTL
- The configuration of SOC are specified through Chisel parameters
Detailed diagram of Rocket Chip is shown below
- The complexity of code of Rocket-chip is high, because it contains 328 source files of scala in 23 directories, and 33,427 total lines of scala code.
- Another issue faced was that Rocket-chip contains several meaningless variable names and non-elaborated comments which further leads to uncertainty in methods, increases the complexity to decode it and makes it tough to understand the hardware inputs/outputs.
- Lack of understandability and comprehension concludes to difficulty in modifying Rocket-core or its component as for customized requirements.
This table will gives the complete detail of total number of scala files and their length of code in Rocket Core.
| Rocket chip is a chip generator that allows you to set up different configurations and these configurations are specified through Chisel parameters. Reverse Engineering of Rocket Chip journey starts from (Micro Electronic Research Lab) MERL which is working in the field of RISC V Processor development and Research. The purpose of Reverse Engineering of Rocket Chip is to get aware of the modules used in rocket chip and make Micro Architecture Specification (MAS) documentation as Rocket chip doesn’t have any MAS documentation available yet. Another main purpose is to increase Rocket chip code reusability so every programmer can easily understand its code and manipulate it according to its desired configuration by changing Chisel Parameters. We decode basic modules of rocket chip by taking an understanding of its code line by line with the help of Scala and Chisel expertise. We convert these modules code understanding into flow charts and start making Micro Architecture Specification (MAS) documentation. We make flow charts for different modules of Rocket Chip. After completion of flow charts, we make block diagrams of Rocket Chip modules according to its configuration pin in and out. |
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- This MAS Document provides in depth understanding of Modules of Rocket-Chip SoC.
- Explanation of Modules is achieved by means of Block Diagrams, Class Diagrams, Flowcharts, and explanation of all the keywords found in the code.
- This MAS Document is essential for those who have basic knowledge of Scala, CHISEL and SoC hardware.In explanation only the name of keywords is used but their definition is mentioned in the Appendix – Scala & CHISEL keywords.
- To explain the workflow to a beginner seeking to understand and use Rocket-core for generating a customized System on chip (SoC) or modifying a module based on their general requirements.
- Provide a hardware view by mapping it to blocks of code which highlights the wiring and back tracing of input/output by means of variables. The hardware mapping creates a linkage between software and hardware in entire workflow.
- The Microarchitecture Specification (MAS) Documentation designed by MERL-UIT aims to achieve an elaboration of Rocket-chip at core level and its components in a detailed manner, it furthermore features additional representations such as block diagrams and flowcharts.
- We decode basic modules of rocket chip by taking understanding of its code line by line with the help of Scala and Chisel expertise.
- We convert these modules code understanding into flow charts and start making Micro Architecture Specification (MAS) documentation.
- We make flow charts for different modules of Rocket Chip. After completion of flow charts, we make block diagrams of Rocket Chip modules according to its configuration pin in and out
| Specs of Aghaz(آغاز) |
|---|
| RV-32 (32-bit) |
| I, M & C extensions |
| 64-KB Instruction and Data Cache |
| CLINT |
| PLIC |
| Privileged( Machine) |
| With the help of MAS Document, which contains in-depth knowledge of all the Modules of Rocket-Chip generated by Rocket-Chip SoC Generator |
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Rocket-Tile of Aghaz SoC contains
- Aghaz Core
- Branch Target Buffer
- L1 Icache
- DCache of 64-KB
