How to do logic synthesis only optimize on selected modules and don't touch other modules ?

[chestercc1997]

If I have 3 modules, I want to perform optimization using ABC only on module 1, while keeping module 2 and module 3 unoptimized. After optimization, I would like to generate AIG/Blif. Are there any scripts that support this functionality?

[wjrforcyber]

If you are using command abc, first check the manual here, or just type help abc in yosys.

If I have 3 modules, I want to perform optimization using ABC only on module 1, while keeping module 2 and module 3 unoptimized.

This is a temporary check process, you could modify the code to achieve the result.
Read file https://github.com/YosysHQ/yosys/blob/main/passes/techmap/abc.cc , line:

yosys/passes/techmap/abc.cc

Line 2045 in 8acc77c

for (auto mod : design->selected_modules())

is iterating modules, select the module you would like to optimise or just set breakpoint here, with option:

yosys/passes/techmap/abc.cc

Lines 1619 to 1622 in 8acc77c

	log(" -nocleanup\n");
	log(" when this option is used, the temporary files created by this pass\n");
	log(" are not removed. this is useful for debugging.\n");
	log("\n");

and option:

yosys/passes/techmap/abc.cc

Lines 1623 to 1626 in 8acc77c

	log(" -showtmp\n");
	log(" print the temp dir name in log. usually this is suppressed so that the\n");
	log(" command output is identical across runs.\n");
	log("\n");

The result blif will be saved at:

yosys/passes/techmap/abc.cc

Line 865 in 8acc77c

abc_script += stringf("; write_blif %s/output.blif", tempdir_name.c_str());

If you do not enable -nocleanup, the temporary file will be removed at the end:

yosys/passes/techmap/abc.cc

Lines 1445 to 1449 in 8acc77c

	if (cleanup)
	{
	log("Removing temp directory.\n");
	remove_directory(tempdir_name);
	}