Directly generate enums

examples/build.zig

@@ -1,7 +1,7 @@
 const std = @import("std");
 
 const example_dep_names: []const []const u8 = &.{
-    //"espressif/esp",
+    "espressif/esp",
     "gigadevice/gd32",
     "microchip/atsam",
     "microchip/avr",

examples/build.zig.zon

@@ -3,7 +3,7 @@
     .version = "0.0.0",
     .dependencies = .{
         // examples
-        // .@"espressif/esp" = .{ .path = "espressif/esp" },
+         .@"espressif/esp" = .{ .path = "espressif/esp" },
         .@"gigadevice/gd32" = .{ .path = "gigadevice/gd32" },
         .@"microchip/atsam" = .{ .path = "microchip/atsam" },
         .@"microchip/avr" = .{ .path = "microchip/avr" },

examples/nxp/lpc/src/blinky.zig

@@ -21,10 +21,10 @@ const all_mask = led_mask[0] | led_mask[1] | led_mask[2] | led_mask[3];
 
 pub fn main() !void {
     conn.PINSEL3.modify(.{
-        .P1_18 = .{ .value = .GPIO_P1 },
-        .P1_20 = .{ .value = .GPIO_P1 },
-        .P1_21 = .{ .value = .GPIO_P1 },
-        .P1_23 = .{ .value = .GPIO_P1 },
+        .P1_18 = .GPIO_P1,
+        .P1_20 = .GPIO_P1,
+        .P1_21 = .GPIO_P1,
+        .P1_23 = .GPIO_P1,
     });
 
     const p1 = &gpio[1];

port/raspberrypi/rp2xxx/src/hal/clocks/common.zig

@@ -24,19 +24,19 @@ pub const xosc = struct {
     }
     pub fn init() void {
         if (xosc_freq <= 15_000_000 and xosc_freq >= 1_000_000) {
-            XOSC.CTRL.modify(.{ .FREQ_RANGE = .{ .value = .@"1_15MHZ" } });
+            XOSC.CTRL.modify(.{ .FREQ_RANGE = .@"1_15MHZ" });
         } else if (xosc_freq <= 30_000_000 and xosc_freq >= 10_000_000) {
-            XOSC.CTRL.modify(.{ .FREQ_RANGE = .{ .value = .@"10_30MHZ" } });
+            XOSC.CTRL.modify(.{ .FREQ_RANGE = .@"10_30MHZ" });
         } else if (xosc_freq <= 60_000_000 and xosc_freq >= 25_000_000) {
-            XOSC.CTRL.modify(.{ .FREQ_RANGE = .{ .value = .@"25_60MHZ" } });
+            XOSC.CTRL.modify(.{ .FREQ_RANGE = .@"25_60MHZ" });
         } else if (xosc_freq <= 100_000_000 and xosc_freq >= 40_000_000) {
-            XOSC.CTRL.modify(.{ .FREQ_RANGE = .{ .value = .@"40_100MHZ" } });
+            XOSC.CTRL.modify(.{ .FREQ_RANGE = .@"40_100MHZ" });
         } else {
             unreachable;
         }
 
         XOSC.STARTUP.modify(.{ .DELAY = startup_delay_value });
-        XOSC.CTRL.modify(.{ .ENABLE = .{ .value = .ENABLE } });
+        XOSC.CTRL.modify(.{ .ENABLE = .ENABLE });
 
         // wait for xosc startup to complete:
         while (XOSC.STATUS.read().STABLE == 0) {}

port/raspberrypi/rp2xxx/src/hal/dma.zig

@@ -106,13 +106,11 @@ pub const Channel = enum(u4) {
         regs.trans_count = count;
         regs.ctrl_trig.modify(.{
             .EN = @intFromBool(config.enable),
-            .DATA_SIZE = .{
-                .value = switch (config.transfer_size_bytes) {
-                    1 => @TypeOf(regs.ctrl_trig.read().DATA_SIZE.value).SIZE_BYTE,
-                    2 => .SIZE_HALFWORD,
-                    4 => .SIZE_WORD,
-                    else => unreachable,
-                },
+            .DATA_SIZE = switch (config.transfer_size_bytes) {
+                1 => @TypeOf(regs.ctrl_trig.read().DATA_SIZE.value).SIZE_BYTE,
+                2 => .SIZE_HALFWORD,
+                4 => .SIZE_WORD,
+                else => unreachable,
             },
             .INCR_READ = @intFromBool(config.read_increment),
             .INCR_WRITE = @intFromBool(config.write_increment),

port/raspberrypi/rp2xxx/src/hal/gpio.zig

@@ -264,58 +264,28 @@ pub const Pin = enum(u6) {
         .RP2040 => extern struct {
             status: @TypeOf(IO_BANK0.GPIO0_STATUS),
             ctrl: microzig.mmio.Mmio(packed struct(u32) {
-                FUNCSEL: packed union {
-                    raw: u5,
-                    value: Function,
-                },
+                FUNCSEL: Function,
                 reserved8: u3,
-                OUTOVER: packed union {
-                    raw: u2,
-                    value: Override,
-                },
+                OUTOVER: Override,
                 reserved12: u2,
-                OEOVER: packed union {
-                    raw: u2,
-                    value: Override,
-                },
+                OEOVER: Override,
                 reserved16: u2,
-                INOVER: packed union {
-                    raw: u2,
-                    value: Override,
-                },
+                INOVER: Override,
                 reserved28: u10,
-                IRQOVER: packed union {
-                    raw: u2,
-                    value: Override,
-                },
+                IRQOVER: Override,
                 padding: u2,
             }),
         },
         .RP2350 => extern struct {
             status: @TypeOf(IO_BANK0.GPIO0_STATUS),
             ctrl: microzig.mmio.Mmio(packed struct(u32) {
-                FUNCSEL: packed union {
-                    raw: u5,
-                    value: Function,
-                },
+                FUNCSEL: Function,
                 reserved12: u7,
-                OUTOVER: packed union {
-                    raw: u2,
-                    value: Override,
-                },
-                OEOVER: packed union {
-                    raw: u2,
-                    value: Override,
-                },
-                INOVER: packed union {
-                    raw: u2,
-                    value: Override,
-                },
+                OUTOVER: Override,
+                OEOVER: Override,
+                INOVER: Override,
                 reserved28: u10,
-                IRQOVER: packed union {
-                    raw: u2,
-                    value: Override,
-                },
+                IRQOVER: Override,
                 padding: u2,
             }),
         },
@@ -471,11 +441,11 @@ pub const Pin = enum(u6) {
 
         const regs = gpio.get_regs();
         regs.ctrl.modify(.{
-            .FUNCSEL = .{ .value = function },
-            .OUTOVER = .{ .value = .normal },
-            .INOVER = .{ .value = .normal },
-            .IRQOVER = .{ .value = .normal },
-            .OEOVER = .{ .value = .normal },
+            .FUNCSEL = function,
+            .OUTOVER = .normal,
+            .INOVER = .normal,
+            .IRQOVER = .normal,
+            .OEOVER = .normal,
         });
 
         switch (cpu) {

port/raspberrypi/rp2xxx/src/hal/i2c.zig

@@ -217,18 +217,18 @@ pub const I2C = enum(u1) {
 
     inline fn disable(i2c: I2C) void {
         i2c.get_regs().IC_ENABLE.write(.{
-            .ENABLE = .{ .value = .DISABLED },
-            .ABORT = .{ .value = .DISABLE },
-            .TX_CMD_BLOCK = .{ .value = .NOT_BLOCKED },
+            .ENABLE = .DISABLED,
+            .ABORT = .DISABLE,
+            .TX_CMD_BLOCK = .NOT_BLOCKED,
             .padding = 0,
         });
     }
 
     inline fn enable(i2c: I2C) void {
         i2c.get_regs().IC_ENABLE.write(.{
-            .ENABLE = .{ .value = .ENABLED },
-            .ABORT = .{ .value = .DISABLE },
-            .TX_CMD_BLOCK = .{ .value = .NOT_BLOCKED },
+            .ENABLE = .ENABLED,
+            .ABORT = .DISABLE,
+            .TX_CMD_BLOCK = .NOT_BLOCKED,
             .padding = 0,
         });
     }
@@ -244,15 +244,15 @@ pub const I2C = enum(u1) {
         i2c.disable();
         const regs = i2c.get_regs();
         regs.IC_CON.write(.{
-            .MASTER_MODE = .{ .value = .ENABLED },
-            .SPEED = .{ .value = .FAST },
-            .IC_RESTART_EN = .{ .value = if (config.repeated_start) .ENABLED else .DISABLED },
-            .IC_SLAVE_DISABLE = .{ .value = .SLAVE_DISABLED },
-            .TX_EMPTY_CTRL = .{ .value = .ENABLED },
-            .IC_10BITADDR_SLAVE = .{ .raw = 0 },
-            .IC_10BITADDR_MASTER = .{ .raw = 0 },
-            .STOP_DET_IFADDRESSED = .{ .raw = 0 },
-            .RX_FIFO_FULL_HLD_CTRL = .{ .raw = 0 },
+            .MASTER_MODE = .ENABLED,
+            .SPEED = .FAST,
+            .IC_RESTART_EN = if (config.repeated_start) .ENABLED else .DISABLED,
+            .IC_SLAVE_DISABLE = .SLAVE_DISABLED,
+            .TX_EMPTY_CTRL = .ENABLED,
+            .IC_10BITADDR_SLAVE = @enumFromInt(0),
+            .IC_10BITADDR_MASTER = @enumFromInt(0),
+            .STOP_DET_IFADDRESSED = @enumFromInt(0),
+            .RX_FIFO_FULL_HLD_CTRL = @enumFromInt(0),
             .STOP_DET_IF_MASTER_ACTIVE = 0,
             .padding = 0,
         });
@@ -263,8 +263,8 @@ pub const I2C = enum(u1) {
 
         // DREQ signal control
         regs.IC_DMA_CR.write(.{
-            .RDMAE = .{ .value = .ENABLED },
-            .TDMAE = .{ .value = .ENABLED },
+            .RDMAE = .ENABLED,
+            .TDMAE = .ENABLED,
             .padding = 0,
         });
 
@@ -308,8 +308,8 @@ pub const I2C = enum(u1) {
         i2c.disable();
         i2c.get_regs().IC_TAR.write(.{
             .IC_TAR = @intFromEnum(addr),
-            .GC_OR_START = .{ .value = .GENERAL_CALL },
-            .SPECIAL = .{ .value = .DISABLED },
+            .GC_OR_START = .GENERAL_CALL,
+            .SPECIAL = .DISABLED,
             .padding = 0,
         });
         i2c.enable();
@@ -324,10 +324,10 @@ pub const I2C = enum(u1) {
             // IC_CLR_TX_ABRT register always reads as 0.
             _ = regs.IC_CLR_TX_ABRT.read();
 
-            if (abort_reason.ABRT_7B_ADDR_NOACK.value == .ACTIVE) {
+            if (abort_reason.ABRT_7B_ADDR_NOACK == .ACTIVE) {
                 // Address byte wasn't acknowledged by any targets on the bus
                 return TransactionError.DeviceNotPresent;
-            } else if (abort_reason.ABRT_TXDATA_NOACK.value == .ABRT_TXDATA_NOACK_GENERATED) {
+            } else if (abort_reason.ABRT_TXDATA_NOACK == .ABRT_TXDATA_NOACK_GENERATED) {
                 // Address byte was acknowledged, but a data byte wasn't
                 return TransactionError.NoAcknowledge;
             } else if (abort_reason.TX_FLUSH_CNT > 0) {
@@ -353,7 +353,7 @@ pub const I2C = enum(u1) {
         //     condition here? If so, additional code would be needed here
         //     to take care of the abort.
         // As far as I can tell from the datasheet, no, this is not possible.
-        while (regs.IC_RAW_INTR_STAT.read().STOP_DET.value == .INACTIVE) {
+        while (regs.IC_RAW_INTR_STAT.read().STOP_DET == .INACTIVE) {
             hw.tight_loop_contents();
             if (deadline.is_reached())
                 break;
@@ -400,12 +400,12 @@ pub const I2C = enum(u1) {
         var iter = write_vec.iterator();
         while (iter.next_element()) |element| {
             regs.IC_DATA_CMD.write(.{
-                .RESTART = .{ .raw = 0 },
-                .STOP = .{ .raw = @intFromBool(element.last) },
-                .CMD = .{ .value = .WRITE },
+                .RESTART = @enumFromInt(0),
+                .STOP = @enumFromInt(@intFromBool(element.last)),
+                .CMD = .WRITE,
                 .DAT = element.value,
 
-                .FIRST_DATA_BYTE = .{ .value = .INACTIVE },
+                .FIRST_DATA_BYTE = .INACTIVE,
                 .padding = 0,
             });
             // If an abort occurrs, the TX/RX FIFO is flushed, and subsequent writes to IC_DATA_CMD
@@ -427,7 +427,7 @@ pub const I2C = enum(u1) {
 
         // Waits until everything in the TX FIFO is either successfully transmitted, or flushed
         // due to an abort. This functions because of TX_EMPTY_CTRL being enabled in apply().
-        while (regs.IC_RAW_INTR_STAT.read().TX_EMPTY.value == .INACTIVE) {
+        while (regs.IC_RAW_INTR_STAT.read().TX_EMPTY == .INACTIVE) {
             if (deadline.is_reached()) {
                 timed_out = true;
                 break;
@@ -479,12 +479,12 @@ pub const I2C = enum(u1) {
         var iter = read_vec.iterator();
         while (iter.next_element_ptr()) |element| {
             regs.IC_DATA_CMD.write(.{
-                .RESTART = .{ .raw = 0 },
-                .STOP = .{ .raw = @intFromBool(element.last) },
-                .CMD = .{ .value = .READ },
+                .RESTART = @enumFromInt(0),
+                .STOP = @enumFromInt(@intFromBool(element.last)),
+                .CMD = .READ,
                 .DAT = 0,
 
-                .FIRST_DATA_BYTE = .{ .value = .INACTIVE },
+                .FIRST_DATA_BYTE = .INACTIVE,
                 .padding = 0,
             });
 
@@ -551,12 +551,12 @@ pub const I2C = enum(u1) {
         var write_iter = write_vec.iterator();
         send_loop: while (write_iter.next_element()) |element| {
             regs.IC_DATA_CMD.write(.{
-                .RESTART = .{ .raw = 0 },
-                .STOP = .{ .raw = 0 },
-                .CMD = .{ .value = .WRITE },
+                .RESTART = @enumFromInt(0),
+                .STOP = @enumFromInt(0),
+                .CMD = .WRITE,
                 .DAT = element.value,
 
-                .FIRST_DATA_BYTE = .{ .value = .INACTIVE },
+                .FIRST_DATA_BYTE = .INACTIVE,
                 .padding = 0,
             });
             // If an abort occurrs, the TX/RX FIFO is flushed, and subsequent writes to IC_DATA_CMD
@@ -583,12 +583,12 @@ pub const I2C = enum(u1) {
         var read_iter = read_vec.iterator();
         recv_loop: while (read_iter.next_element_ptr()) |element| {
             regs.IC_DATA_CMD.write(.{
-                .RESTART = .{ .raw = @intFromBool(element.first) },
-                .STOP = .{ .raw = @intFromBool(element.last) },
-                .CMD = .{ .value = .READ },
+                .RESTART = @enumFromInt(@intFromBool(element.first)),
+                .STOP = @enumFromInt(@intFromBool(element.last)),
+                .CMD = .READ,
                 .DAT = 0,
 
-                .FIRST_DATA_BYTE = .{ .value = .INACTIVE },
+                .FIRST_DATA_BYTE = .INACTIVE,
                 .padding = 0,
             });
 

port/raspberrypi/rp2xxx/src/hal/random.zig

@@ -28,9 +28,9 @@ pub const Ascon = struct {
 
     pub fn init() @This() {
         // Ensure that the system clocks run from the XOSC and/or PLLs
-        const ref_src = peripherals.CLOCKS.CLK_REF_CTRL.read().SRC.value;
-        const sys_clk_src = peripherals.CLOCKS.CLK_SYS_CTRL.read().SRC.value;
-        const aux_src = peripherals.CLOCKS.CLK_SYS_CTRL.read().AUXSRC.value;
+        const ref_src = peripherals.CLOCKS.CLK_REF_CTRL.read().SRC;
+        const sys_clk_src = peripherals.CLOCKS.CLK_SYS_CTRL.read().SRC;
+        const aux_src = peripherals.CLOCKS.CLK_SYS_CTRL.read().AUXSRC;
         assert((ref_src != .rosc_clksrc_ph and sys_clk_src == .clk_ref) or
             (sys_clk_src == .clksrc_clk_sys_aux and aux_src != .rosc_clksrc));
 
@@ -68,10 +68,10 @@ pub const Ascon = struct {
     /// for security systems because it can be compromised, but it may be useful
     /// in less critical applications.
     fn rosc(buffer: []u8) void {
-        const rosc_state = peripherals.ROSC.CTRL.read().ENABLE.value;
+        const rosc_state = peripherals.ROSC.CTRL.read().ENABLE;
         // Enable the ROSC so it generates random bits for us
-        peripherals.ROSC.CTRL.modify(.{ .ENABLE = .{ .value = .ENABLE } });
-        defer peripherals.ROSC.CTRL.modify(.{ .ENABLE = .{ .value = rosc_state } });
+        peripherals.ROSC.CTRL.modify(.{ .ENABLE = .ENABLE });
+        defer peripherals.ROSC.CTRL.modify(.{ .ENABLE = rosc_state });
 
         var i: usize = 0;
         while (i < buffer.len) : (i += 1) {