fix clock configuration in audio example (#45)

ZigEmbeddedGroup · May 15, 2024 · 938a407 · 938a407
1 parent 08eea13
commit 938a407
Showing 1 changed file with 8 additions and 0 deletions.
diff --git a/src/badge/demos/audio.zig b/src/badge/demos/audio.zig
@@ -2,6 +2,7 @@ const std = @import("std");
 const microzig = @import("microzig");
 const hal = microzig.hal;
 const gclk = hal.clocks.gclk;
+const mclk = hal.clocks.mclk;
 const timer = hal.timer;
 
 const spkr_en_pin = microzig.board.SPKR_EN;
@@ -16,11 +17,18 @@ pub fn main() !void {
     analog_out_pin.write(.low);
     spkr_en_pin.write(.high);
 
+    mclk.set_apb_mask(.{
+        .TC0 = .enabled,
+        .TC1 = .enabled,
+    });
+
     gclk.enable_generator(.GCLK1, .DFLL, .{
         .divsel = .DIV1,
         .div = 48,
     });
 
+    gclk.set_peripheral_clk_gen(.GCLK_TC0_TC1, .GCLK1);
+
     timer.init();
     while (true) {
         led_pin.toggle();