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a-ramses · Dec 15, 2024 · 92ddebb · 92ddebb
1 parent 347d472
commit 92ddebb
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Showing 2 changed files with 10 additions and 7 deletions.
diff --git a/src/chickens_everest.c b/src/chickens_everest.c
@@ -58,21 +58,22 @@ void init_t6030_everest(int rev)
              HID13_POST_OFF_CYCLES(4) | HID13_POST_ON_CYCLES(5) | HID13_PRE_CYCLES(1) |
                  HID13_GROUP0_FF0_DELAY(0) | HID13_GROUP0_FF1_DELAY(4) | HID13_GROUP0_FF2_DELAY(4) |
                  HID13_GROUP0_FF3_DELAY(4) | HID13_GROUP0_FF4_DELAY(4) | HID13_GROUP0_FF5_DELAY(4) |
-                 HID13_GROUP0_FF6_DELAY(4) | HID13_GROUP0_FF7_DELAY(4) | HID13_RESET_CYCLES(0))
+                 HID13_GROUP0_FF6_DELAY(4) | HID13_GROUP0_FF7_DELAY(4) | HID13_RESET_CYCLES(0));
 
-    msr(SYS_IMP_APL_HID26,
-        HID26_GROUP1_OFFSET(0x16 | (0x2 << 8) | (0x2 << 12) | (0x2 << 16) | (0x2 << 20) |
-                            (0x2 << 24) | (0x2 << 28) | (0x2uL << 32)) |
-            HID26_GROUP2_OFFSET(0x23 | (0x1 << 8) | (0x1 << 12) | (0x1 << 16) | (0x1 << 20) |
-                                (0x1 << 24)));
+        msr(SYS_IMP_APL_HID26,
+            HID26_GROUP1_OFFSET(0x16 | (0x2 << 8) | (0x2 << 12) | (0x2 << 16) | (0x2 << 20) |
+                                (0x2 << 24) | (0x2 << 28) | (0x2uL << 32)) |
+                HID26_GROUP2_OFFSET(0x23 | (0x1 << 8) | (0x1 << 12) | (0x1 << 16) | (0x1 << 20) |
+                                    (0x1 << 24)));
     reg_mask(SYS_IMP_APL_HID27,
              GENMASK(43, 40) | GENMASK(39, 36) | GENMASK(35, 32) | GENMASK(31, 28) |
                  GENMASK(27, 24) | GENMASK(23, 20) | GENMASK(19, 16) | GENMASK(15, 8) |
                  GENMASK(7, 4) | GENMASK(3, 0),
              BIT(40) | BIT(36) | BIT(32) | BIT(28) | BIT(24) | BIT(20) | BIT(16) | 0x2b00uL |
                  BIT(4) | BIT(0));
 
-    reg_set(SYS_IMP_APL_HID18, BIT(61) | HID18_GENTER_SPECULATION_DISABLE | HID18_GEXIT_EL_SPECULATION_DISABLE);
+    reg_set(SYS_IMP_APL_HID18,
+            BIT(61) | HID18_GENTER_SPECULATION_DISABLE | HID18_GEXIT_EL_SPECULATION_DISABLE);
 
     reg_set(s3_0_c15_c2_3, BIT(3));
     reg_clr(s3_0_c15_c2_4, BIT(0) | BIT(1) | BIT(16) | BIT(17) | BIT(18) | BIT(22));

diff --git a/src/cpu_regs.h b/src/cpu_regs.h
@@ -339,6 +339,8 @@
 #define HID13_POST_ON_CYCLES_MASK   GENMASK(13, 7)
 #define HID13_PRE_CYCLES(x)         ((ULONG(x)) << 14)
 #define HID13_PRE_CYCLES_MASK       GENMASK(17, 14)
+#define HID13_GROUP0_FF0_DELAY(x)   ((ULONG(x)) << 18)
+#define HID13_GROUP0_FF0_DELAY_MASK GENMASK(25, 18)
 #define HID13_GROUP0_FF1_DELAY(x)   ((ULONG(x)) << 26)
 #define HID13_GROUP0_FF1_DELAY_MASK GENMASK(29, 26)
 #define HID13_GROUP0_FF2_DELAY(x)   ((ULONG(x)) << 30)