UNRATIFIED RISC-V: Add 'Ssqosid' extension and its TENTATIVE CSRs

[DO NOT MERGE] Until the 'Ssqosid' extension is frozen/ratified and the final version number is determined, this patch should not be merged upstream. This commit uses version 0.1 as the placeholder, not version 0.0.0 in the latest PDF documentation (since 0.0 is invalid). This commit adds QoS registration interface for S-mode ('Ssqosid' extension) support based on the specification: <riscv-non-isa/riscv-cbqri@3e06bc5> ***Draft Note*** Because CSR addresse is not fixed yet, this commit uses tentative addresse (a part of custom CSR space). bfd/ChangeLog: * elfxx-riscv.c (riscv_implicit_subsets) Add implications to 'Zicsr'. (riscv_supported_std_s_ext): Add 'Ssqosid' extension to valid 'S' extension list. gas/ChangeLog: * config/tc-riscv.c (enum riscv_csr_class): Add CSR class for the 'Ssqosid' extension. (riscv_csr_address): Add handling for new CSR class. * testsuite/gas/riscv/csr-dw-regnums.d: Add new CSR. * testsuite/gas/riscv/csr-dw-regnums.s: Likewise. * testsuite/gas/riscv/csr.s: Add new CSR. * testsuite/gas/riscv/csr-version-1p9p1.d: Likewise. * testsuite/gas/riscv/csr-version-1p9p1.l: Likewise. * testsuite/gas/riscv/csr-version-1p10.d: Likewise. * testsuite/gas/riscv/csr-version-1p10.l: Likewise. * testsuite/gas/riscv/csr-version-1p11.d: Likewise. * testsuite/gas/riscv/csr-version-1p11.l: Likewise. * testsuite/gas/riscv/csr-version-1p12.d: Likewise. * testsuite/gas/riscv/csr-version-1p12.l: Likewise. include/ChangeLog: * opcode/riscv-opc.h (CSR_SQOSCFG): New.
a4lg · Oct 19, 2023 · 671568c · 671568c
1 parent 6f85247
commit 671568c
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diff --git a/bfd/elfxx-riscv.c b/bfd/elfxx-riscv.c
@@ -1188,6 +1188,7 @@ static struct riscv_implicit_subset riscv_implicit_subsets[] =
   {"smepmp", "zicsr",		check_implicit_always},
   {"ssaia", "zicsr",		check_implicit_always},
   {"sscofpmf", "zicsr",		check_implicit_always},
+  {"ssqosid", "zicsr",		check_implicit_always},
   {"ssstateen", "zicsr",	check_implicit_always},
   {"sstc", "zicsr",		check_implicit_always},
   {"svadu", "zicsr",		check_implicit_always},
@@ -1335,6 +1336,7 @@ static struct riscv_supported_ext riscv_supported_std_s_ext[] =
   {"smstateen",		ISA_SPEC_CLASS_DRAFT,		1, 0, 0 },
   {"ssaia",		ISA_SPEC_CLASS_DRAFT,		1, 0, 0 },
   {"sscofpmf",		ISA_SPEC_CLASS_DRAFT,		1, 0, 0 },
+  {"ssqosid",		ISA_SPEC_CLASS_DRAFT,		0, 1, 0 },
   {"ssstateen",		ISA_SPEC_CLASS_DRAFT,		1, 0, 0 },
   {"sstc",		ISA_SPEC_CLASS_DRAFT,		1, 0, 0 },
   {"svadu",		ISA_SPEC_CLASS_DRAFT,		1, 0, 0 },

diff --git a/gas/config/tc-riscv.c b/gas/config/tc-riscv.c
@@ -82,6 +82,7 @@ enum riscv_csr_class
   CSR_CLASS_SSAIA_AND_H,	/* Ssaia with H */
   CSR_CLASS_SSAIA_32,		/* Ssaia, rv32 only */
   CSR_CLASS_SSAIA_AND_H_32,	/* Ssaia with H, rv32 only */
+  CSR_CLASS_SSQOSID,		/* Ssqosid */
   CSR_CLASS_SSSTATEEN,		/* S[ms]stateen only */
   CSR_CLASS_SSSTATEEN_AND_H,	/* S[ms]stateen only (with H) */
   CSR_CLASS_SSSTATEEN_AND_H_32,	/* S[ms]stateen RV32 only (with H) */
@@ -1077,6 +1078,9 @@ riscv_csr_address (const char *csr_name,
 		       || csr_class == CSR_CLASS_SSAIA_AND_H_32);
       extension = "ssaia";
       break;
+    case CSR_CLASS_SSQOSID:
+      extension = "ssqosid";
+      break;
     case CSR_CLASS_SSSTATEEN_AND_H_32:
       is_rv32_only = true;
       /* Fall through.  */

diff --git a/gas/testsuite/gas/riscv/csr-dw-regnums.d b/gas/testsuite/gas/riscv/csr-dw-regnums.d
@@ -399,6 +399,7 @@ Contents of the .* section:
   DW_CFA_offset_extended_sf: r5949 \(mhpmevent29h\) at cfa\+7412
   DW_CFA_offset_extended_sf: r5950 \(mhpmevent30h\) at cfa\+7416
   DW_CFA_offset_extended_sf: r5951 \(mhpmevent31h\) at cfa\+7420
+  DW_CFA_offset_extended_sf: r5568 \(sqoscfg\) at cfa\+5888
   DW_CFA_offset_extended_sf: r4429 \(stimecmp\) at cfa\+1332
   DW_CFA_offset_extended_sf: r4445 \(stimecmph\) at cfa\+1396
   DW_CFA_offset_extended_sf: r4685 \(vstimecmp\) at cfa\+2356

diff --git a/gas/testsuite/gas/riscv/csr-dw-regnums.s b/gas/testsuite/gas/riscv/csr-dw-regnums.s
@@ -400,6 +400,8 @@ _start:
 	.cfi_offset mhpmevent29h, 7412
 	.cfi_offset mhpmevent30h, 7416
 	.cfi_offset mhpmevent31h, 7420
+	# Ssqosid extension
+	.cfi_offset sqoscfg, 5888
 	# Sstc extension
 	.cfi_offset stimecmp, 1332
 	.cfi_offset stimecmph, 1396

diff --git a/gas/testsuite/gas/riscv/csr-version-1p10.d b/gas/testsuite/gas/riscv/csr-version-1p10.d
@@ -773,6 +773,8 @@ Disassembly of section .text:
 [ 	]+[0-9a-f]+:[ 	]+73e59073[ 	]+csrw[ 	]+mhpmevent30h,a1
 [ 	]+[0-9a-f]+:[ 	]+73f02573[ 	]+csrr[ 	]+a0,mhpmevent31h
 [ 	]+[0-9a-f]+:[ 	]+73f59073[ 	]+csrw[ 	]+mhpmevent31h,a1
+[ 	]+[0-9a-f]+:[ 	]+5c002573[ 	]+csrr[ 	]+a0,sqoscfg
+[ 	]+[0-9a-f]+:[ 	]+5c059073[ 	]+csrw[ 	]+sqoscfg,a1
 [ 	]+[0-9a-f]+:[ 	]+14d02573[ 	]+csrr[ 	]+a0,stimecmp
 [ 	]+[0-9a-f]+:[ 	]+14d59073[ 	]+csrw[ 	]+stimecmp,a1
 [ 	]+[0-9a-f]+:[ 	]+15d02573[ 	]+csrr[ 	]+a0,stimecmph

diff --git a/gas/testsuite/gas/riscv/csr-version-1p10.l b/gas/testsuite/gas/riscv/csr-version-1p10.l
@@ -1479,6 +1479,10 @@
 .*Info: macro .*
 .*Warning: invalid CSR `mhpmevent31h', needs `sscofpmf' extension
 .*Info: macro .*
+.*Warning: invalid CSR `sqoscfg', needs `ssqosid' extension
+.*Info: macro .*
+.*Warning: invalid CSR `sqoscfg', needs `ssqosid' extension
+.*Info: macro .*
 .*Warning: invalid CSR `stimecmp', needs `sstc' extension
 .*Info: macro .*
 .*Warning: invalid CSR `stimecmp', needs `sstc' extension

diff --git a/gas/testsuite/gas/riscv/csr-version-1p11.d b/gas/testsuite/gas/riscv/csr-version-1p11.d
@@ -773,6 +773,8 @@ Disassembly of section .text:
 [ 	]+[0-9a-f]+:[ 	]+73e59073[ 	]+csrw[ 	]+mhpmevent30h,a1
 [ 	]+[0-9a-f]+:[ 	]+73f02573[ 	]+csrr[ 	]+a0,mhpmevent31h
 [ 	]+[0-9a-f]+:[ 	]+73f59073[ 	]+csrw[ 	]+mhpmevent31h,a1
+[ 	]+[0-9a-f]+:[ 	]+5c002573[ 	]+csrr[ 	]+a0,sqoscfg
+[ 	]+[0-9a-f]+:[ 	]+5c059073[ 	]+csrw[ 	]+sqoscfg,a1
 [ 	]+[0-9a-f]+:[ 	]+14d02573[ 	]+csrr[ 	]+a0,stimecmp
 [ 	]+[0-9a-f]+:[ 	]+14d59073[ 	]+csrw[ 	]+stimecmp,a1
 [ 	]+[0-9a-f]+:[ 	]+15d02573[ 	]+csrr[ 	]+a0,stimecmph

diff --git a/gas/testsuite/gas/riscv/csr-version-1p11.l b/gas/testsuite/gas/riscv/csr-version-1p11.l
@@ -1475,6 +1475,10 @@
 .*Info: macro .*
 .*Warning: invalid CSR `mhpmevent31h', needs `sscofpmf' extension
 .*Info: macro .*
+.*Warning: invalid CSR `sqoscfg', needs `ssqosid' extension
+.*Info: macro .*
+.*Warning: invalid CSR `sqoscfg', needs `ssqosid' extension
+.*Info: macro .*
 .*Warning: invalid CSR `stimecmp', needs `sstc' extension
 .*Info: macro .*
 .*Warning: invalid CSR `stimecmp', needs `sstc' extension

diff --git a/gas/testsuite/gas/riscv/csr-version-1p12.d b/gas/testsuite/gas/riscv/csr-version-1p12.d
@@ -773,6 +773,8 @@ Disassembly of section .text:
 [ 	]+[0-9a-f]+:[ 	]+73e59073[ 	]+csrw[ 	]+mhpmevent30h,a1
 [ 	]+[0-9a-f]+:[ 	]+73f02573[ 	]+csrr[ 	]+a0,mhpmevent31h
 [ 	]+[0-9a-f]+:[ 	]+73f59073[ 	]+csrw[ 	]+mhpmevent31h,a1
+[ 	]+[0-9a-f]+:[ 	]+5c002573[ 	]+csrr[ 	]+a0,sqoscfg
+[ 	]+[0-9a-f]+:[ 	]+5c059073[ 	]+csrw[ 	]+sqoscfg,a1
 [ 	]+[0-9a-f]+:[ 	]+14d02573[ 	]+csrr[ 	]+a0,stimecmp
 [ 	]+[0-9a-f]+:[ 	]+14d59073[ 	]+csrw[ 	]+stimecmp,a1
 [ 	]+[0-9a-f]+:[ 	]+15d02573[ 	]+csrr[ 	]+a0,stimecmph

diff --git a/gas/testsuite/gas/riscv/csr-version-1p12.l b/gas/testsuite/gas/riscv/csr-version-1p12.l
@@ -1199,6 +1199,10 @@
 .*Info: macro .*
 .*Warning: invalid CSR `mhpmevent31h', needs `sscofpmf' extension
 .*Info: macro .*
+.*Warning: invalid CSR `sqoscfg', needs `ssqosid' extension
+.*Info: macro .*
+.*Warning: invalid CSR `sqoscfg', needs `ssqosid' extension
+.*Info: macro .*
 .*Warning: invalid CSR `stimecmp', needs `sstc' extension
 .*Info: macro .*
 .*Warning: invalid CSR `stimecmp', needs `sstc' extension

diff --git a/gas/testsuite/gas/riscv/csr-version-1p9p1.d b/gas/testsuite/gas/riscv/csr-version-1p9p1.d
@@ -773,6 +773,8 @@ Disassembly of section .text:
 [ 	]+[0-9a-f]+:[ 	]+73e59073[ 	]+csrw[ 	]+mhpmevent30h,a1
 [ 	]+[0-9a-f]+:[ 	]+73f02573[ 	]+csrr[ 	]+a0,mhpmevent31h
 [ 	]+[0-9a-f]+:[ 	]+73f59073[ 	]+csrw[ 	]+mhpmevent31h,a1
+[ 	]+[0-9a-f]+:[ 	]+5c002573[ 	]+csrr[ 	]+a0,sqoscfg
+[ 	]+[0-9a-f]+:[ 	]+5c059073[ 	]+csrw[ 	]+sqoscfg,a1
 [ 	]+[0-9a-f]+:[ 	]+14d02573[ 	]+csrr[ 	]+a0,stimecmp
 [ 	]+[0-9a-f]+:[ 	]+14d59073[ 	]+csrw[ 	]+stimecmp,a1
 [ 	]+[0-9a-f]+:[ 	]+15d02573[ 	]+csrr[ 	]+a0,stimecmph

diff --git a/gas/testsuite/gas/riscv/csr-version-1p9p1.l b/gas/testsuite/gas/riscv/csr-version-1p9p1.l
@@ -1595,6 +1595,10 @@
 .*Info: macro .*
 .*Warning: invalid CSR `mhpmevent31h', needs `sscofpmf' extension
 .*Info: macro .*
+.*Warning: invalid CSR `sqoscfg', needs `ssqosid' extension
+.*Info: macro .*
+.*Warning: invalid CSR `sqoscfg', needs `ssqosid' extension
+.*Info: macro .*
 .*Warning: invalid CSR `stimecmp', needs `sstc' extension
 .*Info: macro .*
 .*Warning: invalid CSR `stimecmp', needs `sstc' extension

diff --git a/gas/testsuite/gas/riscv/csr.s b/gas/testsuite/gas/riscv/csr.s
@@ -433,6 +433,9 @@
 	csr mhpmevent30h
 	csr mhpmevent31h
 
+	# Ssqosid extension
+	csr sqoscfg
+
 	# Sstc extension
 	csr stimecmp
 	csr stimecmph

diff --git a/include/opcode/riscv-opc.h b/include/opcode/riscv-opc.h
@@ -2957,6 +2957,8 @@
 #define CSR_MHPMEVENT29H 0x73d
 #define CSR_MHPMEVENT30H 0x73e
 #define CSR_MHPMEVENT31H 0x73f
+/* Ssqosid extension.  */
+#define CSR_SQOSCFG 0x5c0  /* TENTATIVELY use custom CSR address.  */
 /* Sstc extension */
 #define CSR_STIMECMP 0x14d
 #define CSR_STIMECMPH 0x15d
@@ -3948,6 +3950,8 @@ DECLARE_CSR(mhpmevent28h, CSR_MHPMEVENT28H, CSR_CLASS_SSCOFPMF_32, PRIV_SPEC_CLA
 DECLARE_CSR(mhpmevent29h, CSR_MHPMEVENT29H, CSR_CLASS_SSCOFPMF_32, PRIV_SPEC_CLASS_NONE, PRIV_SPEC_CLASS_NONE)
 DECLARE_CSR(mhpmevent30h, CSR_MHPMEVENT30H, CSR_CLASS_SSCOFPMF_32, PRIV_SPEC_CLASS_NONE, PRIV_SPEC_CLASS_NONE)
 DECLARE_CSR(mhpmevent31h, CSR_MHPMEVENT31H, CSR_CLASS_SSCOFPMF_32, PRIV_SPEC_CLASS_NONE, PRIV_SPEC_CLASS_NONE)
+/* Ssqosid extension.  */
+DECLARE_CSR(sqoscfg, CSR_SQOSCFG, CSR_CLASS_SSQOSID, PRIV_SPEC_CLASS_NONE, PRIV_SPEC_CLASS_NONE)
 /* Sstc extension */
 DECLARE_CSR(stimecmp, CSR_STIMECMP, CSR_CLASS_SSTC, PRIV_SPEC_CLASS_NONE, PRIV_SPEC_CLASS_NONE)
 DECLARE_CSR(stimecmph, CSR_STIMECMPH, CSR_CLASS_SSTC_32, PRIV_SPEC_CLASS_NONE, PRIV_SPEC_CLASS_NONE)