Disable HDL builds for testing

Signed-off-by: Travis F. Collins <[email protected]>
analogdevicesinc · Dec 20, 2024 · 1c358e0 · 1c358e0
1 parent 68e0293
commit 1c358e0
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Showing 4 changed files with 43 additions and 460 deletions.
diff --git a/Jenkinsfile b/Jenkinsfile
@@ -40,44 +40,44 @@ stage("Build Toolbox") {
 
 /////////////////////////////////////////////////////
 
-boardNames = [
-    'fmcomms2_zed',
-    'fmcomms2_zc702','fmcomms5_zc702',
-    'fmcomms2_zc706','fmcomms5_zc706','adrv9371x_zc706','adrv9009_zc706',
-    'fmcomms2_zcu102','adrv9002_zcu102','adrv9009_zcu102','adrv9371x_zcu10','fmcomms8_zcu102',
-    'adrv9361z7035_ccbob_cmos','adrv9361z7035_ccbob_lvds','adrv9361z7035_ccfmc_lvds','adrv9361z7035_ccpackrf_lvds',
-    'adrv9364z7020_ccbob_cmos','adrv9364z7020_ccbob_lvds',
-    'pluto']
-dockerConfig.add("-e HDLBRANCH=hdl_2022_r2")
-
-cstage("HDL Tests", "", flags) {
-    dockerParallelBuild(boardNames, dockerHost, dockerConfig) { 
-        branchName ->
-        withEnv(['BOARD='+branchName]) {
-            cstage("Source", branchName, flags) {
-                local_unstash('builtSources')
-                sh 'make -C ./CI/scripts test'
-                junit testResults: 'test/*.xml', allowEmptyResults: true
-                archiveArtifacts artifacts: 'test/logs/*', followSymlinks: false, allowEmptyArchive: true
-            }
-/*
-            stage("Synth") {
-                unstash "builtSources"
-                sh 'make -C ./CI/scripts test_synth'
-                junit testResults: 'test/*.xml', allowEmptyResults: true
-                archiveArtifacts artifacts: 'test/logs/*', followSymlinks: false, allowEmptyArchive: true
-            }
-*/
-            cstage("Installer", branchName, flags) {
-                local_unstash('builtSources')
-                sh 'rm -rf hdl'
-                sh 'make -C ./CI/scripts test_installer'
-                junit testResults: 'test/*.xml', allowEmptyResults: true
-                archiveArtifacts artifacts: 'test/logs/*', followSymlinks: false, allowEmptyArchive: true
-            }
-        }
-    }
-}
+// boardNames = [
+//     'fmcomms2_zed',
+//     'fmcomms2_zc702','fmcomms5_zc702',
+//     'fmcomms2_zc706','fmcomms5_zc706','adrv9371x_zc706','adrv9009_zc706',
+//     'fmcomms2_zcu102','adrv9002_zcu102','adrv9009_zcu102','adrv9371x_zcu10','fmcomms8_zcu102',
+//     'adrv9361z7035_ccbob_cmos','adrv9361z7035_ccbob_lvds','adrv9361z7035_ccfmc_lvds','adrv9361z7035_ccpackrf_lvds',
+//     'adrv9364z7020_ccbob_cmos','adrv9364z7020_ccbob_lvds',
+//     'pluto']
+// dockerConfig.add("-e HDLBRANCH=hdl_2022_r2")
+
+// cstage("HDL Tests", "", flags) {
+//     dockerParallelBuild(boardNames, dockerHost, dockerConfig) { 
+//         branchName ->
+//         withEnv(['BOARD='+branchName]) {
+//             cstage("Source", branchName, flags) {
+//                 local_unstash('builtSources')
+//                 sh 'make -C ./CI/scripts test'
+//                 junit testResults: 'test/*.xml', allowEmptyResults: true
+//                 archiveArtifacts artifacts: 'test/logs/*', followSymlinks: false, allowEmptyArchive: true
+//             }
+// /*
+//             stage("Synth") {
+//                 unstash "builtSources"
+//                 sh 'make -C ./CI/scripts test_synth'
+//                 junit testResults: 'test/*.xml', allowEmptyResults: true
+//                 archiveArtifacts artifacts: 'test/logs/*', followSymlinks: false, allowEmptyArchive: true
+//             }
+// */
+//             cstage("Installer", branchName, flags) {
+//                 local_unstash('builtSources')
+//                 sh 'rm -rf hdl'
+//                 sh 'make -C ./CI/scripts test_installer'
+//                 junit testResults: 'test/*.xml', allowEmptyResults: true
+//                 archiveArtifacts artifacts: 'test/logs/*', followSymlinks: false, allowEmptyArchive: true
+//             }
+//         }
+//     }
+// }
 
 /////////////////////////////////////////////////////
 

diff --git a/trx_examples/targeting/frequency-hopping/ccbob_lvds_hop/fh_preprocess.tcl b/trx_examples/targeting/frequency-hopping/ccbob_lvds_hop/fh_preprocess.tcl
@@ -7,8 +7,7 @@ file rename -force $ad_hdl_dir/hdl/vendor/AnalogDevices/vivado/library $ad_hdl_d
 file copy -force $ad_hdl_dir/trx_examples/targeting/frequency-hopping/ccbob_lvds_hop/system_top.v $ad_hdl_dir/projects/adrv9364z7020/ccbob_lvds/system_top.v
 set f [open $ad_hdl_dir/projects/adrv9364z7020/ccbob_lvds/system_bd.tcl "a"]
 
-# To check
 puts $f "create_bd_port -dir O gpio_en_agc"
 puts $f "create_bd_port -from 0 -to 7 -dir I gpio_status"
 puts $f "create_bd_port -from 0 -to 3 -dir O gpio_ctl"
-close $f
+close $f
diff --git a/trx_examples/targeting/frequency-hopping/ccbob_lvds_hop/system_top.v b/trx_examples/targeting/frequency-hopping/ccbob_lvds_hop/system_top.v
@@ -223,6 +223,9 @@ module system_top (
     .tx_frame_out_p (tx_frame_out_p),
     .txnrx (txnrx),
     .up_enable (gpio_o[47]),
-    .up_txnrx (gpio_o[48]));
+    .up_txnrx (gpio_o[48]),
+    .gpio_en_agc (gpio_en_agc),
+    .gpio_status (gpio_status),
+    .gpio_ctl (gpio_ctl));
 
 endmodule