analogdevicesinc · actorreno · Dec 17, 2024 · Dec 17, 2024 · Dec 17, 2024 · Dec 17, 2024
@@ -0,0 +1,191 @@
+.. _ad353xr:
+
+AD353XR HDL project
+================================================================================
+
+Overview
+--------------------------------------------------------------------------------
+
+The :adi:`AD3530R`/ :adi:`AD3530` are low power, 8-channel, 16-bit, buffered
+voltage output, digital-to-analog converters (DACs) that include a gain bit field,
+resulting in a full-scale output of 2.5 V (gain = 1) or 5 V (gain = 2) for a
+reference voltage of 2.5 V. The :adi:`AD3530R` has an on-chip, buffered, 2.5 V
+reference available at the VREF pin, capable of sourcing external loads up to
++5 mA.
+
+Each DAC channel has its own Input register and DAC register. The DAC Register 
+stores digital code equivalent to the DAC output voltage while the Input Register
+acts as a temporary staging register before being passed on the DAC Register. With
+the LDAC function, one or more DAC registers could be updated in parallel with
+the data held in the Input Register. The DAC registers can also be directly written
+to, in which the corresponding output updates immediately without an LDAC. 
+
+The :adi:`AD3530R`/ :adi:`AD3530` contains eight buffered voltage output DAC 
+channels capable of sourcing and sinking up to 40 mA of current.
+
+The :adi:`AD3530R`/ :adi:`AD3530` contains a 27:1 multiplexer which could
+output a voltage on the MUX_OUT pin that is a representative of
+either the output voltage or output current of a chosen channel, or
+the internal die temperature of the device.
+
+
+Applications:
+
+* Optical transceivers
+* Test and measurement
+* Industrial automation
+* Data acquisition systems
+
+Supported boards
+-------------------------------------------------------------------------------
+
+- :adi:`EVAL-AD3530RARDZ`
+
+Supported devices
+-------------------------------------------------------------------------------
+
+- :adi:`AD3530`
+- :adi:`AD3530R`
+
+Supported carriers
+-------------------------------------------------------------------------------
+
+- :xilinx:`ZedBoard <products/boards-and-kits/1-8dyf-11.html>` on FMCs
+- :xilinx:`Cora Z7-07S <products/boards-and-kits/1-1qlaz7n.html>` on GPIOs
+- :intel:`DE10-Nano <content/www/us/en/partner/showcase/offering/a5b3b0000004cbwAAA/de10nano-kit.html>` on GPIOs
+
+Block design
+-------------------------------------------------------------------------------
+
+Block diagram
+~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+
+The data path is depicted in the below diagram:
+
+.. image:: ad353xr_block_diagram.svg
+   :width: 800
+   :align: center
+   :alt: AD353XR block diagram
+
+Hardware setup
+~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+
+============ ================= ============== ================ ==============
+Signal       AD353XR Testpoint  ZedBoard FMC  Cora Z7-07S GPIO DE10-Nano GPIO
+============ ================= ============== ================ ==============
+CSB(SS0)     PMOD P1           M19/FMC-LA00_P F16              AE19
+SDO(MOSI)    PMOD P2           N19/FMC-LA01_P T12              AG15
+SDI(MISO)    PMOD P3           N20/FMC-LA01_N W15              AF18
+SCK          PMOD P4           D18/FMC-CLK1_P H15              AG18
+RESETB       PMOD P8           T19/FMC-LA10_N V13              AE20
+LDACB        PMOD P9           J18/FMC_LA05_P T14              AE17
+============ ================= ============== ================ ==============
+
+The evaluation board is powered by 5 V voltage from an external USB.
+
+GPIOs
+~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+
+The Software GPIO number is calculated as follows:
+
+- Zynq-7000: if PS7 is used, then the offset is 54
+- All supported boards uses the same HDL GPIO EMIO Number
+
+.. list-table::
+   :widths: 25 25 25 25
+   :header-rows: 2
+
+   * - GPIO signal
+     - Direction
+     - HDL GPIO EMIO
+     - Software GPIO
+   * -
+     - (from FPGA view)
+     -
+     - Zynq-7000
+   * - RESETB
+     - OUT
+     - 33
+     - 87
+   * - LDACB
+     - OUT
+     - 34
+     - 88
+
+Building the HDL project
+-------------------------------------------------------------------------------
+
+The design is built upon ADI's generic HDL reference design framework.
+ADI distributes the bit/elf files of these projects as part of the
+:dokuwiki:`ADI Kuiper Linux <resources/tools-software/linux-software/kuiper-linux>`.
+If you want to build the sources, ADI makes them available on the
+:git-hdl:`HDL repository </>`. To get the source you must
+`clone <https://git-scm.com/book/en/v2/Git-Basics-Getting-a-Git-Repository>`__
+the HDL repository, and then build the project as follows:
+
+**Linux/Cygwin/WSL**
+
+.. shell::
+
+   $cd hdl/projects/ad353xr/zed
+   $make
+
+A more comprehensive build guide can be found in the :ref:`build_hdl` user guide.
+
+Resources
+-------------------------------------------------------------------------------
+
+Hardware related (Links To be Updated)
+~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+
+- Product datasheet: :adi:`AD353XR`
+- `UG-1203: EVAL-AD3530RARDZ Board User Guide <https://www.analog.com/media/en/technical-documentation/user-guides/EVAL-AD4110-1SDZ-UG-1203.pdf>`__
+
+HDL related
+~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+
+- :git-hdl:`AD353XR HDL project source code <projects/ad353xr>`
+
+.. list-table::
+   :widths: 30 35 35
+   :header-rows: 1
+
+   * - IP name
+     - Source code link
+     - Documentation link
+   * - AXI_CLKGEN
+     - :git-hdl:`library/axi_clkgen`
+     - :ref:`axi_clkgen`
+   * - AXI_DMAC
+     - :git-hdl:`library/axi_dmac`
+     - :ref:`axi_dmac`
+   * - AXI_HDMI_TX
+     - :git-hdl:`library/axi_hdmi_tx`
+     - :ref:`axi_hdmi_tx`
+   * - AXI_I2S_ADI
+     - :git-hdl:`library/axi_i2s_adi`
+     - ---
+   * - AXI_SPDIF_TX
+     - :git-hdl:`library/axi_spdif_tx`
+     - ---
+   * - AXI_SYSID
+     - :git-hdl:`library/axi_sysid`
+     - :ref:`axi_sysid`
+   * - AXI_SYSID_ROM
+     - :git-hdl:`library/sysid_rom`
+     - :ref:`axi_sysid`
+   * - UTIL_I2C_MIXER
+     - :git-hdl:`library/util_i2c_mixer`
+     - ---
+
+Software related (Links To be Updated)
+~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+
+- :git-no-os:`AD353XR No-OS project source code <projects/ad353xr>`
+- :git-no-os:`AD353XR No-OS Driver source code <drivers/afe/ad353xr>`
+- :dokuwiki:`AD353XR No-OS Driver documentation <resources/tools-software/uc-drivers/ad353xr>`
+- :dokuwiki:`AD353XR IIO Application <resources/tools-software/product-support-software/ad353xr_mbed_iio_application>`
+
+.. include:: ../common/more_information.rst
+
+.. include:: ../common/support.rst
@@ -0,0 +1,7 @@
+####################################################################################
+## Copyright (c) 2018 - 2023 Analog Devices, Inc.
+### SPDX short identifier: BSD-1-Clause
+## Auto-generated, do not modify!
+####################################################################################
+
+include ../scripts/project-toplevel.mk
@@ -0,0 +1,8 @@
+# AD353XR HDL Driver
+
+Here are some pointers to help you:
+  * [Board Product Page] To Be Released
+  * Parts : [ AD353XR Family of Low Power, Buffered Voltage Output, SPI DAC ] To Be Released
+  * Project Doc: https://wiki.analog.com/resources/eval/user-guides/ad353xr
+  * HDL Doc: https://wiki.analog.com/resources/eval/user-guides/ad353xr
+  * Linux Drivers: To be added after PR and Upstream
@@ -0,0 +1,18 @@
+####################################################################################
+## Copyright (c) 2018 - 2023 Analog Devices, Inc.
+### SPDX short identifier: BSD-1-Clause
+## Auto-generated, do not modify!
+####################################################################################
+
+PROJECT_NAME := ad353xR_coraz7s
+
+M_DEPS += ../../scripts/adi_pd.tcl
+M_DEPS += ../../common/coraz7s/coraz7s_system_ps7.tcl
+M_DEPS += ../../common/coraz7s/coraz7s_system_constr.xdc
+M_DEPS += ../../common/coraz7s/coraz7s_system_bd.tcl
+M_DEPS += ../../../library/common/ad_iobuf.v
+
+LIB_DEPS += axi_sysid
+LIB_DEPS += sysid_rom
+
+include ../../scripts/project-xilinx.mk
@@ -0,0 +1,16 @@
+###############################################################################
+## Copyright (C) 2022-2023 Analog Devices, Inc. All rights reserved.
+### SPDX short identifier: ADIBSD
+###############################################################################
+
+source $ad_hdl_dir/projects/common/coraz7s/coraz7s_system_bd.tcl
+source $ad_hdl_dir/projects/scripts/adi_pd.tcl
+
+#system ID
+ad_ip_parameter axi_sysid_0 CONFIG.ROM_ADDR_BITS 9
+ad_ip_parameter rom_sys_0 CONFIG.PATH_TO_FILE "[pwd]/mem_init_sys.txt"
+ad_ip_parameter rom_sys_0 CONFIG.ROM_ADDR_BITS 9
+
+sysid_gen_sys_init_file 
+
+set sys_dma_clk [get_bd_nets sys_dma_clk]
@@ -0,0 +1,15 @@
+###############################################################################
+## Copyright (C) 2022-2024 Analog Devices, Inc. All rights reserved.
+### SPDX short identifier: ADIBSD
+###############################################################################
+
+# DAC SPI interface
+
+set_property -dict {PACKAGE_PIN H15  IOSTANDARD LVCMOS33} [get_ports spi_sck]           ; ## ck_sck H15
+set_property -dict {PACKAGE_PIN T12  IOSTANDARD LVCMOS33} [get_ports spi_sdo]           ; ## ck_mosi T12
+set_property -dict {PACKAGE_PIN W15  IOSTANDARD LVCMOS33} [get_ports spi_sdi]           ; ## ck_miso W15
+set_property -dict {PACKAGE_PIN F16  IOSTANDARD LVCMOS33} [get_ports spi_csb]           ; ## ck_ss F16
+
+# DAC GPIO interface
+set_property -dict {PACKAGE_PIN V13  IOSTANDARD LVCMOS33} [get_ports dac_resetb]        ; ## ck_io[1] V13
+set_property -dict {PACKAGE_PIN T14  IOSTANDARD LVCMOS33} [get_ports dac_ldacb]         ; ## ck_io[2] T14
@@ -0,0 +1,20 @@
+###############################################################################
+## Copyright (C) 2022-2023 Analog Devices, Inc. All rights reserved.
+### SPDX short identifier: ADIBSD
+###############################################################################
+
+source ../../../scripts/adi_env.tcl
+source $ad_hdl_dir/projects/scripts/adi_project_xilinx.tcl
+source $ad_hdl_dir/projects/scripts/adi_board.tcl
+
+adi_project ad353xR_coraz7s
+
+adi_project_files ad353xR_coraz7s [list \
+	"$ad_hdl_dir/library/common/ad_iobuf.v" \
+	"system_top.v" \
+	"system_constr.xdc" \
+	"$ad_hdl_dir/projects/common/coraz7s/coraz7s_system_constr.xdc"]
+
+set_property PROCESSING_ORDER LATE [get_files system_constr.xdc]
+
+adi_project_run ad353xR_coraz7s