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Ad4630 offload update #2725

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Ad4630 offload update #2725

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f1b812e
spi: offload: types: add offset parameter
ahaslam2 Feb 28, 2025
a1c6893
spi: spi-offload-trigger-pwm: Use duty offset
ahaslam2 Feb 28, 2025
8ab91da
arm: dts: zynq-zed-adv7511-ad4630-24: update to upstream SPI offload
ahaslam2 Feb 28, 2025
1c400e1
iio: adc: ad4630 migrate to new offload implementation
ahaslam2 Feb 28, 2025
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39 changes: 20 additions & 19 deletions arch/arm/boot/dts/xilinx/zynq-zed-adv7511-ad4630-24.dts
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Original file line number Diff line number Diff line change
Expand Up @@ -39,6 +39,11 @@
regulator-always-on;
};

trigger_pwm: adc-pwm-trigger {
compatible = "pwm-trigger";
#trigger-source-cells = <0>;
pwms = <&adc_trigger 0 0 0>;
};
clocks {
cnv_ext_clk: ext-clk {
#clock-cells = <0x0>;
Expand All @@ -50,6 +55,13 @@
};

&fpga_axi {
adc_trigger: pwm@44b00000 {
compatible = "adi,axi-pwmgen-2.00.a";
reg = <0x44b00000 0x1000>;
#pwm-cells = <2>;
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Suggested change
#pwm-cells = <2>;
#pwm-cells = <3>;

clocks = <&cnv_ext_clk>;
};

rx_dma: rx-dmac@44a30000 {
compatible = "adi,axi-dmac-1.00.a";
reg = <0x44a30000 0x1000>;
Expand All @@ -67,46 +79,35 @@
clock-output-names = "spi_clk";
};

axi_pwm_gen: axi-pwm-gen@ {
compatible = "adi,axi-pwmgen-2.00.a";
reg = <0x44b00000 0x1000>;
label = "ad463x_cnv";
#pwm-cells = <2>;
clocks = <&cnv_ext_clk>;

};

axi_spi_engine: spi@44a00000 {
compatible = "adi-ex,axi-spi-engine-1.00.a";
compatible = "adi,axi-spi-engine-1.00.a";
reg = <0x44a00000 0x1FF>;
interrupt-parent = <&intc>;
interrupts = <0 56 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clkc 15>, <&spi_clk>;
clock-names = "s_axi_aclk", "spi_clk";
num-cs = <1>;

dmas = <&rx_dma 0>;
dma-names = "offload0-rx";
trigger-sources = <&trigger_pwm>;

#address-cells = <0x1>;
#size-cells = <0x0>;

ad4630_24: ad4630-24@0 {
compatible = "adi,ad4630-24";
reg = <0>;
spi-max-frequency = <80000000>;
vdd-supply = <&vref>;
vdd_1_8-supply = <&vdd_1_8>;
vio-supply = <&vio>;
vref-supply = <&vref>;
spi-max-frequency = <80000000>;
pwm-names = "cnv";
pwms = <&adc_trigger 1 100000>;
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Suggested change
pwms = <&adc_trigger 1 100000>;
pwms = <&adc_trigger 1 100000 0>;

reset-gpios = <&gpio0 86 GPIO_ACTIVE_LOW>;
adi,lane-mode = <1>;
adi,clock-mode = <0>;
adi,out-data-mode = <0>;
adi,spi-trigger;
clocks = <&cnv_ext_clk>;
clock-names = "trigger_clock";
dmas = <&rx_dma 0>;
dma-names = "rx";
pwm-names = "spi_trigger", "cnv";
pwms = <&axi_pwm_gen 0 0>, <&axi_pwm_gen 1 0>;
};
};
};
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