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Adding one remaining interrupt.
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kevin-gillespie committed Dec 5, 2024
1 parent e19bc9c commit ab8a6e0
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Showing 2 changed files with 11 additions and 5 deletions.
10 changes: 5 additions & 5 deletions Libraries/PeriphDrivers/Source/UART/uart_revb.c
Original file line number Diff line number Diff line change
Expand Up @@ -636,15 +636,15 @@ int MXC_UART_RevB_Transaction(mxc_uart_revb_req_t *req)

while (req->txCnt < req->txLen) {
while (!(MXC_UART_GetFlags((mxc_uart_regs_t *)(req->uart)) &
MXC_F_UART_REVB_INT_FL_TX_HE) &&
(MXC_F_UART_REVB_INT_FL_TX_HE | MXC_F_UART_REVB_INT_FL_TX_OR)) &&
!(req->uart->status & MXC_F_UART_REVB_STATUS_TX_EM)) {}

numToWrite = MXC_UART_GetTXFIFOAvailable((mxc_uart_regs_t *)(req->uart));
numToWrite = numToWrite > (req->txLen - req->txCnt) ? req->txLen - req->txCnt :
numToWrite;
req->txCnt += MXC_UART_WriteTXFIFO((mxc_uart_regs_t *)(req->uart),
&req->txData[req->txCnt], numToWrite);
MXC_UART_ClearFlags((mxc_uart_regs_t *)(req->uart), MXC_F_UART_REVB_INT_FL_TX_HE);
MXC_UART_ClearFlags((mxc_uart_regs_t *)(req->uart), (MXC_F_UART_REVB_INT_FL_TX_HE | MXC_F_UART_REVB_INT_FL_TX_OR));
}
}

Expand Down Expand Up @@ -709,7 +709,7 @@ int MXC_UART_RevB_TransactionAsync(mxc_uart_revb_req_t *req)
NVIC_SetPendingIRQ(MXC_UART_GET_IRQ(uart_num));
} else {
/* Else enable the half empty interrupt */
MXC_UART_EnableInt((mxc_uart_regs_t *)(req->uart), MXC_F_UART_REVB_INT_EN_TX_HE);
MXC_UART_EnableInt((mxc_uart_regs_t *)(req->uart), (MXC_F_UART_REVB_INT_EN_TX_HE | MXC_F_UART_REVB_INT_EN_TX_OR));
}
}

Expand Down Expand Up @@ -783,7 +783,7 @@ int MXC_UART_RevB_AsyncCallback(mxc_uart_revb_regs_t *uart, int retVal)

int MXC_UART_RevB_AsyncStopTx(mxc_uart_revb_regs_t *uart)
{
MXC_UART_DisableInt((mxc_uart_regs_t *)uart, MXC_F_UART_REVB_INT_EN_TX_HE);
MXC_UART_DisableInt((mxc_uart_regs_t *)uart, (MXC_F_UART_REVB_INT_EN_TX_HE | MXC_F_UART_REVB_INT_EN_TX_OR));

return E_NO_ERROR;
}
Expand Down Expand Up @@ -838,7 +838,7 @@ int MXC_UART_RevB_AsyncHandler(mxc_uart_revb_regs_t *uart)
numToWrite = MXC_UART_WriteTXFIFO((mxc_uart_regs_t *)(req->uart), &req->txData[req->txCnt],
numToWrite);
req->txCnt += numToWrite;
MXC_UART_ClearFlags(req->uart, MXC_F_UART_REVB_INT_FL_TX_HE);
MXC_UART_ClearFlags(req->uart, (MXC_F_UART_REVB_INT_FL_TX_HE | MXC_F_UART_REVB_INT_FL_TX_OR));
}

req = (mxc_uart_req_t *)AsyncRxRequests[uart_num];
Expand Down
6 changes: 6 additions & 0 deletions Libraries/PeriphDrivers/Source/UART/uart_revb_regs.h
Original file line number Diff line number Diff line change
Expand Up @@ -239,6 +239,9 @@ typedef struct {
#define MXC_F_UART_REVB_INT_EN_RX_THD_POS 4 /**< INT_EN_RX_THD Position */
#define MXC_F_UART_REVB_INT_EN_RX_THD ((uint32_t)(0x1UL << MXC_F_UART_REVB_INT_EN_RX_THD_POS)) /**< INT_EN_RX_THD Mask */

#define MXC_F_UART_REVB_INT_EN_TX_OR_POS 5 /**< INT_EN_TX_OR Position */
#define MXC_F_UART_REVB_INT_EN_TX_OR ((uint32_t)(0x1UL << MXC_F_UART_REVB_INT_EN_TX_OR_POS)) /**< INT_EN_TX_OR Mask */

#define MXC_F_UART_REVB_INT_EN_TX_HE_POS 6 /**< INT_EN_TX_HE Position */
#define MXC_F_UART_REVB_INT_EN_TX_HE ((uint32_t)(0x1UL << MXC_F_UART_REVB_INT_EN_TX_HE_POS)) /**< INT_EN_TX_HE Mask */

Expand All @@ -265,6 +268,9 @@ typedef struct {
#define MXC_F_UART_REVB_INT_FL_RX_THD_POS 4 /**< INT_FL_RX_THD Position */
#define MXC_F_UART_REVB_INT_FL_RX_THD ((uint32_t)(0x1UL << MXC_F_UART_REVB_INT_FL_RX_THD_POS)) /**< INT_FL_RX_THD Mask */

#define MXC_F_UART_REVB_INT_FL_TX_OR_POS 5 /**< INT_FL_TX_OR Position */
#define MXC_F_UART_REVB_INT_FL_TX_OR ((uint32_t)(0x1UL << MXC_F_UART_REVB_INT_FL_TX_OR_POS)) /**< INT_FL_TX_OR Mask */

#define MXC_F_UART_REVB_INT_FL_TX_HE_POS 6 /**< INT_FL_TX_HE Position */
#define MXC_F_UART_REVB_INT_FL_TX_HE ((uint32_t)(0x1UL << MXC_F_UART_REVB_INT_FL_TX_HE_POS)) /**< INT_FL_TX_HE Mask */

Expand Down

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